/linux/arch/riscv/include/asm/ |
H A D | assembler.h | 23 REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0) 25 REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0) 27 REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0) 29 REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0) 37 REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0) 38 REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0) 39 REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0) 40 REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0) 41 REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0) 42 REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0) [all …]
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H A D | asm.h | 23 #define REG_L __REG_SEL(ld, lw) macro 94 REG_L \tmp, TASK_TI_CPU_NUM(tp) 98 REG_L \tmp, 0(\dst) 110 REG_L \dst, 0(\dst) 159 REG_L x6, PT_T1(sp) 160 REG_L x7, PT_T2(sp) 161 REG_L x8, PT_S0(sp) 162 REG_L x9, PT_S1(sp) 163 REG_L x10, PT_A0(sp) 164 REG_L x11, PT_A1(sp) [all …]
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H A D | word-at-a-time.h | 65 "1: " REG_L " %0, %2\n" in load_unaligned_zeropad()
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/linux/arch/riscv/kernel/probes/ |
H A D | rethook_trampoline.S | 47 REG_L x3, PT_GP(sp) 48 REG_L x4, PT_TP(sp) 49 REG_L x5, PT_T0(sp) 50 REG_L x6, PT_T1(sp) 51 REG_L x7, PT_T2(sp) 52 REG_L x8, PT_S0(sp) 53 REG_L x9, PT_S1(sp) 54 REG_L x10, PT_A0(sp) 55 REG_L x11, PT_A1(sp) 56 REG_L x12, PT_A2(sp) [all …]
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/linux/arch/riscv/kernel/ |
H A D | entry.S | 49 REG_L a2, TASK_TI_CPU(tp) 70 REG_L a2, 0(a0) 80 REG_L a0, TASK_TI_A0(tp) 81 REG_L a1, TASK_TI_A1(tp) 82 REG_L a2, TASK_TI_A2(tp) 87 REG_L a2, TASK_TI_A2(tp) 89 REG_L a1, TASK_TI_A1(tp) 91 REG_L a0, TASK_TI_A0(tp) 127 REG_L sp, TASK_TI_KERNEL_SP(tp) 132 REG_L sp, TASK_TI_KERNEL_SP(tp) [all …]
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H A D | mcount.S | 38 REG_L ra, 1*SZREG(sp) 39 REG_L s0, 0*SZREG(sp) 44 REG_L ra, FREGS_RA(sp) 45 REG_L s0, FREGS_S0(sp) 46 REG_L a0, FREGS_A0(sp) 47 REG_L a1, FREGS_A1(sp) 87 REG_L t1, 0(t0) 91 REG_L t2, 0(t3) 96 REG_L t5, 0(t3) 109 REG_L a2, -2*SZREG(s0) [all …]
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H A D | copy-unaligned.S | 17 REG_L a4, 0(a1) 18 REG_L a5, SZREG(a1) 19 REG_L a6, 2*SZREG(a1) 20 REG_L a7, 3*SZREG(a1) 21 REG_L t0, 4*SZREG(a1) 22 REG_L t1, 5*SZREG(a1) 23 REG_L t2, 6*SZREG(a1) 24 REG_L t3, 7*SZREG(a1)
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H A D | head.S | 78 REG_L a1, KERNEL_MAP_VIRT_ADDR(a1) 92 REG_L a1, 0(a1) 158 REG_L tp, (a2) 162 REG_L sp, (a3) 362 REG_L sp, (a1) 363 REG_L tp, (a2)
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H A D | kexec_relocate.S | 59 REG_L t0, 0(s0) /* t0 = *image->entry */ 92 REG_L t1, (t0) /* t1 = *src_ptr */
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/linux/arch/riscv/lib/ |
H A D | memcpy.S | 43 REG_L a4, 0(a1) 44 REG_L a5, SZREG(a1) 45 REG_L a6, 2*SZREG(a1) 46 REG_L a7, 3*SZREG(a1) 47 REG_L t0, 4*SZREG(a1) 48 REG_L t1, 5*SZREG(a1) 49 REG_L t2, 6*SZREG(a1) 50 REG_L t3, 7*SZREG(a1) 51 REG_L t4, 8*SZREG(a1) 52 REG_L t5, 9*SZREG(a1) [all …]
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H A D | uaccess.S | 18 REG_L t0, riscv_v_usercopy_threshold 46 REG_L t0, riscv_v_usercopy_threshold 117 fixup REG_L a4, 0(a1), 10f 118 fixup REG_L a5, SZREG(a1), 10f 119 fixup REG_L a6, 2*SZREG(a1), 10f 120 fixup REG_L a7, 3*SZREG(a1), 10f 121 fixup REG_L t1, 4*SZREG(a1), 10f 122 fixup REG_L t2, 5*SZREG(a1), 10f 123 fixup REG_L t3, 6*SZREG(a1), 10f 124 fixup REG_L t4, 7*SZREG(a1), 10f [all …]
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H A D | memmove.S | 132 REG_L t0, (0 * SZREG)(a1) 134 REG_L t1, (1 * SZREG)(a1) 143 REG_L t0, (2 * SZREG)(a1) 194 REG_L t1, ( 0 * SZREG)(a4) 196 REG_L t0, (-1 * SZREG)(a4) 205 REG_L t1, (-2 * SZREG)(a4) 231 REG_L t1, ( 0 * SZREG)(a1) 243 REG_L t1, (-1 * SZREG)(a4)
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H A D | strlen.S | 73 REG_L t1, 0(t0) 111 REG_L t1, SZREG(t0)
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H A D | strcmp.S | 73 REG_L t0, 0(a0) 74 REG_L t1, 0(a1)
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H A D | strncmp.S | 82 REG_L t0, 0(a0) 83 REG_L t1, 0(a1)
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/linux/arch/mips/fw/lib/ |
H A D | call_o32.S | 88 REG_L sp,O32_NFRAMESZ-1*SZREG(sp) 90 REG_L s0,O32_FRAMESZ-11*SZREG(sp) 91 REG_L s1,O32_FRAMESZ-10*SZREG(sp) 92 REG_L s2,O32_FRAMESZ-9*SZREG(sp) 93 REG_L s3,O32_FRAMESZ-8*SZREG(sp) 94 REG_L s4,O32_FRAMESZ-7*SZREG(sp) 95 REG_L s5,O32_FRAMESZ-6*SZREG(sp) 96 REG_L s6,O32_FRAMESZ-5*SZREG(sp) 97 REG_L s7,O32_FRAMESZ-4*SZREG(sp) 98 REG_L gp,O32_FRAMESZ-3*SZREG(sp) [all …]
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/linux/arch/riscv/kernel/vdso/ |
H A D | vgetrandom-chacha.S | 234 REG_L s0, (sp) 235 REG_L s1, SZREG(sp) 236 REG_L s2, 2*SZREG(sp) 237 REG_L s3, 3*SZREG(sp) 238 REG_L s4, 4*SZREG(sp) 239 REG_L s5, 5*SZREG(sp) 240 REG_L s6, 6*SZREG(sp) 241 REG_L s7, 7*SZREG(sp) 242 REG_L s8, 8*SZREG(sp) 243 REG_L s9, 9*SZREG(sp) [all …]
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/linux/samples/ftrace/ |
H A D | ftrace-direct-too.c | 37 " "REG_L" a0,0*"SZREG"(sp)\n" 38 " "REG_L" a1,1*"SZREG"(sp)\n" 39 " "REG_L" a2,2*"SZREG"(sp)\n" 40 " "REG_L" t0,3*"SZREG"(sp)\n" 41 " "REG_L" ra,4*"SZREG"(sp)\n"
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H A D | ftrace-direct-multi-modify.c | 39 " "REG_L" a0,0*"SZREG"(sp)\n" 40 " "REG_L" t0,1*"SZREG"(sp)\n" 41 " "REG_L" ra,2*"SZREG"(sp)\n" 55 " "REG_L" a0,0*"SZREG"(sp)\n" 56 " "REG_L" t0,1*"SZREG"(sp)\n" 57 " "REG_L" ra,2*"SZREG"(sp)\n"
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H A D | ftrace-direct-modify.c | 39 " "REG_L" t0,0*"SZREG"(sp)\n" 40 " "REG_L" ra,1*"SZREG"(sp)\n" 52 " "REG_L" t0,0*"SZREG"(sp)\n" 53 " "REG_L" ra,1*"SZREG"(sp)\n"
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H A D | ftrace-direct-multi.c | 34 " "REG_L" a0,0*"SZREG"(sp)\n" 35 " "REG_L" t0,1*"SZREG"(sp)\n" 36 " "REG_L" ra,2*"SZREG"(sp)\n"
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H A D | ftrace-direct.c | 32 " "REG_L" a0,0*"SZREG"(sp)\n" 33 " "REG_L" t0,1*"SZREG"(sp)\n" 34 " "REG_L" ra,2*"SZREG"(sp)\n"
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/linux/arch/loongarch/vdso/ |
H A D | vgetrandom-chacha.S | 240 REG_L s0, sp, 0 241 REG_L s1, sp, SZREG 242 REG_L s2, sp, SZREG * 2 243 REG_L s3, sp, SZREG * 3 244 REG_L s4, sp, SZREG * 4 245 REG_L s5, sp, SZREG * 5 246 REG_L s6, sp, SZREG * 6 247 REG_L s7, sp, SZREG * 7 248 REG_L s8, sp, SZREG * 8 249 REG_L s9, sp, SZREG * 9
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/linux/tools/testing/selftests/rseq/ |
H A D | rseq-riscv.h | 24 #define REG_L __REG_SEL("ld ", "lw ") macro 101 REG_L RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(var) "]\n" \ 111 REG_L RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(var) "]\n" \ 120 REG_L RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(var) "]\n" 128 REG_L RSEQ_ASM_TMP_REG_1 ", (" RSEQ_ASM_TMP_REG_1 ")\n" 164 REG_L RSEQ_ASM_TMP_REG_1 ", 0(" RSEQ_ASM_TMP_REG_1 ")\n" \
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/linux/arch/loongarch/include/asm/ |
H A D | asm.h | 55 #define REG_L ld.w macro 60 #define REG_L ld.d macro
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