Searched refs:MSR_F15H_PERF_CTL (Results 1 – 5 of 5) sorted by relevance
84 if (msr >= MSR_F15H_PERF_CTL) in nmi_evntsel_msr_to_bit()85 return (msr - MSR_F15H_PERF_CTL) >> 1; in nmi_evntsel_msr_to_bit()
772 #define MSR_F15H_PERF_CTL 0xc0010200 macro773 #define MSR_F15H_PERF_CTL0 MSR_F15H_PERF_CTL774 #define MSR_F15H_PERF_CTL1 (MSR_F15H_PERF_CTL + 2)775 #define MSR_F15H_PERF_CTL2 (MSR_F15H_PERF_CTL + 4)776 #define MSR_F15H_PERF_CTL3 (MSR_F15H_PERF_CTL + 6)777 #define MSR_F15H_PERF_CTL4 (MSR_F15H_PERF_CTL + 8)778 #define MSR_F15H_PERF_CTL5 (MSR_F15H_PERF_CTL + 10)
766 #define MSR_F15H_PERF_CTL 0xc0010200 macro767 #define MSR_F15H_PERF_CTL0 MSR_F15H_PERF_CTL768 #define MSR_F15H_PERF_CTL1 (MSR_F15H_PERF_CTL + 2)769 #define MSR_F15H_PERF_CTL2 (MSR_F15H_PERF_CTL + 4)770 #define MSR_F15H_PERF_CTL3 (MSR_F15H_PERF_CTL + 6)771 #define MSR_F15H_PERF_CTL4 (MSR_F15H_PERF_CTL + 8)772 #define MSR_F15H_PERF_CTL5 (MSR_F15H_PERF_CTL + 10)
78 amd_ctrls_base = MSR_F15H_PERF_CTL; in xen_pmu_arch_init()124 return MSR_F15H_PERF_CTL + (addr - MSR_K7_EVNTSEL0); in get_fam15h_addr()138 if ((msr >= MSR_F15H_PERF_CTL && in is_amd_pmu_msr()
1420 x86_pmu.eventsel = MSR_F15H_PERF_CTL; in amd_core_pmu_init()