1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #ifndef _XE_LRC_TYPES_H_
7 #define _XE_LRC_TYPES_H_
8 
9 #include "xe_hw_fence_types.h"
10 
11 struct xe_bo;
12 
13 /**
14  * struct xe_lrc - Logical ring context (LRC) and submission ring object
15  */
16 struct xe_lrc {
17 	/**
18 	 * @bo: buffer object (memory) for logical ring context, per process HW
19 	 * status page, and submission ring.
20 	 */
21 	struct xe_bo *bo;
22 
23 	/** @tile: tile which this LRC belongs to */
24 	struct xe_tile *tile;
25 
26 	/** @flags: LRC flags */
27 	u32 flags;
28 
29 	/** @ring: submission ring state */
30 	struct {
31 		/** @size: size of submission ring */
32 		u32 size;
33 		/** @tail: tail of submission ring */
34 		u32 tail;
35 		/** @old_tail: shadow of tail */
36 		u32 old_tail;
37 	} ring;
38 
39 	/** @desc: LRC descriptor */
40 	u64 desc;
41 
42 	/** @fence_ctx: context for hw fence */
43 	struct xe_hw_fence_ctx fence_ctx;
44 };
45 
46 #endif
47