xref: /linux/drivers/gpu/drm/xe/xe_guc_pc_types.h (revision 6dfafbd0299a60bfb5d5e277fdf100037c7ded07)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #ifndef _XE_GUC_PC_TYPES_H_
7 #define _XE_GUC_PC_TYPES_H_
8 
9 #include <linux/mutex.h>
10 #include <linux/types.h>
11 
12 /**
13  * struct xe_guc_pc - GuC Power Conservation (PC)
14  */
15 struct xe_guc_pc {
16 	/** @bo: GGTT buffer object that is shared with GuC PC */
17 	struct xe_bo *bo;
18 	/** @flush_freq_limit: 1 when max freq changes are limited by driver */
19 	atomic_t flush_freq_limit;
20 	/** @rp0_freq: HW RP0 frequency - The Maximum one */
21 	u32 rp0_freq;
22 	/** @rpn_freq: HW RPN frequency - The Minimum one */
23 	u32 rpn_freq;
24 	/** @user_requested_min: Stash the minimum requested freq by user */
25 	u32 user_requested_min;
26 	/** @user_requested_max: Stash the maximum requested freq by user */
27 	u32 user_requested_max;
28 	/** @stashed_min_freq: Stash the current minimum freq */
29 	u32 stashed_min_freq;
30 	/** @stashed_max_freq: Stash the current maximum freq */
31 	u32 stashed_max_freq;
32 	/** @freq_lock: Let's protect the frequencies */
33 	struct mutex freq_lock;
34 	/** @freq_ready: Only handle freq changes, if they are really ready */
35 	bool freq_ready;
36 	/** @power_profile: Base or power_saving profile */
37 	u32 power_profile;
38 };
39 
40 #endif	/* _XE_GUC_PC_TYPES_H_ */
41