1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2022 Intel Corporation
4 */
5
6 #ifndef _XE_GT_TOPOLOGY_H_
7 #define _XE_GT_TOPOLOGY_H_
8
9 #include "xe_gt_types.h"
10
11 /*
12 * Loop over each DSS with the bit is 1 in geometry or compute mask
13 * @dss: iterated DSS bit from the DSS mask
14 * @gt: GT structure
15 */
16 #define for_each_dss(dss, gt) \
17 for_each_or_bit((dss), \
18 (gt)->fuse_topo.g_dss_mask, \
19 (gt)->fuse_topo.c_dss_mask, \
20 XE_MAX_DSS_FUSE_BITS)
21
22 struct drm_printer;
23
24 void xe_gt_topology_init(struct xe_gt *gt);
25
26 void xe_gt_topology_dump(struct xe_gt *gt, struct drm_printer *p);
27
28 /**
29 * xe_gt_topology_mask_last_dss() - Returns the index of the last DSS in a mask.
30 * @mask: Input DSS mask
31 *
32 * Return: Index of the last DSS in the input DSS mask,
33 * XE_MAX_DSS_FUSE_BITS if DSS mask is empty.
34 */
35 static inline unsigned int
xe_gt_topology_mask_last_dss(const xe_dss_mask_t mask)36 xe_gt_topology_mask_last_dss(const xe_dss_mask_t mask)
37 {
38 return find_last_bit(mask, XE_MAX_DSS_FUSE_BITS);
39 }
40
41 unsigned int
42 xe_dss_mask_group_ffs(const xe_dss_mask_t mask, int groupsize, int groupnum);
43
44 bool xe_dss_mask_empty(const xe_dss_mask_t mask);
45
46 bool
47 xe_gt_topology_has_dss_in_quadrant(struct xe_gt *gt, int quad);
48
49 bool xe_gt_has_geometry_dss(struct xe_gt *gt, unsigned int dss);
50 bool xe_gt_has_compute_dss(struct xe_gt *gt, unsigned int dss);
51
52 #endif /* _XE_GT_TOPOLOGY_H_ */
53