1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #ifndef _XE_GGTT_TYPES_H_ 7 #define _XE_GGTT_TYPES_H_ 8 9 #include <drm/drm_mm.h> 10 11 #include "xe_pt_types.h" 12 13 struct xe_bo; 14 struct xe_ggtt_node; 15 struct xe_gt; 16 17 /** 18 * struct xe_ggtt - Main GGTT struct 19 * 20 * In general, each tile can contains its own Global Graphics Translation Table 21 * (GGTT) instance. 22 */ 23 struct xe_ggtt { 24 /** @tile: Back pointer to tile where this GGTT belongs */ 25 struct xe_tile *tile; 26 /** @start: Start offset of GGTT */ 27 u64 start; 28 /** @size: Total usable size of this GGTT */ 29 u64 size; 30 31 #define XE_GGTT_FLAGS_64K BIT(0) 32 #define XE_GGTT_FLAGS_ONLINE BIT(1) 33 /** 34 * @flags: Flags for this GGTT 35 * Acceptable flags: 36 * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K. 37 * - %XE_GGTT_FLAGS_ONLINE - is GGTT online, protected by ggtt->lock 38 * after init 39 */ 40 unsigned int flags; 41 /** @scratch: Internal object allocation used as a scratch page */ 42 struct xe_bo *scratch; 43 /** @lock: Mutex lock to protect GGTT data */ 44 struct mutex lock; 45 /** 46 * @gsm: The iomem pointer to the actual location of the translation 47 * table located in the GSM for easy PTE manipulation 48 */ 49 u64 __iomem *gsm; 50 /** @pt_ops: Page Table operations per platform */ 51 const struct xe_ggtt_pt_ops *pt_ops; 52 /** @mm: The memory manager used to manage individual GGTT allocations */ 53 struct drm_mm mm; 54 /** @access_count: counts GGTT writes */ 55 unsigned int access_count; 56 /** @wq: Dedicated unordered work queue to process node removals */ 57 struct workqueue_struct *wq; 58 }; 59 60 typedef void (*xe_ggtt_set_pte_fn)(struct xe_ggtt *ggtt, u64 addr, u64 pte); 61 typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt, 62 struct xe_ggtt_node *node, 63 u64 pte_flags, 64 xe_ggtt_set_pte_fn set_pte, void *arg); 65 /** 66 * struct xe_ggtt_pt_ops - GGTT Page table operations 67 * Which can vary from platform to platform. 68 */ 69 struct xe_ggtt_pt_ops { 70 /** @pte_encode_flags: Encode PTE flags for a given BO */ 71 u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index); 72 73 /** @ggtt_set_pte: Directly write into GGTT's PTE */ 74 xe_ggtt_set_pte_fn ggtt_set_pte; 75 76 /** @ggtt_get_pte: Directly read from GGTT's PTE */ 77 u64 (*ggtt_get_pte)(struct xe_ggtt *ggtt, u64 addr); 78 }; 79 80 #endif 81