1 /* 2 * Copyright (c) 2019 Red Hat, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2 or later, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 17 #ifndef HW_I386_X86_H 18 #define HW_I386_X86_H 19 20 #include "exec/hwaddr.h" 21 #include "system/memory.h" 22 23 #include "hw/boards.h" 24 #include "hw/i386/topology.h" 25 #include "hw/intc/ioapic.h" 26 #include "hw/isa/isa.h" 27 #include "qom/object.h" 28 29 struct X86MachineClass { 30 MachineClass parent; 31 32 /* use DMA capable linuxboot option rom */ 33 bool fwcfg_dma_enabled; 34 /* CPU and apic information: */ 35 bool apic_xrupt_override; 36 }; 37 38 struct X86MachineState { 39 /*< private >*/ 40 MachineState parent; 41 42 /*< public >*/ 43 44 /* Pointers to devices and objects: */ 45 ISADevice *rtc; 46 FWCfgState *fw_cfg; 47 qemu_irq *gsi; 48 DeviceState *ioapic2; 49 GMappedFile *initrd_mapped_file; 50 HotplugHandler *acpi_dev; 51 52 /* 53 * Map the whole BIOS just underneath the 4 GiB address boundary. Only used 54 * in the ROM (-bios) case. 55 */ 56 MemoryRegion bios; 57 58 /* 59 * Map the upper 128 KiB of the BIOS just underneath the 1 MiB address 60 * boundary. 61 */ 62 MemoryRegion isa_bios; 63 64 /* RAM information (sizes, addresses, configuration): */ 65 ram_addr_t below_4g_mem_size, above_4g_mem_size; 66 67 /* Start address of the initial RAM above 4G */ 68 uint64_t above_4g_mem_start; 69 70 /* CPU and apic information: */ 71 unsigned pci_irq_mask; 72 unsigned apic_id_limit; 73 uint16_t boot_cpus; 74 SgxEPCList *sgx_epc_list; 75 76 OnOffAuto smm; 77 OnOffAuto acpi; 78 OnOffAuto pit; 79 OnOffAuto pic; 80 81 char *oem_id; 82 char *oem_table_id; 83 /* 84 * Address space used by IOAPIC device. All IOAPIC interrupts 85 * will be translated to MSI messages in the address space. 86 */ 87 AddressSpace *ioapic_as; 88 89 /* 90 * Ratelimit enforced on detected bus locks in guest. 91 * The default value of the bus_lock_ratelimit is 0 per second, 92 * which means no limitation on the guest's bus locks. 93 */ 94 uint64_t bus_lock_ratelimit; 95 }; 96 97 #define X86_MACHINE_SMM "smm" 98 #define X86_MACHINE_ACPI "acpi" 99 #define X86_MACHINE_PIT "pit" 100 #define X86_MACHINE_PIC "pic" 101 #define X86_MACHINE_OEM_ID "x-oem-id" 102 #define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id" 103 #define X86_MACHINE_BUS_LOCK_RATELIMIT "bus-lock-ratelimit" 104 105 #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") 106 OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE) 107 108 void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms); 109 uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, 110 unsigned int cpu_index); 111 112 void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); 113 void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count); 114 void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, 115 DeviceState *dev, Error **errp); 116 void x86_cpu_plug(HotplugHandler *hotplug_dev, 117 DeviceState *dev, Error **errp); 118 void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, 119 DeviceState *dev, Error **errp); 120 void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, 121 DeviceState *dev, Error **errp); 122 123 void x86_isa_bios_init(MemoryRegion *isa_bios, MemoryRegion *isa_memory, 124 MemoryRegion *bios, bool read_only); 125 void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, 126 MemoryRegion *rom_memory, bool isapc_ram_fw); 127 128 void x86_load_linux(X86MachineState *x86ms, 129 FWCfgState *fw_cfg, 130 int acpi_data_size, 131 bool pvh_enabled); 132 133 bool x86_machine_is_smm_enabled(const X86MachineState *x86ms); 134 bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms); 135 136 /* Global System Interrupts */ 137 138 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) 139 140 typedef struct GSIState { 141 qemu_irq i8259_irq[ISA_NUM_IRQS]; 142 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 143 qemu_irq ioapic2_irq[IOAPIC_NUM_PINS]; 144 } GSIState; 145 146 qemu_irq x86_allocate_cpu_irq(void); 147 void gsi_handler(void *opaque, int n, int level); 148 void ioapic_init_gsi(GSIState *gsi_state, Object *parent); 149 DeviceState *ioapic_init_secondary(GSIState *gsi_state); 150 151 /* pc_sysfw.c */ 152 void x86_firmware_configure(hwaddr gpa, void *ptr, int size); 153 154 #endif 155