1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/mfd/max77620.h> 3 4#include "tegra210.dtsi" 5 6/ { 7 model = "NVIDIA Jetson TX1"; 8 compatible = "nvidia,p2180", "nvidia,tegra210"; 9 10 aliases { 11 rtc0 = "/i2c@7000d000/pmic@3c"; 12 rtc1 = "/rtc@7000e000"; 13 serial0 = &uarta; 14 }; 15 16 chosen { 17 stdout-path = "serial0:115200n8"; 18 }; 19 20 memory@80000000 { 21 device_type = "memory"; 22 reg = <0x0 0x80000000 0x1 0x0>; 23 }; 24 25 gpu@57000000 { 26 vdd-supply = <&vdd_gpu>; 27 }; 28 29 /* debug port */ 30 serial@70006000 { 31 /delete-property/ dmas; 32 /delete-property/ dma-names; 33 status = "okay"; 34 }; 35 36 serial@70006300 { 37 /delete-property/ reg-shift; 38 status = "okay"; 39 compatible = "nvidia,tegra30-hsuart"; 40 reset-names = "serial"; 41 42 bluetooth { 43 compatible = "brcm,bcm43540-bt"; 44 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 45 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; 46 interrupt-parent = <&gpio>; 47 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; 48 interrupt-names = "host-wakeup"; 49 }; 50 }; 51 52 i2c@7000c000 { 53 status = "okay"; 54 55 tmp451: temperature-sensor@4c { 56 compatible = "ti,tmp451"; 57 reg = <0x4c>; 58 interrupt-parent = <&gpio>; 59 interrupts = <TEGRA_GPIO(X, 4) IRQ_TYPE_LEVEL_LOW>; 60 vcc-supply = <&vdd_1v8>; 61 #thermal-sensor-cells = <1>; 62 }; 63 }; 64 65 i2c@7000c400 { 66 status = "okay"; 67 68 power-sensor@40 { 69 compatible = "ti,ina3221"; 70 reg = <0x40>; 71 #address-cells = <1>; 72 #size-cells = <0>; 73 74 input@0 { 75 reg = <0x0>; 76 label = "VDD_IN"; 77 shunt-resistor-micro-ohms = <20000>; 78 }; 79 80 input@1 { 81 reg = <0x1>; 82 label = "VDD_GPU"; 83 shunt-resistor-micro-ohms = <10000>; 84 }; 85 86 input@2 { 87 reg = <0x2>; 88 label = "VDD_CPU"; 89 shunt-resistor-micro-ohms = <10000>; 90 }; 91 }; 92 }; 93 94 i2c@7000c500 { 95 status = "okay"; 96 97 /* module ID EEPROM */ 98 eeprom@50 { 99 compatible = "atmel,24c02"; 100 reg = <0x50>; 101 102 label = "module"; 103 vcc-supply = <&vdd_1v8>; 104 address-width = <8>; 105 pagesize = <8>; 106 size = <256>; 107 read-only; 108 }; 109 }; 110 111 i2c@7000d000 { 112 status = "okay"; 113 clock-frequency = <400000>; 114 115 pmic: pmic@3c { 116 compatible = "maxim,max77620"; 117 reg = <0x3c>; 118 interrupt-parent = <&tegra_pmc>; 119 interrupts = <51 IRQ_TYPE_LEVEL_LOW>; 120 121 #interrupt-cells = <2>; 122 interrupt-controller; 123 124 #gpio-cells = <2>; 125 gpio-controller; 126 127 pinctrl-names = "default"; 128 pinctrl-0 = <&max77620_default>; 129 130 fps { 131 fps0 { 132 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 133 maxim,suspend-fps-time-period-us = <1280>; 134 }; 135 136 fps1 { 137 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 138 maxim,suspend-fps-time-period-us = <1280>; 139 }; 140 141 fps2 { 142 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 143 }; 144 }; 145 146 max77620_default: pinmux { 147 gpio0 { 148 pins = "gpio0"; 149 function = "gpio"; 150 }; 151 152 gpio1 { 153 pins = "gpio1"; 154 function = "fps-out"; 155 drive-push-pull = <1>; 156 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 157 maxim,active-fps-power-up-slot = <7>; 158 maxim,active-fps-power-down-slot = <0>; 159 }; 160 161 gpio2_3 { 162 pins = "gpio2", "gpio3"; 163 function = "fps-out"; 164 drive-open-drain = <1>; 165 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 166 }; 167 168 gpio4 { 169 pins = "gpio4"; 170 function = "32k-out1"; 171 }; 172 173 gpio5_6_7 { 174 pins = "gpio5", "gpio6", "gpio7"; 175 function = "gpio"; 176 drive-push-pull = <1>; 177 }; 178 }; 179 180 regulators { 181 in-ldo0-1-supply = <&vdd_pre>; 182 in-ldo7-8-supply = <&vdd_pre>; 183 in-sd3-supply = <&vdd_5v0_sys>; 184 185 vdd_soc: sd0 { 186 regulator-name = "VDD_SOC"; 187 regulator-min-microvolt = <600000>; 188 regulator-max-microvolt = <1400000>; 189 regulator-always-on; 190 regulator-boot-on; 191 192 regulator-enable-ramp-delay = <146>; 193 regulator-ramp-delay = <27500>; 194 195 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 196 }; 197 198 vdd_ddr: sd1 { 199 regulator-name = "VDD_DDR_1V1_PMIC"; 200 regulator-always-on; 201 regulator-boot-on; 202 203 regulator-enable-ramp-delay = <130>; 204 regulator-ramp-delay = <27500>; 205 206 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 207 }; 208 209 vdd_pre: sd2 { 210 regulator-name = "VDD_PRE_REG_1V35"; 211 regulator-min-microvolt = <1350000>; 212 regulator-max-microvolt = <1350000>; 213 214 regulator-enable-ramp-delay = <176>; 215 regulator-ramp-delay = <27500>; 216 217 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 218 }; 219 220 vdd_1v8: sd3 { 221 regulator-name = "VDD_1V8"; 222 regulator-min-microvolt = <1800000>; 223 regulator-max-microvolt = <1800000>; 224 regulator-always-on; 225 regulator-boot-on; 226 227 regulator-enable-ramp-delay = <242>; 228 regulator-ramp-delay = <27500>; 229 230 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 231 }; 232 233 vdd_sys_1v2: ldo0 { 234 regulator-name = "AVDD_SYS_1V2"; 235 regulator-min-microvolt = <1200000>; 236 regulator-max-microvolt = <1200000>; 237 regulator-always-on; 238 regulator-boot-on; 239 240 regulator-enable-ramp-delay = <26>; 241 regulator-ramp-delay = <100000>; 242 243 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 244 }; 245 246 vdd_pex_1v05: ldo1 { 247 regulator-name = "VDD_PEX_1V05"; 248 regulator-min-microvolt = <1050000>; 249 regulator-max-microvolt = <1050000>; 250 251 regulator-enable-ramp-delay = <22>; 252 regulator-ramp-delay = <100000>; 253 254 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 255 }; 256 257 vddio_sdmmc: ldo2 { 258 regulator-name = "VDDIO_SDMMC"; 259 regulator-min-microvolt = <1800000>; 260 regulator-max-microvolt = <3300000>; 261 regulator-always-on; 262 regulator-boot-on; 263 264 regulator-enable-ramp-delay = <62>; 265 regulator-ramp-delay = <100000>; 266 267 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 268 }; 269 270 vdd_cam_hv: ldo3 { 271 regulator-name = "VDD_CAM_HV"; 272 regulator-min-microvolt = <2800000>; 273 regulator-max-microvolt = <2800000>; 274 275 regulator-enable-ramp-delay = <50>; 276 regulator-ramp-delay = <100000>; 277 278 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 279 }; 280 281 vdd_rtc: ldo4 { 282 regulator-name = "VDD_RTC"; 283 regulator-min-microvolt = <850000>; 284 regulator-max-microvolt = <850000>; 285 regulator-always-on; 286 regulator-boot-on; 287 288 regulator-enable-ramp-delay = <22>; 289 regulator-ramp-delay = <100000>; 290 291 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 292 }; 293 294 vdd_ts_hv: ldo5 { 295 regulator-name = "VDD_TS_HV"; 296 regulator-min-microvolt = <3300000>; 297 regulator-max-microvolt = <3300000>; 298 299 regulator-enable-ramp-delay = <62>; 300 regulator-ramp-delay = <100000>; 301 302 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 303 }; 304 305 vdd_ts: ldo6 { 306 regulator-name = "VDD_TS_1V8"; 307 regulator-min-microvolt = <1800000>; 308 regulator-max-microvolt = <1800000>; 309 310 regulator-enable-ramp-delay = <36>; 311 regulator-ramp-delay = <100000>; 312 313 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 314 maxim,active-fps-power-up-slot = <7>; 315 maxim,active-fps-power-down-slot = <0>; 316 }; 317 318 avdd_1v05_pll: ldo7 { 319 regulator-name = "AVDD_1V05_PLL"; 320 regulator-min-microvolt = <1050000>; 321 regulator-max-microvolt = <1050000>; 322 regulator-always-on; 323 regulator-boot-on; 324 325 regulator-enable-ramp-delay = <24>; 326 regulator-ramp-delay = <100000>; 327 328 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 329 }; 330 331 avdd_1v05: ldo8 { 332 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 333 regulator-min-microvolt = <1050000>; 334 regulator-max-microvolt = <1050000>; 335 336 regulator-enable-ramp-delay = <22>; 337 regulator-ramp-delay = <100000>; 338 339 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 340 }; 341 }; 342 }; 343 }; 344 345 pmc@7000e400 { 346 nvidia,invert-interrupt; 347 nvidia,suspend-mode = <0>; 348 nvidia,cpu-pwr-good-time = <0>; 349 nvidia,cpu-pwr-off-time = <0>; 350 nvidia,core-pwr-good-time = <4587 3876>; 351 nvidia,core-pwr-off-time = <39065>; 352 nvidia,core-power-req-active-high; 353 nvidia,sys-clock-req-active-high; 354 }; 355 356 mmc@700b0200 { 357 status = "okay"; 358 bus-width = <4>; 359 non-removable; 360 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 361 vqmmc-supply = <&vdd_1v8>; 362 vmmc-supply = <&vdd_3v3_sys>; 363 #address-cells = <1>; 364 #size-cells = <0>; 365 366 wifi@1 { 367 compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac"; 368 reg = <1>; 369 interrupt-parent = <&gpio>; 370 interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; 371 interrupt-names = "host-wake"; 372 }; 373 }; 374 375 /* eMMC */ 376 mmc@700b0600 { 377 status = "okay"; 378 bus-width = <8>; 379 non-removable; 380 vqmmc-supply = <&vdd_1v8>; 381 }; 382 383 clk32k_in: clock-32k { 384 compatible = "fixed-clock"; 385 clock-frequency = <32768>; 386 #clock-cells = <0>; 387 }; 388 389 cpus { 390 cpu@0 { 391 enable-method = "psci"; 392 }; 393 394 cpu@1 { 395 enable-method = "psci"; 396 }; 397 398 cpu@2 { 399 enable-method = "psci"; 400 }; 401 402 cpu@3 { 403 enable-method = "psci"; 404 }; 405 406 idle-states { 407 cpu-sleep { 408 status = "okay"; 409 }; 410 }; 411 }; 412 413 psci { 414 compatible = "arm,psci-0.2"; 415 method = "smc"; 416 }; 417 418 vdd_gpu: regulator-vdd-gpu { 419 compatible = "pwm-regulator"; 420 pwms = <&pwm 1 8000>; 421 regulator-name = "VDD_GPU"; 422 regulator-min-microvolt = <710000>; 423 regulator-max-microvolt = <1320000>; 424 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; 425 regulator-ramp-delay = <80>; 426 regulator-enable-ramp-delay = <2000>; 427 regulator-settling-time-us = <160>; 428 }; 429}; 430