1 /*
2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
3 *
4 * Copyright (C) 2005 James Chapman (ds1337 core)
5 * Copyright (C) 2006 David Brownell
6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/slab.h>
16 #include <linux/i2c.h>
17 #include <linux/string.h>
18 #include <linux/rtc.h>
19 #include <linux/bcd.h>
20
21
22
23 /* We can't determine type by probing, but if we expect pre-Linux code
24 * to have set the chip up as a clock (turning on the oscillator and
25 * setting the date and time), Linux can ignore the non-clock features.
26 * That's a natural job for a factory or repair bench.
27 */
28 enum ds_type {
29 ds_1307,
30 ds_1337,
31 ds_1338,
32 ds_1339,
33 ds_1340,
34 ds_1388,
35 ds_3231,
36 m41t00,
37 mcp7941x,
38 rx_8025,
39 // rs5c372 too? different address...
40 };
41
42
43 /* RTC registers don't differ much, except for the century flag */
44 #define DS1307_REG_SECS 0x00 /* 00-59 */
45 # define DS1307_BIT_CH 0x80
46 # define DS1340_BIT_nEOSC 0x80
47 # define MCP7941X_BIT_ST 0x80
48 #define DS1307_REG_MIN 0x01 /* 00-59 */
49 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
50 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
51 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
52 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
53 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
54 #define DS1307_REG_WDAY 0x03 /* 01-07 */
55 # define MCP7941X_BIT_VBATEN 0x08
56 #define DS1307_REG_MDAY 0x04 /* 01-31 */
57 #define DS1307_REG_MONTH 0x05 /* 01-12 */
58 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
59 #define DS1307_REG_YEAR 0x06 /* 00-99 */
60
61 /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
62 * start at 7, and they differ a LOT. Only control and status matter for
63 * basic RTC date and time functionality; be careful using them.
64 */
65 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
66 # define DS1307_BIT_OUT 0x80
67 # define DS1338_BIT_OSF 0x20
68 # define DS1307_BIT_SQWE 0x10
69 # define DS1307_BIT_RS1 0x02
70 # define DS1307_BIT_RS0 0x01
71 #define DS1337_REG_CONTROL 0x0e
72 # define DS1337_BIT_nEOSC 0x80
73 # define DS1339_BIT_BBSQI 0x20
74 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
75 # define DS1337_BIT_RS2 0x10
76 # define DS1337_BIT_RS1 0x08
77 # define DS1337_BIT_INTCN 0x04
78 # define DS1337_BIT_A2IE 0x02
79 # define DS1337_BIT_A1IE 0x01
80 #define DS1340_REG_CONTROL 0x07
81 # define DS1340_BIT_OUT 0x80
82 # define DS1340_BIT_FT 0x40
83 # define DS1340_BIT_CALIB_SIGN 0x20
84 # define DS1340_M_CALIBRATION 0x1f
85 #define DS1340_REG_FLAG 0x09
86 # define DS1340_BIT_OSF 0x80
87 #define DS1337_REG_STATUS 0x0f
88 # define DS1337_BIT_OSF 0x80
89 # define DS1337_BIT_A2I 0x02
90 # define DS1337_BIT_A1I 0x01
91 #define DS1339_REG_ALARM1_SECS 0x07
92 #define DS1339_REG_TRICKLE 0x10
93
94 #define RX8025_REG_CTRL1 0x0e
95 # define RX8025_BIT_2412 0x20
96 #define RX8025_REG_CTRL2 0x0f
97 # define RX8025_BIT_PON 0x10
98 # define RX8025_BIT_VDET 0x40
99 # define RX8025_BIT_XST 0x20
100
101
102 struct ds1307 {
103 u8 offset; /* register's offset */
104 u8 regs[11];
105 enum ds_type type;
106 unsigned long flags;
107 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
108 #define HAS_ALARM 1 /* bit 1 == irq claimed */
109 struct i2c_client *client;
110 struct rtc_device *rtc;
111 struct work_struct work;
112 s32 (*read_block_data)(const struct i2c_client *client, u8 command,
113 u8 length, u8 *values);
114 s32 (*write_block_data)(const struct i2c_client *client, u8 command,
115 u8 length, const u8 *values);
116 };
117
118 struct chip_desc {
119 unsigned nvram56:1;
120 unsigned alarm:1;
121 };
122
123 static const struct chip_desc chips[] = {
124 [ds_1307] = {
125 .nvram56 = 1,
126 },
127 [ds_1337] = {
128 .alarm = 1,
129 },
130 [ds_1338] = {
131 .nvram56 = 1,
132 },
133 [ds_1339] = {
134 .alarm = 1,
135 },
136 [ds_1340] = {
137 },
138 [ds_3231] = {
139 .alarm = 1,
140 },
141 [m41t00] = {
142 },
143 [mcp7941x] = {
144 },
145 [rx_8025] = {
146 }, };
147
148 static const struct i2c_device_id ds1307_id[] = {
149 { "ds1307", ds_1307 },
150 { "ds1337", ds_1337 },
151 { "ds1338", ds_1338 },
152 { "ds1339", ds_1339 },
153 { "ds1388", ds_1388 },
154 { "ds1340", ds_1340 },
155 { "ds3231", ds_3231 },
156 { "m41t00", m41t00 },
157 { "mcp7941x", mcp7941x },
158 { "pt7c4338", ds_1307 },
159 { "rx8025", rx_8025 },
160 { }
161 };
162 MODULE_DEVICE_TABLE(i2c, ds1307_id);
163
164 /*----------------------------------------------------------------------*/
165
166 #define BLOCK_DATA_MAX_TRIES 10
167
ds1307_read_block_data_once(const struct i2c_client * client,u8 command,u8 length,u8 * values)168 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
169 u8 command, u8 length, u8 *values)
170 {
171 s32 i, data;
172
173 for (i = 0; i < length; i++) {
174 data = i2c_smbus_read_byte_data(client, command + i);
175 if (data < 0)
176 return data;
177 values[i] = data;
178 }
179 return i;
180 }
181
ds1307_read_block_data(const struct i2c_client * client,u8 command,u8 length,u8 * values)182 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
183 u8 length, u8 *values)
184 {
185 u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
186 s32 ret;
187 int tries = 0;
188
189 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
190 ret = ds1307_read_block_data_once(client, command, length, values);
191 if (ret < 0)
192 return ret;
193 do {
194 if (++tries > BLOCK_DATA_MAX_TRIES) {
195 dev_err(&client->dev,
196 "ds1307_read_block_data failed\n");
197 return -EIO;
198 }
199 memcpy(oldvalues, values, length);
200 ret = ds1307_read_block_data_once(client, command, length,
201 values);
202 if (ret < 0)
203 return ret;
204 } while (memcmp(oldvalues, values, length));
205 return length;
206 }
207
ds1307_write_block_data(const struct i2c_client * client,u8 command,u8 length,const u8 * values)208 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
209 u8 length, const u8 *values)
210 {
211 u8 currvalues[I2C_SMBUS_BLOCK_MAX];
212 int tries = 0;
213
214 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
215 do {
216 s32 i, ret;
217
218 if (++tries > BLOCK_DATA_MAX_TRIES) {
219 dev_err(&client->dev,
220 "ds1307_write_block_data failed\n");
221 return -EIO;
222 }
223 for (i = 0; i < length; i++) {
224 ret = i2c_smbus_write_byte_data(client, command + i,
225 values[i]);
226 if (ret < 0)
227 return ret;
228 }
229 ret = ds1307_read_block_data_once(client, command, length,
230 currvalues);
231 if (ret < 0)
232 return ret;
233 } while (memcmp(currvalues, values, length));
234 return length;
235 }
236
237 /*----------------------------------------------------------------------*/
238
239 /*
240 * The IRQ logic includes a "real" handler running in IRQ context just
241 * long enough to schedule this workqueue entry. We need a task context
242 * to talk to the RTC, since I2C I/O calls require that; and disable the
243 * IRQ until we clear its status on the chip, so that this handler can
244 * work with any type of triggering (not just falling edge).
245 *
246 * The ds1337 and ds1339 both have two alarms, but we only use the first
247 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
248 * signal; ds1339 chips have only one alarm signal.
249 */
ds1307_work(struct work_struct * work)250 static void ds1307_work(struct work_struct *work)
251 {
252 struct ds1307 *ds1307;
253 struct i2c_client *client;
254 struct mutex *lock;
255 int stat, control;
256
257 ds1307 = container_of(work, struct ds1307, work);
258 client = ds1307->client;
259 lock = &ds1307->rtc->ops_lock;
260
261 mutex_lock(lock);
262 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
263 if (stat < 0)
264 goto out;
265
266 if (stat & DS1337_BIT_A1I) {
267 stat &= ~DS1337_BIT_A1I;
268 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
269
270 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
271 if (control < 0)
272 goto out;
273
274 control &= ~DS1337_BIT_A1IE;
275 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
276
277 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
278 }
279
280 out:
281 if (test_bit(HAS_ALARM, &ds1307->flags))
282 enable_irq(client->irq);
283 mutex_unlock(lock);
284 }
285
ds1307_irq(int irq,void * dev_id)286 static irqreturn_t ds1307_irq(int irq, void *dev_id)
287 {
288 struct i2c_client *client = dev_id;
289 struct ds1307 *ds1307 = i2c_get_clientdata(client);
290
291 disable_irq_nosync(irq);
292 schedule_work(&ds1307->work);
293 return IRQ_HANDLED;
294 }
295
296 /*----------------------------------------------------------------------*/
297
ds1307_get_time(struct device * dev,struct rtc_time * t)298 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
299 {
300 struct ds1307 *ds1307 = dev_get_drvdata(dev);
301 int tmp;
302
303 /* read the RTC date and time registers all at once */
304 tmp = ds1307->read_block_data(ds1307->client,
305 ds1307->offset, 7, ds1307->regs);
306 if (tmp != 7) {
307 dev_err(dev, "%s error %d\n", "read", tmp);
308 return -EIO;
309 }
310
311 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
312 "read",
313 ds1307->regs[0], ds1307->regs[1],
314 ds1307->regs[2], ds1307->regs[3],
315 ds1307->regs[4], ds1307->regs[5],
316 ds1307->regs[6]);
317
318 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
319 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
320 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
321 t->tm_hour = bcd2bin(tmp);
322 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
323 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
324 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
325 t->tm_mon = bcd2bin(tmp) - 1;
326
327 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
328 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
329
330 dev_dbg(dev, "%s secs=%d, mins=%d, "
331 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
332 "read", t->tm_sec, t->tm_min,
333 t->tm_hour, t->tm_mday,
334 t->tm_mon, t->tm_year, t->tm_wday);
335
336 /* initial clock setting can be undefined */
337 return rtc_valid_tm(t);
338 }
339
ds1307_set_time(struct device * dev,struct rtc_time * t)340 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
341 {
342 struct ds1307 *ds1307 = dev_get_drvdata(dev);
343 int result;
344 int tmp;
345 u8 *buf = ds1307->regs;
346
347 dev_dbg(dev, "%s secs=%d, mins=%d, "
348 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
349 "write", t->tm_sec, t->tm_min,
350 t->tm_hour, t->tm_mday,
351 t->tm_mon, t->tm_year, t->tm_wday);
352
353 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
354 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
355 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
356 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
357 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
358 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
359
360 /* assume 20YY not 19YY */
361 tmp = t->tm_year - 100;
362 buf[DS1307_REG_YEAR] = bin2bcd(tmp);
363
364 switch (ds1307->type) {
365 case ds_1337:
366 case ds_1339:
367 case ds_3231:
368 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
369 break;
370 case ds_1340:
371 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
372 | DS1340_BIT_CENTURY;
373 break;
374 case mcp7941x:
375 buf[DS1307_REG_SECS] |= MCP7941X_BIT_ST;
376 buf[DS1307_REG_WDAY] |= MCP7941X_BIT_VBATEN;
377 break;
378 default:
379 break;
380 }
381
382 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
383 "write", buf[0], buf[1], buf[2], buf[3],
384 buf[4], buf[5], buf[6]);
385
386 result = ds1307->write_block_data(ds1307->client,
387 ds1307->offset, 7, buf);
388 if (result < 0) {
389 dev_err(dev, "%s error %d\n", "write", result);
390 return result;
391 }
392 return 0;
393 }
394
ds1337_read_alarm(struct device * dev,struct rtc_wkalrm * t)395 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
396 {
397 struct i2c_client *client = to_i2c_client(dev);
398 struct ds1307 *ds1307 = i2c_get_clientdata(client);
399 int ret;
400
401 if (!test_bit(HAS_ALARM, &ds1307->flags))
402 return -EINVAL;
403
404 /* read all ALARM1, ALARM2, and status registers at once */
405 ret = ds1307->read_block_data(client,
406 DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
407 if (ret != 9) {
408 dev_err(dev, "%s error %d\n", "alarm read", ret);
409 return -EIO;
410 }
411
412 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
413 "alarm read",
414 ds1307->regs[0], ds1307->regs[1],
415 ds1307->regs[2], ds1307->regs[3],
416 ds1307->regs[4], ds1307->regs[5],
417 ds1307->regs[6], ds1307->regs[7],
418 ds1307->regs[8]);
419
420 /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
421 * and that all four fields are checked matches
422 */
423 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
424 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
425 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
426 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
427 t->time.tm_mon = -1;
428 t->time.tm_year = -1;
429 t->time.tm_wday = -1;
430 t->time.tm_yday = -1;
431 t->time.tm_isdst = -1;
432
433 /* ... and status */
434 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
435 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
436
437 dev_dbg(dev, "%s secs=%d, mins=%d, "
438 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
439 "alarm read", t->time.tm_sec, t->time.tm_min,
440 t->time.tm_hour, t->time.tm_mday,
441 t->enabled, t->pending);
442
443 return 0;
444 }
445
ds1337_set_alarm(struct device * dev,struct rtc_wkalrm * t)446 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
447 {
448 struct i2c_client *client = to_i2c_client(dev);
449 struct ds1307 *ds1307 = i2c_get_clientdata(client);
450 unsigned char *buf = ds1307->regs;
451 u8 control, status;
452 int ret;
453
454 if (!test_bit(HAS_ALARM, &ds1307->flags))
455 return -EINVAL;
456
457 dev_dbg(dev, "%s secs=%d, mins=%d, "
458 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
459 "alarm set", t->time.tm_sec, t->time.tm_min,
460 t->time.tm_hour, t->time.tm_mday,
461 t->enabled, t->pending);
462
463 /* read current status of both alarms and the chip */
464 ret = ds1307->read_block_data(client,
465 DS1339_REG_ALARM1_SECS, 9, buf);
466 if (ret != 9) {
467 dev_err(dev, "%s error %d\n", "alarm write", ret);
468 return -EIO;
469 }
470 control = ds1307->regs[7];
471 status = ds1307->regs[8];
472
473 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
474 "alarm set (old status)",
475 ds1307->regs[0], ds1307->regs[1],
476 ds1307->regs[2], ds1307->regs[3],
477 ds1307->regs[4], ds1307->regs[5],
478 ds1307->regs[6], control, status);
479
480 /* set ALARM1, using 24 hour and day-of-month modes */
481 buf[0] = bin2bcd(t->time.tm_sec);
482 buf[1] = bin2bcd(t->time.tm_min);
483 buf[2] = bin2bcd(t->time.tm_hour);
484 buf[3] = bin2bcd(t->time.tm_mday);
485
486 /* set ALARM2 to non-garbage */
487 buf[4] = 0;
488 buf[5] = 0;
489 buf[6] = 0;
490
491 /* optionally enable ALARM1 */
492 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
493 if (t->enabled) {
494 dev_dbg(dev, "alarm IRQ armed\n");
495 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
496 }
497 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
498
499 ret = ds1307->write_block_data(client,
500 DS1339_REG_ALARM1_SECS, 9, buf);
501 if (ret < 0) {
502 dev_err(dev, "can't set alarm time\n");
503 return ret;
504 }
505
506 return 0;
507 }
508
ds1307_alarm_irq_enable(struct device * dev,unsigned int enabled)509 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
510 {
511 struct i2c_client *client = to_i2c_client(dev);
512 struct ds1307 *ds1307 = i2c_get_clientdata(client);
513 int ret;
514
515 if (!test_bit(HAS_ALARM, &ds1307->flags))
516 return -ENOTTY;
517
518 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
519 if (ret < 0)
520 return ret;
521
522 if (enabled)
523 ret |= DS1337_BIT_A1IE;
524 else
525 ret &= ~DS1337_BIT_A1IE;
526
527 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
528 if (ret < 0)
529 return ret;
530
531 return 0;
532 }
533
534 static const struct rtc_class_ops ds13xx_rtc_ops = {
535 .read_time = ds1307_get_time,
536 .set_time = ds1307_set_time,
537 .read_alarm = ds1337_read_alarm,
538 .set_alarm = ds1337_set_alarm,
539 .alarm_irq_enable = ds1307_alarm_irq_enable,
540 };
541
542 /*----------------------------------------------------------------------*/
543
544 #define NVRAM_SIZE 56
545
546 static ssize_t
ds1307_nvram_read(struct file * filp,struct kobject * kobj,struct bin_attribute * attr,char * buf,loff_t off,size_t count)547 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
548 struct bin_attribute *attr,
549 char *buf, loff_t off, size_t count)
550 {
551 struct i2c_client *client;
552 struct ds1307 *ds1307;
553 int result;
554
555 client = kobj_to_i2c_client(kobj);
556 ds1307 = i2c_get_clientdata(client);
557
558 if (unlikely(off >= NVRAM_SIZE))
559 return 0;
560 if ((off + count) > NVRAM_SIZE)
561 count = NVRAM_SIZE - off;
562 if (unlikely(!count))
563 return count;
564
565 result = ds1307->read_block_data(client, 8 + off, count, buf);
566 if (result < 0)
567 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
568 return result;
569 }
570
571 static ssize_t
ds1307_nvram_write(struct file * filp,struct kobject * kobj,struct bin_attribute * attr,char * buf,loff_t off,size_t count)572 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
573 struct bin_attribute *attr,
574 char *buf, loff_t off, size_t count)
575 {
576 struct i2c_client *client;
577 struct ds1307 *ds1307;
578 int result;
579
580 client = kobj_to_i2c_client(kobj);
581 ds1307 = i2c_get_clientdata(client);
582
583 if (unlikely(off >= NVRAM_SIZE))
584 return -EFBIG;
585 if ((off + count) > NVRAM_SIZE)
586 count = NVRAM_SIZE - off;
587 if (unlikely(!count))
588 return count;
589
590 result = ds1307->write_block_data(client, 8 + off, count, buf);
591 if (result < 0) {
592 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
593 return result;
594 }
595 return count;
596 }
597
598 static struct bin_attribute nvram = {
599 .attr = {
600 .name = "nvram",
601 .mode = S_IRUGO | S_IWUSR,
602 },
603
604 .read = ds1307_nvram_read,
605 .write = ds1307_nvram_write,
606 .size = NVRAM_SIZE,
607 };
608
609 /*----------------------------------------------------------------------*/
610
611 static struct i2c_driver ds1307_driver;
612
ds1307_probe(struct i2c_client * client,const struct i2c_device_id * id)613 static int __devinit ds1307_probe(struct i2c_client *client,
614 const struct i2c_device_id *id)
615 {
616 struct ds1307 *ds1307;
617 int err = -ENODEV;
618 int tmp;
619 const struct chip_desc *chip = &chips[id->driver_data];
620 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
621 int want_irq = false;
622 unsigned char *buf;
623 static const int bbsqi_bitpos[] = {
624 [ds_1337] = 0,
625 [ds_1339] = DS1339_BIT_BBSQI,
626 [ds_3231] = DS3231_BIT_BBSQW,
627 };
628
629 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
630 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
631 return -EIO;
632
633 if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
634 return -ENOMEM;
635
636 i2c_set_clientdata(client, ds1307);
637
638 ds1307->client = client;
639 ds1307->type = id->driver_data;
640 ds1307->offset = 0;
641
642 buf = ds1307->regs;
643 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
644 ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
645 ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
646 } else {
647 ds1307->read_block_data = ds1307_read_block_data;
648 ds1307->write_block_data = ds1307_write_block_data;
649 }
650
651 switch (ds1307->type) {
652 case ds_1337:
653 case ds_1339:
654 case ds_3231:
655 /* has IRQ? */
656 if (ds1307->client->irq > 0 && chip->alarm) {
657 INIT_WORK(&ds1307->work, ds1307_work);
658 want_irq = true;
659 }
660 /* get registers that the "rtc" read below won't read... */
661 tmp = ds1307->read_block_data(ds1307->client,
662 DS1337_REG_CONTROL, 2, buf);
663 if (tmp != 2) {
664 pr_debug("read error %d\n", tmp);
665 err = -EIO;
666 goto exit_free;
667 }
668
669 /* oscillator off? turn it on, so clock can tick. */
670 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
671 ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
672
673 /* Using IRQ? Disable the square wave and both alarms.
674 * For some variants, be sure alarms can trigger when we're
675 * running on Vbackup (BBSQI/BBSQW)
676 */
677 if (want_irq) {
678 ds1307->regs[0] |= DS1337_BIT_INTCN
679 | bbsqi_bitpos[ds1307->type];
680 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
681 }
682
683 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
684 ds1307->regs[0]);
685
686 /* oscillator fault? clear flag, and warn */
687 if (ds1307->regs[1] & DS1337_BIT_OSF) {
688 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
689 ds1307->regs[1] & ~DS1337_BIT_OSF);
690 dev_warn(&client->dev, "SET TIME!\n");
691 }
692 break;
693
694 case rx_8025:
695 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
696 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
697 if (tmp != 2) {
698 pr_debug("read error %d\n", tmp);
699 err = -EIO;
700 goto exit_free;
701 }
702
703 /* oscillator off? turn it on, so clock can tick. */
704 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
705 ds1307->regs[1] |= RX8025_BIT_XST;
706 i2c_smbus_write_byte_data(client,
707 RX8025_REG_CTRL2 << 4 | 0x08,
708 ds1307->regs[1]);
709 dev_warn(&client->dev,
710 "oscillator stop detected - SET TIME!\n");
711 }
712
713 if (ds1307->regs[1] & RX8025_BIT_PON) {
714 ds1307->regs[1] &= ~RX8025_BIT_PON;
715 i2c_smbus_write_byte_data(client,
716 RX8025_REG_CTRL2 << 4 | 0x08,
717 ds1307->regs[1]);
718 dev_warn(&client->dev, "power-on detected\n");
719 }
720
721 if (ds1307->regs[1] & RX8025_BIT_VDET) {
722 ds1307->regs[1] &= ~RX8025_BIT_VDET;
723 i2c_smbus_write_byte_data(client,
724 RX8025_REG_CTRL2 << 4 | 0x08,
725 ds1307->regs[1]);
726 dev_warn(&client->dev, "voltage drop detected\n");
727 }
728
729 /* make sure we are running in 24hour mode */
730 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
731 u8 hour;
732
733 /* switch to 24 hour mode */
734 i2c_smbus_write_byte_data(client,
735 RX8025_REG_CTRL1 << 4 | 0x08,
736 ds1307->regs[0] |
737 RX8025_BIT_2412);
738
739 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
740 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
741 if (tmp != 2) {
742 pr_debug("read error %d\n", tmp);
743 err = -EIO;
744 goto exit_free;
745 }
746
747 /* correct hour */
748 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
749 if (hour == 12)
750 hour = 0;
751 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
752 hour += 12;
753
754 i2c_smbus_write_byte_data(client,
755 DS1307_REG_HOUR << 4 | 0x08,
756 hour);
757 }
758 break;
759 case ds_1388:
760 ds1307->offset = 1; /* Seconds starts at 1 */
761 break;
762 default:
763 break;
764 }
765
766 read_rtc:
767 /* read RTC registers */
768 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
769 if (tmp != 8) {
770 pr_debug("read error %d\n", tmp);
771 err = -EIO;
772 goto exit_free;
773 }
774
775 /* minimal sanity checking; some chips (like DS1340) don't
776 * specify the extra bits as must-be-zero, but there are
777 * still a few values that are clearly out-of-range.
778 */
779 tmp = ds1307->regs[DS1307_REG_SECS];
780 switch (ds1307->type) {
781 case ds_1307:
782 case m41t00:
783 /* clock halted? turn it on, so clock can tick. */
784 if (tmp & DS1307_BIT_CH) {
785 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
786 dev_warn(&client->dev, "SET TIME!\n");
787 goto read_rtc;
788 }
789 break;
790 case ds_1338:
791 /* clock halted? turn it on, so clock can tick. */
792 if (tmp & DS1307_BIT_CH)
793 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
794
795 /* oscillator fault? clear flag, and warn */
796 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
797 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
798 ds1307->regs[DS1307_REG_CONTROL]
799 & ~DS1338_BIT_OSF);
800 dev_warn(&client->dev, "SET TIME!\n");
801 goto read_rtc;
802 }
803 break;
804 case ds_1340:
805 /* clock halted? turn it on, so clock can tick. */
806 if (tmp & DS1340_BIT_nEOSC)
807 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
808
809 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
810 if (tmp < 0) {
811 pr_debug("read error %d\n", tmp);
812 err = -EIO;
813 goto exit_free;
814 }
815
816 /* oscillator fault? clear flag, and warn */
817 if (tmp & DS1340_BIT_OSF) {
818 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
819 dev_warn(&client->dev, "SET TIME!\n");
820 }
821 break;
822 case mcp7941x:
823 /* make sure that the backup battery is enabled */
824 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP7941X_BIT_VBATEN)) {
825 i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
826 ds1307->regs[DS1307_REG_WDAY]
827 | MCP7941X_BIT_VBATEN);
828 }
829
830 /* clock halted? turn it on, so clock can tick. */
831 if (!(tmp & MCP7941X_BIT_ST)) {
832 i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
833 MCP7941X_BIT_ST);
834 dev_warn(&client->dev, "SET TIME!\n");
835 goto read_rtc;
836 }
837
838 break;
839 case rx_8025:
840 case ds_1337:
841 case ds_1339:
842 case ds_1388:
843 case ds_3231:
844 break;
845 }
846
847 tmp = ds1307->regs[DS1307_REG_HOUR];
848 switch (ds1307->type) {
849 case ds_1340:
850 case m41t00:
851 /* NOTE: ignores century bits; fix before deploying
852 * systems that will run through year 2100.
853 */
854 break;
855 case rx_8025:
856 break;
857 default:
858 if (!(tmp & DS1307_BIT_12HR))
859 break;
860
861 /* Be sure we're in 24 hour mode. Multi-master systems
862 * take note...
863 */
864 tmp = bcd2bin(tmp & 0x1f);
865 if (tmp == 12)
866 tmp = 0;
867 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
868 tmp += 12;
869 i2c_smbus_write_byte_data(client,
870 ds1307->offset + DS1307_REG_HOUR,
871 bin2bcd(tmp));
872 }
873
874 ds1307->rtc = rtc_device_register(client->name, &client->dev,
875 &ds13xx_rtc_ops, THIS_MODULE);
876 if (IS_ERR(ds1307->rtc)) {
877 err = PTR_ERR(ds1307->rtc);
878 dev_err(&client->dev,
879 "unable to register the class device\n");
880 goto exit_free;
881 }
882
883 if (want_irq) {
884 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
885 ds1307->rtc->name, client);
886 if (err) {
887 dev_err(&client->dev,
888 "unable to request IRQ!\n");
889 goto exit_irq;
890 }
891
892 device_set_wakeup_capable(&client->dev, 1);
893 set_bit(HAS_ALARM, &ds1307->flags);
894 dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
895 }
896
897 if (chip->nvram56) {
898 err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
899 if (err == 0) {
900 set_bit(HAS_NVRAM, &ds1307->flags);
901 dev_info(&client->dev, "56 bytes nvram\n");
902 }
903 }
904
905 return 0;
906
907 exit_irq:
908 rtc_device_unregister(ds1307->rtc);
909 exit_free:
910 kfree(ds1307);
911 return err;
912 }
913
ds1307_remove(struct i2c_client * client)914 static int __devexit ds1307_remove(struct i2c_client *client)
915 {
916 struct ds1307 *ds1307 = i2c_get_clientdata(client);
917
918 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
919 free_irq(client->irq, client);
920 cancel_work_sync(&ds1307->work);
921 }
922
923 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
924 sysfs_remove_bin_file(&client->dev.kobj, &nvram);
925
926 rtc_device_unregister(ds1307->rtc);
927 kfree(ds1307);
928 return 0;
929 }
930
931 static struct i2c_driver ds1307_driver = {
932 .driver = {
933 .name = "rtc-ds1307",
934 .owner = THIS_MODULE,
935 },
936 .probe = ds1307_probe,
937 .remove = __devexit_p(ds1307_remove),
938 .id_table = ds1307_id,
939 };
940
ds1307_init(void)941 static int __init ds1307_init(void)
942 {
943 return i2c_add_driver(&ds1307_driver);
944 }
945 module_init(ds1307_init);
946
ds1307_exit(void)947 static void __exit ds1307_exit(void)
948 {
949 i2c_del_driver(&ds1307_driver);
950 }
951 module_exit(ds1307_exit);
952
953 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
954 MODULE_LICENSE("GPL");
955