1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Copyright (C) 2025 Advanced Micro Devices, Inc.
4 */
5
6 #ifndef _SBRMI_CORE_H_
7 #define _SBRMI_CORE_H_
8
9 #include <linux/miscdevice.h>
10 #include <linux/mutex.h>
11 #include <linux/i2c.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <uapi/misc/amd-apml.h>
15
16 /* SB-RMI registers */
17 enum sbrmi_reg {
18 SBRMI_REV,
19 SBRMI_CTRL,
20 SBRMI_STATUS,
21 SBRMI_OUTBNDMSG0 = 0x30,
22 SBRMI_OUTBNDMSG1,
23 SBRMI_OUTBNDMSG2,
24 SBRMI_OUTBNDMSG3,
25 SBRMI_OUTBNDMSG4,
26 SBRMI_OUTBNDMSG5,
27 SBRMI_OUTBNDMSG6,
28 SBRMI_OUTBNDMSG7,
29 SBRMI_INBNDMSG0,
30 SBRMI_INBNDMSG1,
31 SBRMI_INBNDMSG2,
32 SBRMI_INBNDMSG3,
33 SBRMI_INBNDMSG4,
34 SBRMI_INBNDMSG5,
35 SBRMI_INBNDMSG6,
36 SBRMI_INBNDMSG7,
37 SBRMI_SW_INTERRUPT,
38 SBRMI_THREAD128CS = 0x4b,
39 };
40
41 /*
42 * SB-RMI supports soft mailbox service request to MP1 (power management
43 * firmware) through SBRMI inbound/outbound message registers.
44 * SB-RMI message IDs
45 */
46 enum sbrmi_msg_id {
47 SBRMI_READ_PKG_PWR_CONSUMPTION = 0x1,
48 SBRMI_WRITE_PKG_PWR_LIMIT,
49 SBRMI_READ_PKG_PWR_LIMIT,
50 SBRMI_READ_PKG_MAX_PWR_LIMIT,
51 };
52
53 /* Each client has this additional data */
54 struct sbrmi_data {
55 struct miscdevice sbrmi_misc_dev;
56 struct regmap *regmap;
57 /* Mutex locking */
58 struct mutex lock;
59 u32 pwr_limit_max;
60 u8 dev_static_addr;
61 u8 rev;
62 };
63
64 int rmi_mailbox_xfer(struct sbrmi_data *data, struct apml_mbox_msg *msg);
65 #ifdef CONFIG_AMD_SBRMI_HWMON
66 int create_hwmon_sensor_device(struct device *dev, struct sbrmi_data *data);
67 #else
create_hwmon_sensor_device(struct device * dev,struct sbrmi_data * data)68 static inline int create_hwmon_sensor_device(struct device *dev, struct sbrmi_data *data)
69 {
70 return 0;
71 }
72 #endif
73 int create_misc_rmi_device(struct sbrmi_data *data, struct device *dev);
74 #endif /*_SBRMI_CORE_H_*/
75