1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* 18 * The external audio clocks are configured as 0 Hz fixed frequency 19 * clocks by default. 20 * Boards that provide audio clocks should override them. 21 */ 22 audio_clk_a: audio_clk_a { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; 26 }; 27 28 audio_clk_b: audio_clk_b { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_c: audio_clk_c { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 /* External CAN clock - to be overridden by boards that provide it */ 41 can_clk: can { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 cluster1_opp: opp-table-1 { 48 compatible = "operating-points-v2"; 49 opp-shared; 50 51 opp-800000000 { 52 opp-hz = /bits/ 64 <800000000>; 53 opp-microvolt = <1030000>; 54 clock-latency-ns = <300000>; 55 }; 56 opp-1000000000 { 57 opp-hz = /bits/ 64 <1000000000>; 58 opp-microvolt = <1030000>; 59 clock-latency-ns = <300000>; 60 }; 61 opp-1200000000 { 62 opp-hz = /bits/ 64 <1200000000>; 63 opp-microvolt = <1030000>; 64 clock-latency-ns = <300000>; 65 opp-suspend; 66 }; 67 }; 68 69 cpus { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 a53_0: cpu@0 { 74 compatible = "arm,cortex-a53"; 75 reg = <0>; 76 device_type = "cpu"; 77 #cooling-cells = <2>; 78 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 79 next-level-cache = <&L2_CA53>; 80 enable-method = "psci"; 81 cpu-idle-states = <&CPU_SLEEP_0>; 82 dynamic-power-coefficient = <277>; 83 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; 84 operating-points-v2 = <&cluster1_opp>; 85 }; 86 87 a53_1: cpu@1 { 88 compatible = "arm,cortex-a53"; 89 reg = <1>; 90 device_type = "cpu"; 91 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 92 next-level-cache = <&L2_CA53>; 93 enable-method = "psci"; 94 cpu-idle-states = <&CPU_SLEEP_0>; 95 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; 96 operating-points-v2 = <&cluster1_opp>; 97 }; 98 99 L2_CA53: cache-controller-0 { 100 compatible = "cache"; 101 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 102 cache-unified; 103 cache-level = <2>; 104 }; 105 106 idle-states { 107 entry-method = "psci"; 108 109 CPU_SLEEP_0: cpu-sleep-0 { 110 compatible = "arm,idle-state"; 111 arm,psci-suspend-param = <0x0010000>; 112 local-timer-stop; 113 entry-latency-us = <700>; 114 exit-latency-us = <700>; 115 min-residency-us = <5000>; 116 }; 117 }; 118 }; 119 120 extal_clk: extal { 121 compatible = "fixed-clock"; 122 #clock-cells = <0>; 123 /* This value must be overridden by the board */ 124 clock-frequency = <0>; 125 bootph-all; 126 }; 127 128 /* External PCIe clock - can be overridden by the board */ 129 pcie_bus_clk: pcie_bus { 130 compatible = "fixed-clock"; 131 #clock-cells = <0>; 132 clock-frequency = <0>; 133 }; 134 135 pmu_a53 { 136 compatible = "arm,cortex-a53-pmu"; 137 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 138 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 139 interrupt-affinity = <&a53_0>, <&a53_1>; 140 }; 141 142 psci { 143 compatible = "arm,psci-1.0", "arm,psci-0.2"; 144 method = "smc"; 145 }; 146 147 /* External SCIF clock - to be overridden by boards that provide it */ 148 scif_clk: scif { 149 compatible = "fixed-clock"; 150 #clock-cells = <0>; 151 clock-frequency = <0>; 152 }; 153 154 soc: soc { 155 compatible = "simple-bus"; 156 interrupt-parent = <&gic>; 157 bootph-all; 158 159 #address-cells = <2>; 160 #size-cells = <2>; 161 ranges; 162 163 rwdt: watchdog@e6020000 { 164 compatible = "renesas,r8a77990-wdt", 165 "renesas,rcar-gen3-wdt"; 166 reg = <0 0xe6020000 0 0x0c>; 167 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 168 clocks = <&cpg CPG_MOD 402>; 169 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 170 resets = <&cpg 402>; 171 status = "disabled"; 172 }; 173 174 gpio0: gpio@e6050000 { 175 compatible = "renesas,gpio-r8a77990", 176 "renesas,rcar-gen3-gpio"; 177 reg = <0 0xe6050000 0 0x50>; 178 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 179 #gpio-cells = <2>; 180 gpio-controller; 181 gpio-ranges = <&pfc 0 0 18>; 182 #interrupt-cells = <2>; 183 interrupt-controller; 184 clocks = <&cpg CPG_MOD 912>; 185 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 186 resets = <&cpg 912>; 187 }; 188 189 gpio1: gpio@e6051000 { 190 compatible = "renesas,gpio-r8a77990", 191 "renesas,rcar-gen3-gpio"; 192 reg = <0 0xe6051000 0 0x50>; 193 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 194 #gpio-cells = <2>; 195 gpio-controller; 196 gpio-ranges = <&pfc 0 32 23>; 197 #interrupt-cells = <2>; 198 interrupt-controller; 199 clocks = <&cpg CPG_MOD 911>; 200 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 201 resets = <&cpg 911>; 202 }; 203 204 gpio2: gpio@e6052000 { 205 compatible = "renesas,gpio-r8a77990", 206 "renesas,rcar-gen3-gpio"; 207 reg = <0 0xe6052000 0 0x50>; 208 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 209 #gpio-cells = <2>; 210 gpio-controller; 211 gpio-ranges = <&pfc 0 64 26>; 212 #interrupt-cells = <2>; 213 interrupt-controller; 214 clocks = <&cpg CPG_MOD 910>; 215 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 216 resets = <&cpg 910>; 217 }; 218 219 gpio3: gpio@e6053000 { 220 compatible = "renesas,gpio-r8a77990", 221 "renesas,rcar-gen3-gpio"; 222 reg = <0 0xe6053000 0 0x50>; 223 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 224 #gpio-cells = <2>; 225 gpio-controller; 226 gpio-ranges = <&pfc 0 96 16>; 227 #interrupt-cells = <2>; 228 interrupt-controller; 229 clocks = <&cpg CPG_MOD 909>; 230 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 231 resets = <&cpg 909>; 232 }; 233 234 gpio4: gpio@e6054000 { 235 compatible = "renesas,gpio-r8a77990", 236 "renesas,rcar-gen3-gpio"; 237 reg = <0 0xe6054000 0 0x50>; 238 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 239 #gpio-cells = <2>; 240 gpio-controller; 241 gpio-ranges = <&pfc 0 128 11>; 242 #interrupt-cells = <2>; 243 interrupt-controller; 244 clocks = <&cpg CPG_MOD 908>; 245 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 246 resets = <&cpg 908>; 247 }; 248 249 gpio5: gpio@e6055000 { 250 compatible = "renesas,gpio-r8a77990", 251 "renesas,rcar-gen3-gpio"; 252 reg = <0 0xe6055000 0 0x50>; 253 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 254 #gpio-cells = <2>; 255 gpio-controller; 256 gpio-ranges = <&pfc 0 160 20>; 257 #interrupt-cells = <2>; 258 interrupt-controller; 259 clocks = <&cpg CPG_MOD 907>; 260 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 261 resets = <&cpg 907>; 262 }; 263 264 gpio6: gpio@e6055400 { 265 compatible = "renesas,gpio-r8a77990", 266 "renesas,rcar-gen3-gpio"; 267 reg = <0 0xe6055400 0 0x50>; 268 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 269 #gpio-cells = <2>; 270 gpio-controller; 271 gpio-ranges = <&pfc 0 192 18>; 272 #interrupt-cells = <2>; 273 interrupt-controller; 274 clocks = <&cpg CPG_MOD 906>; 275 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 276 resets = <&cpg 906>; 277 }; 278 279 pfc: pinctrl@e6060000 { 280 compatible = "renesas,pfc-r8a77990"; 281 reg = <0 0xe6060000 0 0x508>; 282 bootph-all; 283 }; 284 285 i2c_dvfs: i2c@e60b0000 { 286 #address-cells = <1>; 287 #size-cells = <0>; 288 compatible = "renesas,iic-r8a77990", 289 "renesas,rcar-gen3-iic", 290 "renesas,rmobile-iic"; 291 reg = <0 0xe60b0000 0 0x425>; 292 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 293 clocks = <&cpg CPG_MOD 926>; 294 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 295 resets = <&cpg 926>; 296 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 297 dma-names = "tx", "rx"; 298 status = "disabled"; 299 }; 300 301 cmt0: timer@e60f0000 { 302 compatible = "renesas,r8a77990-cmt0", 303 "renesas,rcar-gen3-cmt0"; 304 reg = <0 0xe60f0000 0 0x1004>; 305 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 306 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 307 clocks = <&cpg CPG_MOD 303>; 308 clock-names = "fck"; 309 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 310 resets = <&cpg 303>; 311 status = "disabled"; 312 }; 313 314 cmt1: timer@e6130000 { 315 compatible = "renesas,r8a77990-cmt1", 316 "renesas,rcar-gen3-cmt1"; 317 reg = <0 0xe6130000 0 0x1004>; 318 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 326 clocks = <&cpg CPG_MOD 302>; 327 clock-names = "fck"; 328 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 329 resets = <&cpg 302>; 330 status = "disabled"; 331 }; 332 333 cmt2: timer@e6140000 { 334 compatible = "renesas,r8a77990-cmt1", 335 "renesas,rcar-gen3-cmt1"; 336 reg = <0 0xe6140000 0 0x1004>; 337 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 338 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 339 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 345 clocks = <&cpg CPG_MOD 301>; 346 clock-names = "fck"; 347 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 348 resets = <&cpg 301>; 349 status = "disabled"; 350 }; 351 352 cmt3: timer@e6148000 { 353 compatible = "renesas,r8a77990-cmt1", 354 "renesas,rcar-gen3-cmt1"; 355 reg = <0 0xe6148000 0 0x1004>; 356 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 364 clocks = <&cpg CPG_MOD 300>; 365 clock-names = "fck"; 366 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 367 resets = <&cpg 300>; 368 status = "disabled"; 369 }; 370 371 cpg: clock-controller@e6150000 { 372 compatible = "renesas,r8a77990-cpg-mssr"; 373 reg = <0 0xe6150000 0 0x1000>; 374 clocks = <&extal_clk>; 375 clock-names = "extal"; 376 #clock-cells = <2>; 377 #power-domain-cells = <0>; 378 #reset-cells = <1>; 379 bootph-all; 380 }; 381 382 rst: reset-controller@e6160000 { 383 compatible = "renesas,r8a77990-rst"; 384 reg = <0 0xe6160000 0 0x0200>; 385 bootph-all; 386 }; 387 388 sysc: system-controller@e6180000 { 389 compatible = "renesas,r8a77990-sysc"; 390 reg = <0 0xe6180000 0 0x0400>; 391 #power-domain-cells = <1>; 392 }; 393 394 thermal: thermal@e6190000 { 395 compatible = "renesas,thermal-r8a77990"; 396 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 397 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 400 clocks = <&cpg CPG_MOD 522>; 401 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 402 resets = <&cpg 522>; 403 #thermal-sensor-cells = <0>; 404 }; 405 406 intc_ex: interrupt-controller@e61c0000 { 407 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 408 #interrupt-cells = <2>; 409 interrupt-controller; 410 reg = <0 0xe61c0000 0 0x200>; 411 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 412 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 413 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 417 clocks = <&cpg CPG_MOD 407>; 418 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 419 resets = <&cpg 407>; 420 }; 421 422 tmu0: timer@e61e0000 { 423 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 424 reg = <0 0xe61e0000 0 0x30>; 425 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 426 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 427 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 428 interrupt-names = "tuni0", "tuni1", "tuni2"; 429 clocks = <&cpg CPG_MOD 125>; 430 clock-names = "fck"; 431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 432 resets = <&cpg 125>; 433 status = "disabled"; 434 }; 435 436 tmu1: timer@e6fc0000 { 437 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 438 reg = <0 0xe6fc0000 0 0x30>; 439 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 441 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 443 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 444 clocks = <&cpg CPG_MOD 124>; 445 clock-names = "fck"; 446 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 447 resets = <&cpg 124>; 448 status = "disabled"; 449 }; 450 451 tmu2: timer@e6fd0000 { 452 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 453 reg = <0 0xe6fd0000 0 0x30>; 454 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 455 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 456 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 457 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 458 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 459 clocks = <&cpg CPG_MOD 123>; 460 clock-names = "fck"; 461 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 462 resets = <&cpg 123>; 463 status = "disabled"; 464 }; 465 466 tmu3: timer@e6fe0000 { 467 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 468 reg = <0 0xe6fe0000 0 0x30>; 469 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 470 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 471 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 472 interrupt-names = "tuni0", "tuni1", "tuni2"; 473 clocks = <&cpg CPG_MOD 122>; 474 clock-names = "fck"; 475 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 476 resets = <&cpg 122>; 477 status = "disabled"; 478 }; 479 480 tmu4: timer@ffc00000 { 481 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 482 reg = <0 0xffc00000 0 0x30>; 483 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 484 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 485 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 486 interrupt-names = "tuni0", "tuni1", "tuni2"; 487 clocks = <&cpg CPG_MOD 121>; 488 clock-names = "fck"; 489 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 490 resets = <&cpg 121>; 491 status = "disabled"; 492 }; 493 494 i2c0: i2c@e6500000 { 495 #address-cells = <1>; 496 #size-cells = <0>; 497 compatible = "renesas,i2c-r8a77990", 498 "renesas,rcar-gen3-i2c"; 499 reg = <0 0xe6500000 0 0x40>; 500 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 931>; 502 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 503 resets = <&cpg 931>; 504 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 505 <&dmac2 0x91>, <&dmac2 0x90>; 506 dma-names = "tx", "rx", "tx", "rx"; 507 i2c-scl-internal-delay-ns = <110>; 508 status = "disabled"; 509 }; 510 511 i2c1: i2c@e6508000 { 512 #address-cells = <1>; 513 #size-cells = <0>; 514 compatible = "renesas,i2c-r8a77990", 515 "renesas,rcar-gen3-i2c"; 516 reg = <0 0xe6508000 0 0x40>; 517 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 518 clocks = <&cpg CPG_MOD 930>; 519 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 520 resets = <&cpg 930>; 521 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 522 <&dmac2 0x93>, <&dmac2 0x92>; 523 dma-names = "tx", "rx", "tx", "rx"; 524 i2c-scl-internal-delay-ns = <6>; 525 status = "disabled"; 526 }; 527 528 i2c2: i2c@e6510000 { 529 #address-cells = <1>; 530 #size-cells = <0>; 531 compatible = "renesas,i2c-r8a77990", 532 "renesas,rcar-gen3-i2c"; 533 reg = <0 0xe6510000 0 0x40>; 534 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 535 clocks = <&cpg CPG_MOD 929>; 536 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 537 resets = <&cpg 929>; 538 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 539 <&dmac2 0x95>, <&dmac2 0x94>; 540 dma-names = "tx", "rx", "tx", "rx"; 541 i2c-scl-internal-delay-ns = <6>; 542 status = "disabled"; 543 }; 544 545 i2c3: i2c@e66d0000 { 546 #address-cells = <1>; 547 #size-cells = <0>; 548 compatible = "renesas,i2c-r8a77990", 549 "renesas,rcar-gen3-i2c"; 550 reg = <0 0xe66d0000 0 0x40>; 551 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 552 clocks = <&cpg CPG_MOD 928>; 553 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 554 resets = <&cpg 928>; 555 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 556 dma-names = "tx", "rx"; 557 i2c-scl-internal-delay-ns = <110>; 558 status = "disabled"; 559 }; 560 561 i2c4: i2c@e66d8000 { 562 #address-cells = <1>; 563 #size-cells = <0>; 564 compatible = "renesas,i2c-r8a77990", 565 "renesas,rcar-gen3-i2c"; 566 reg = <0 0xe66d8000 0 0x40>; 567 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 568 clocks = <&cpg CPG_MOD 927>; 569 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 570 resets = <&cpg 927>; 571 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 572 dma-names = "tx", "rx"; 573 i2c-scl-internal-delay-ns = <6>; 574 status = "disabled"; 575 }; 576 577 i2c5: i2c@e66e0000 { 578 #address-cells = <1>; 579 #size-cells = <0>; 580 compatible = "renesas,i2c-r8a77990", 581 "renesas,rcar-gen3-i2c"; 582 reg = <0 0xe66e0000 0 0x40>; 583 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 584 clocks = <&cpg CPG_MOD 919>; 585 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 586 resets = <&cpg 919>; 587 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 588 dma-names = "tx", "rx"; 589 i2c-scl-internal-delay-ns = <6>; 590 status = "disabled"; 591 }; 592 593 i2c6: i2c@e66e8000 { 594 #address-cells = <1>; 595 #size-cells = <0>; 596 compatible = "renesas,i2c-r8a77990", 597 "renesas,rcar-gen3-i2c"; 598 reg = <0 0xe66e8000 0 0x40>; 599 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 600 clocks = <&cpg CPG_MOD 918>; 601 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 602 resets = <&cpg 918>; 603 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 604 dma-names = "tx", "rx"; 605 i2c-scl-internal-delay-ns = <6>; 606 status = "disabled"; 607 }; 608 609 i2c7: i2c@e6690000 { 610 #address-cells = <1>; 611 #size-cells = <0>; 612 compatible = "renesas,i2c-r8a77990", 613 "renesas,rcar-gen3-i2c"; 614 reg = <0 0xe6690000 0 0x40>; 615 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 616 clocks = <&cpg CPG_MOD 1003>; 617 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 618 resets = <&cpg 1003>; 619 i2c-scl-internal-delay-ns = <6>; 620 status = "disabled"; 621 }; 622 623 hscif0: serial@e6540000 { 624 compatible = "renesas,hscif-r8a77990", 625 "renesas,rcar-gen3-hscif", 626 "renesas,hscif"; 627 reg = <0 0xe6540000 0 0x60>; 628 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 520>, 630 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 631 <&scif_clk>; 632 clock-names = "fck", "brg_int", "scif_clk"; 633 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 634 <&dmac2 0x31>, <&dmac2 0x30>; 635 dma-names = "tx", "rx", "tx", "rx"; 636 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 637 resets = <&cpg 520>; 638 status = "disabled"; 639 }; 640 641 hscif1: serial@e6550000 { 642 compatible = "renesas,hscif-r8a77990", 643 "renesas,rcar-gen3-hscif", 644 "renesas,hscif"; 645 reg = <0 0xe6550000 0 0x60>; 646 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 647 clocks = <&cpg CPG_MOD 519>, 648 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 649 <&scif_clk>; 650 clock-names = "fck", "brg_int", "scif_clk"; 651 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 652 <&dmac2 0x33>, <&dmac2 0x32>; 653 dma-names = "tx", "rx", "tx", "rx"; 654 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 655 resets = <&cpg 519>; 656 status = "disabled"; 657 }; 658 659 hscif2: serial@e6560000 { 660 compatible = "renesas,hscif-r8a77990", 661 "renesas,rcar-gen3-hscif", 662 "renesas,hscif"; 663 reg = <0 0xe6560000 0 0x60>; 664 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 665 clocks = <&cpg CPG_MOD 518>, 666 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 667 <&scif_clk>; 668 clock-names = "fck", "brg_int", "scif_clk"; 669 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 670 <&dmac2 0x35>, <&dmac2 0x34>; 671 dma-names = "tx", "rx", "tx", "rx"; 672 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 673 resets = <&cpg 518>; 674 status = "disabled"; 675 }; 676 677 hscif3: serial@e66a0000 { 678 compatible = "renesas,hscif-r8a77990", 679 "renesas,rcar-gen3-hscif", 680 "renesas,hscif"; 681 reg = <0 0xe66a0000 0 0x60>; 682 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 683 clocks = <&cpg CPG_MOD 517>, 684 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 685 <&scif_clk>; 686 clock-names = "fck", "brg_int", "scif_clk"; 687 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 688 dma-names = "tx", "rx"; 689 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 690 resets = <&cpg 517>; 691 status = "disabled"; 692 }; 693 694 hscif4: serial@e66b0000 { 695 compatible = "renesas,hscif-r8a77990", 696 "renesas,rcar-gen3-hscif", 697 "renesas,hscif"; 698 reg = <0 0xe66b0000 0 0x60>; 699 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 700 clocks = <&cpg CPG_MOD 516>, 701 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 702 <&scif_clk>; 703 clock-names = "fck", "brg_int", "scif_clk"; 704 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 705 dma-names = "tx", "rx"; 706 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 707 resets = <&cpg 516>; 708 status = "disabled"; 709 }; 710 711 hsusb: usb@e6590000 { 712 compatible = "renesas,usbhs-r8a77990", 713 "renesas,rcar-gen3-usbhs"; 714 reg = <0 0xe6590000 0 0x200>; 715 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 716 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 717 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 718 <&usb_dmac1 0>, <&usb_dmac1 1>; 719 dma-names = "ch0", "ch1", "ch2", "ch3"; 720 renesas,buswait = <11>; 721 phys = <&usb2_phy0 3>; 722 phy-names = "usb"; 723 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 724 resets = <&cpg 704>, <&cpg 703>; 725 status = "disabled"; 726 }; 727 728 usb_dmac0: dma-controller@e65a0000 { 729 compatible = "renesas,r8a77990-usb-dmac", 730 "renesas,usb-dmac"; 731 reg = <0 0xe65a0000 0 0x100>; 732 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 734 interrupt-names = "ch0", "ch1"; 735 clocks = <&cpg CPG_MOD 330>; 736 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 737 resets = <&cpg 330>; 738 #dma-cells = <1>; 739 dma-channels = <2>; 740 }; 741 742 usb_dmac1: dma-controller@e65b0000 { 743 compatible = "renesas,r8a77990-usb-dmac", 744 "renesas,usb-dmac"; 745 reg = <0 0xe65b0000 0 0x100>; 746 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 747 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 748 interrupt-names = "ch0", "ch1"; 749 clocks = <&cpg CPG_MOD 331>; 750 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 751 resets = <&cpg 331>; 752 #dma-cells = <1>; 753 dma-channels = <2>; 754 }; 755 756 arm_cc630p: crypto@e6601000 { 757 compatible = "arm,cryptocell-630p-ree"; 758 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 759 reg = <0x0 0xe6601000 0 0x1000>; 760 clocks = <&cpg CPG_MOD 229>; 761 resets = <&cpg 229>; 762 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 763 }; 764 765 dmac0: dma-controller@e6700000 { 766 compatible = "renesas,dmac-r8a77990", 767 "renesas,rcar-dmac"; 768 reg = <0 0xe6700000 0 0x10000>; 769 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 786 interrupt-names = "error", 787 "ch0", "ch1", "ch2", "ch3", 788 "ch4", "ch5", "ch6", "ch7", 789 "ch8", "ch9", "ch10", "ch11", 790 "ch12", "ch13", "ch14", "ch15"; 791 clocks = <&cpg CPG_MOD 219>; 792 clock-names = "fck"; 793 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 794 resets = <&cpg 219>; 795 #dma-cells = <1>; 796 dma-channels = <16>; 797 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 798 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 799 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 800 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 801 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 802 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 803 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 804 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 805 }; 806 807 dmac1: dma-controller@e7300000 { 808 compatible = "renesas,dmac-r8a77990", 809 "renesas,rcar-dmac"; 810 reg = <0 0xe7300000 0 0x10000>; 811 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 828 interrupt-names = "error", 829 "ch0", "ch1", "ch2", "ch3", 830 "ch4", "ch5", "ch6", "ch7", 831 "ch8", "ch9", "ch10", "ch11", 832 "ch12", "ch13", "ch14", "ch15"; 833 clocks = <&cpg CPG_MOD 218>; 834 clock-names = "fck"; 835 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 836 resets = <&cpg 218>; 837 #dma-cells = <1>; 838 dma-channels = <16>; 839 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 840 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 841 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 842 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 843 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 844 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 845 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 846 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 847 }; 848 849 dmac2: dma-controller@e7310000 { 850 compatible = "renesas,dmac-r8a77990", 851 "renesas,rcar-dmac"; 852 reg = <0 0xe7310000 0 0x10000>; 853 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 854 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 870 interrupt-names = "error", 871 "ch0", "ch1", "ch2", "ch3", 872 "ch4", "ch5", "ch6", "ch7", 873 "ch8", "ch9", "ch10", "ch11", 874 "ch12", "ch13", "ch14", "ch15"; 875 clocks = <&cpg CPG_MOD 217>; 876 clock-names = "fck"; 877 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 878 resets = <&cpg 217>; 879 #dma-cells = <1>; 880 dma-channels = <16>; 881 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 882 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 883 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 884 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 885 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 886 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 887 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 888 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 889 }; 890 891 ipmmu_ds0: iommu@e6740000 { 892 compatible = "renesas,ipmmu-r8a77990"; 893 reg = <0 0xe6740000 0 0x1000>; 894 renesas,ipmmu-main = <&ipmmu_mm 0>; 895 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 896 #iommu-cells = <1>; 897 }; 898 899 ipmmu_ds1: iommu@e7740000 { 900 compatible = "renesas,ipmmu-r8a77990"; 901 reg = <0 0xe7740000 0 0x1000>; 902 renesas,ipmmu-main = <&ipmmu_mm 1>; 903 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 904 #iommu-cells = <1>; 905 }; 906 907 ipmmu_hc: iommu@e6570000 { 908 compatible = "renesas,ipmmu-r8a77990"; 909 reg = <0 0xe6570000 0 0x1000>; 910 renesas,ipmmu-main = <&ipmmu_mm 2>; 911 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 912 #iommu-cells = <1>; 913 }; 914 915 ipmmu_mm: iommu@e67b0000 { 916 compatible = "renesas,ipmmu-r8a77990"; 917 reg = <0 0xe67b0000 0 0x1000>; 918 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 919 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 920 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 921 #iommu-cells = <1>; 922 }; 923 924 ipmmu_mp: iommu@ec670000 { 925 compatible = "renesas,ipmmu-r8a77990"; 926 reg = <0 0xec670000 0 0x1000>; 927 renesas,ipmmu-main = <&ipmmu_mm 4>; 928 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 929 #iommu-cells = <1>; 930 }; 931 932 ipmmu_pv0: iommu@fd800000 { 933 compatible = "renesas,ipmmu-r8a77990"; 934 reg = <0 0xfd800000 0 0x1000>; 935 renesas,ipmmu-main = <&ipmmu_mm 6>; 936 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 937 #iommu-cells = <1>; 938 }; 939 940 ipmmu_rt: iommu@ffc80000 { 941 compatible = "renesas,ipmmu-r8a77990"; 942 reg = <0 0xffc80000 0 0x1000>; 943 renesas,ipmmu-main = <&ipmmu_mm 10>; 944 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 945 #iommu-cells = <1>; 946 }; 947 948 ipmmu_vc0: iommu@fe6b0000 { 949 compatible = "renesas,ipmmu-r8a77990"; 950 reg = <0 0xfe6b0000 0 0x1000>; 951 renesas,ipmmu-main = <&ipmmu_mm 12>; 952 power-domains = <&sysc R8A77990_PD_A3VC>; 953 #iommu-cells = <1>; 954 }; 955 956 ipmmu_vi0: iommu@febd0000 { 957 compatible = "renesas,ipmmu-r8a77990"; 958 reg = <0 0xfebd0000 0 0x1000>; 959 renesas,ipmmu-main = <&ipmmu_mm 14>; 960 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 961 #iommu-cells = <1>; 962 }; 963 964 ipmmu_vp0: iommu@fe990000 { 965 compatible = "renesas,ipmmu-r8a77990"; 966 reg = <0 0xfe990000 0 0x1000>; 967 renesas,ipmmu-main = <&ipmmu_mm 16>; 968 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 969 #iommu-cells = <1>; 970 }; 971 972 avb: ethernet@e6800000 { 973 compatible = "renesas,etheravb-r8a77990", 974 "renesas,etheravb-rcar-gen3"; 975 reg = <0 0xe6800000 0 0x800>; 976 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1001 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1002 "ch4", "ch5", "ch6", "ch7", 1003 "ch8", "ch9", "ch10", "ch11", 1004 "ch12", "ch13", "ch14", "ch15", 1005 "ch16", "ch17", "ch18", "ch19", 1006 "ch20", "ch21", "ch22", "ch23", 1007 "ch24"; 1008 clocks = <&cpg CPG_MOD 812>; 1009 clock-names = "fck"; 1010 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1011 resets = <&cpg 812>; 1012 phy-mode = "rgmii"; 1013 rx-internal-delay-ps = <0>; 1014 iommus = <&ipmmu_ds0 16>; 1015 #address-cells = <1>; 1016 #size-cells = <0>; 1017 status = "disabled"; 1018 }; 1019 1020 can0: can@e6c30000 { 1021 compatible = "renesas,can-r8a77990", 1022 "renesas,rcar-gen3-can"; 1023 reg = <0 0xe6c30000 0 0x1000>; 1024 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1025 clocks = <&cpg CPG_MOD 916>, 1026 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1027 <&can_clk>; 1028 clock-names = "clkp1", "clkp2", "can_clk"; 1029 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1030 assigned-clock-rates = <40000000>; 1031 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1032 resets = <&cpg 916>; 1033 status = "disabled"; 1034 }; 1035 1036 can1: can@e6c38000 { 1037 compatible = "renesas,can-r8a77990", 1038 "renesas,rcar-gen3-can"; 1039 reg = <0 0xe6c38000 0 0x1000>; 1040 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1041 clocks = <&cpg CPG_MOD 915>, 1042 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1043 <&can_clk>; 1044 clock-names = "clkp1", "clkp2", "can_clk"; 1045 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1046 assigned-clock-rates = <40000000>; 1047 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1048 resets = <&cpg 915>; 1049 status = "disabled"; 1050 }; 1051 1052 canfd: can@e66c0000 { 1053 compatible = "renesas,r8a77990-canfd", 1054 "renesas,rcar-gen3-canfd"; 1055 reg = <0 0xe66c0000 0 0x8000>; 1056 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1057 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1058 interrupt-names = "ch_int", "g_int"; 1059 clocks = <&cpg CPG_MOD 914>, 1060 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1061 <&can_clk>; 1062 clock-names = "fck", "canfd", "can_clk"; 1063 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1064 assigned-clock-rates = <40000000>; 1065 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1066 resets = <&cpg 914>; 1067 status = "disabled"; 1068 1069 channel0 { 1070 status = "disabled"; 1071 }; 1072 1073 channel1 { 1074 status = "disabled"; 1075 }; 1076 }; 1077 1078 pwm0: pwm@e6e30000 { 1079 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1080 reg = <0 0xe6e30000 0 0x8>; 1081 clocks = <&cpg CPG_MOD 523>; 1082 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1083 resets = <&cpg 523>; 1084 #pwm-cells = <2>; 1085 status = "disabled"; 1086 }; 1087 1088 pwm1: pwm@e6e31000 { 1089 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1090 reg = <0 0xe6e31000 0 0x8>; 1091 clocks = <&cpg CPG_MOD 523>; 1092 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1093 resets = <&cpg 523>; 1094 #pwm-cells = <2>; 1095 status = "disabled"; 1096 }; 1097 1098 pwm2: pwm@e6e32000 { 1099 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1100 reg = <0 0xe6e32000 0 0x8>; 1101 clocks = <&cpg CPG_MOD 523>; 1102 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1103 resets = <&cpg 523>; 1104 #pwm-cells = <2>; 1105 status = "disabled"; 1106 }; 1107 1108 pwm3: pwm@e6e33000 { 1109 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1110 reg = <0 0xe6e33000 0 0x8>; 1111 clocks = <&cpg CPG_MOD 523>; 1112 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1113 resets = <&cpg 523>; 1114 #pwm-cells = <2>; 1115 status = "disabled"; 1116 }; 1117 1118 pwm4: pwm@e6e34000 { 1119 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1120 reg = <0 0xe6e34000 0 0x8>; 1121 clocks = <&cpg CPG_MOD 523>; 1122 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1123 resets = <&cpg 523>; 1124 #pwm-cells = <2>; 1125 status = "disabled"; 1126 }; 1127 1128 pwm5: pwm@e6e35000 { 1129 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1130 reg = <0 0xe6e35000 0 0x8>; 1131 clocks = <&cpg CPG_MOD 523>; 1132 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1133 resets = <&cpg 523>; 1134 #pwm-cells = <2>; 1135 status = "disabled"; 1136 }; 1137 1138 pwm6: pwm@e6e36000 { 1139 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1140 reg = <0 0xe6e36000 0 0x8>; 1141 clocks = <&cpg CPG_MOD 523>; 1142 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1143 resets = <&cpg 523>; 1144 #pwm-cells = <2>; 1145 status = "disabled"; 1146 }; 1147 1148 scif0: serial@e6e60000 { 1149 compatible = "renesas,scif-r8a77990", 1150 "renesas,rcar-gen3-scif", "renesas,scif"; 1151 reg = <0 0xe6e60000 0 64>; 1152 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1153 clocks = <&cpg CPG_MOD 207>, 1154 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1155 <&scif_clk>; 1156 clock-names = "fck", "brg_int", "scif_clk"; 1157 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1158 <&dmac2 0x51>, <&dmac2 0x50>; 1159 dma-names = "tx", "rx", "tx", "rx"; 1160 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1161 resets = <&cpg 207>; 1162 status = "disabled"; 1163 }; 1164 1165 scif1: serial@e6e68000 { 1166 compatible = "renesas,scif-r8a77990", 1167 "renesas,rcar-gen3-scif", "renesas,scif"; 1168 reg = <0 0xe6e68000 0 64>; 1169 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1170 clocks = <&cpg CPG_MOD 206>, 1171 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1172 <&scif_clk>; 1173 clock-names = "fck", "brg_int", "scif_clk"; 1174 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1175 <&dmac2 0x53>, <&dmac2 0x52>; 1176 dma-names = "tx", "rx", "tx", "rx"; 1177 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1178 resets = <&cpg 206>; 1179 status = "disabled"; 1180 }; 1181 1182 scif2: serial@e6e88000 { 1183 compatible = "renesas,scif-r8a77990", 1184 "renesas,rcar-gen3-scif", "renesas,scif"; 1185 reg = <0 0xe6e88000 0 64>; 1186 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1187 clocks = <&cpg CPG_MOD 310>, 1188 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1189 <&scif_clk>; 1190 clock-names = "fck", "brg_int", "scif_clk"; 1191 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1192 <&dmac2 0x13>, <&dmac2 0x12>; 1193 dma-names = "tx", "rx", "tx", "rx"; 1194 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1195 resets = <&cpg 310>; 1196 status = "disabled"; 1197 }; 1198 1199 scif3: serial@e6c50000 { 1200 compatible = "renesas,scif-r8a77990", 1201 "renesas,rcar-gen3-scif", "renesas,scif"; 1202 reg = <0 0xe6c50000 0 64>; 1203 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1204 clocks = <&cpg CPG_MOD 204>, 1205 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1206 <&scif_clk>; 1207 clock-names = "fck", "brg_int", "scif_clk"; 1208 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1209 dma-names = "tx", "rx"; 1210 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1211 resets = <&cpg 204>; 1212 status = "disabled"; 1213 }; 1214 1215 scif4: serial@e6c40000 { 1216 compatible = "renesas,scif-r8a77990", 1217 "renesas,rcar-gen3-scif", "renesas,scif"; 1218 reg = <0 0xe6c40000 0 64>; 1219 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1220 clocks = <&cpg CPG_MOD 203>, 1221 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1222 <&scif_clk>; 1223 clock-names = "fck", "brg_int", "scif_clk"; 1224 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1225 dma-names = "tx", "rx"; 1226 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1227 resets = <&cpg 203>; 1228 status = "disabled"; 1229 }; 1230 1231 scif5: serial@e6f30000 { 1232 compatible = "renesas,scif-r8a77990", 1233 "renesas,rcar-gen3-scif", "renesas,scif"; 1234 reg = <0 0xe6f30000 0 64>; 1235 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1236 clocks = <&cpg CPG_MOD 202>, 1237 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1238 <&scif_clk>; 1239 clock-names = "fck", "brg_int", "scif_clk"; 1240 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1241 dma-names = "tx", "rx"; 1242 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1243 resets = <&cpg 202>; 1244 status = "disabled"; 1245 }; 1246 1247 msiof0: spi@e6e90000 { 1248 compatible = "renesas,msiof-r8a77990", 1249 "renesas,rcar-gen3-msiof"; 1250 reg = <0 0xe6e90000 0 0x0064>; 1251 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1252 clocks = <&cpg CPG_MOD 211>; 1253 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1254 <&dmac2 0x41>, <&dmac2 0x40>; 1255 dma-names = "tx", "rx", "tx", "rx"; 1256 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1257 resets = <&cpg 211>; 1258 #address-cells = <1>; 1259 #size-cells = <0>; 1260 status = "disabled"; 1261 }; 1262 1263 msiof1: spi@e6ea0000 { 1264 compatible = "renesas,msiof-r8a77990", 1265 "renesas,rcar-gen3-msiof"; 1266 reg = <0 0xe6ea0000 0 0x0064>; 1267 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1268 clocks = <&cpg CPG_MOD 210>; 1269 dmas = <&dmac0 0x43>, <&dmac0 0x42>; 1270 dma-names = "tx", "rx"; 1271 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1272 resets = <&cpg 210>; 1273 #address-cells = <1>; 1274 #size-cells = <0>; 1275 status = "disabled"; 1276 }; 1277 1278 msiof2: spi@e6c00000 { 1279 compatible = "renesas,msiof-r8a77990", 1280 "renesas,rcar-gen3-msiof"; 1281 reg = <0 0xe6c00000 0 0x0064>; 1282 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1283 clocks = <&cpg CPG_MOD 209>; 1284 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1285 dma-names = "tx", "rx"; 1286 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1287 resets = <&cpg 209>; 1288 #address-cells = <1>; 1289 #size-cells = <0>; 1290 status = "disabled"; 1291 }; 1292 1293 msiof3: spi@e6c10000 { 1294 compatible = "renesas,msiof-r8a77990", 1295 "renesas,rcar-gen3-msiof"; 1296 reg = <0 0xe6c10000 0 0x0064>; 1297 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1298 clocks = <&cpg CPG_MOD 208>; 1299 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1300 dma-names = "tx", "rx"; 1301 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1302 resets = <&cpg 208>; 1303 #address-cells = <1>; 1304 #size-cells = <0>; 1305 status = "disabled"; 1306 }; 1307 1308 vin4: video@e6ef4000 { 1309 compatible = "renesas,vin-r8a77990"; 1310 reg = <0 0xe6ef4000 0 0x1000>; 1311 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1312 clocks = <&cpg CPG_MOD 807>; 1313 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1314 resets = <&cpg 807>; 1315 renesas,id = <4>; 1316 status = "disabled"; 1317 1318 ports { 1319 #address-cells = <1>; 1320 #size-cells = <0>; 1321 1322 port@1 { 1323 #address-cells = <1>; 1324 #size-cells = <0>; 1325 1326 reg = <1>; 1327 1328 vin4csi40: endpoint@2 { 1329 reg = <2>; 1330 remote-endpoint = <&csi40vin4>; 1331 }; 1332 }; 1333 }; 1334 }; 1335 1336 vin5: video@e6ef5000 { 1337 compatible = "renesas,vin-r8a77990"; 1338 reg = <0 0xe6ef5000 0 0x1000>; 1339 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1340 clocks = <&cpg CPG_MOD 806>; 1341 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1342 resets = <&cpg 806>; 1343 renesas,id = <5>; 1344 status = "disabled"; 1345 1346 ports { 1347 #address-cells = <1>; 1348 #size-cells = <0>; 1349 1350 port@1 { 1351 #address-cells = <1>; 1352 #size-cells = <0>; 1353 1354 reg = <1>; 1355 1356 vin5csi40: endpoint@2 { 1357 reg = <2>; 1358 remote-endpoint = <&csi40vin5>; 1359 }; 1360 }; 1361 }; 1362 }; 1363 1364 drif00: rif@e6f40000 { 1365 compatible = "renesas,r8a77990-drif", 1366 "renesas,rcar-gen3-drif"; 1367 reg = <0 0xe6f40000 0 0x84>; 1368 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1369 clocks = <&cpg CPG_MOD 515>; 1370 clock-names = "fck"; 1371 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1372 dma-names = "rx", "rx"; 1373 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1374 resets = <&cpg 515>; 1375 renesas,bonding = <&drif01>; 1376 status = "disabled"; 1377 }; 1378 1379 drif01: rif@e6f50000 { 1380 compatible = "renesas,r8a77990-drif", 1381 "renesas,rcar-gen3-drif"; 1382 reg = <0 0xe6f50000 0 0x84>; 1383 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1384 clocks = <&cpg CPG_MOD 514>; 1385 clock-names = "fck"; 1386 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1387 dma-names = "rx", "rx"; 1388 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1389 resets = <&cpg 514>; 1390 renesas,bonding = <&drif00>; 1391 status = "disabled"; 1392 }; 1393 1394 drif10: rif@e6f60000 { 1395 compatible = "renesas,r8a77990-drif", 1396 "renesas,rcar-gen3-drif"; 1397 reg = <0 0xe6f60000 0 0x84>; 1398 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1399 clocks = <&cpg CPG_MOD 513>; 1400 clock-names = "fck"; 1401 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1402 dma-names = "rx", "rx"; 1403 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1404 resets = <&cpg 513>; 1405 renesas,bonding = <&drif11>; 1406 status = "disabled"; 1407 }; 1408 1409 drif11: rif@e6f70000 { 1410 compatible = "renesas,r8a77990-drif", 1411 "renesas,rcar-gen3-drif"; 1412 reg = <0 0xe6f70000 0 0x84>; 1413 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1414 clocks = <&cpg CPG_MOD 512>; 1415 clock-names = "fck"; 1416 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1417 dma-names = "rx", "rx"; 1418 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1419 resets = <&cpg 512>; 1420 renesas,bonding = <&drif10>; 1421 status = "disabled"; 1422 }; 1423 1424 drif20: rif@e6f80000 { 1425 compatible = "renesas,r8a77990-drif", 1426 "renesas,rcar-gen3-drif"; 1427 reg = <0 0xe6f80000 0 0x84>; 1428 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1429 clocks = <&cpg CPG_MOD 511>; 1430 clock-names = "fck"; 1431 dmas = <&dmac0 0x28>; 1432 dma-names = "rx"; 1433 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1434 resets = <&cpg 511>; 1435 renesas,bonding = <&drif21>; 1436 status = "disabled"; 1437 }; 1438 1439 drif21: rif@e6f90000 { 1440 compatible = "renesas,r8a77990-drif", 1441 "renesas,rcar-gen3-drif"; 1442 reg = <0 0xe6f90000 0 0x84>; 1443 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1444 clocks = <&cpg CPG_MOD 510>; 1445 clock-names = "fck"; 1446 dmas = <&dmac0 0x2a>; 1447 dma-names = "rx"; 1448 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1449 resets = <&cpg 510>; 1450 renesas,bonding = <&drif20>; 1451 status = "disabled"; 1452 }; 1453 1454 drif30: rif@e6fa0000 { 1455 compatible = "renesas,r8a77990-drif", 1456 "renesas,rcar-gen3-drif"; 1457 reg = <0 0xe6fa0000 0 0x84>; 1458 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1459 clocks = <&cpg CPG_MOD 509>; 1460 clock-names = "fck"; 1461 dmas = <&dmac0 0x2c>; 1462 dma-names = "rx"; 1463 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1464 resets = <&cpg 509>; 1465 renesas,bonding = <&drif31>; 1466 status = "disabled"; 1467 }; 1468 1469 drif31: rif@e6fb0000 { 1470 compatible = "renesas,r8a77990-drif", 1471 "renesas,rcar-gen3-drif"; 1472 reg = <0 0xe6fb0000 0 0x84>; 1473 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1474 clocks = <&cpg CPG_MOD 508>; 1475 clock-names = "fck"; 1476 dmas = <&dmac0 0x2e>; 1477 dma-names = "rx"; 1478 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1479 resets = <&cpg 508>; 1480 renesas,bonding = <&drif30>; 1481 status = "disabled"; 1482 }; 1483 1484 rcar_sound: sound@ec500000 { 1485 /* 1486 * #sound-dai-cells is required if simple-card 1487 * 1488 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1489 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1490 */ 1491 /* 1492 * #clock-cells is required for audio_clkout0/1/2/3 1493 * 1494 * clkout : #clock-cells = <0>; <&rcar_sound>; 1495 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1496 */ 1497 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1498 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1499 <0 0xec5a0000 0 0x100>, /* ADG */ 1500 <0 0xec540000 0 0x1000>, /* SSIU */ 1501 <0 0xec541000 0 0x280>, /* SSI */ 1502 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1503 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1504 1505 clocks = <&cpg CPG_MOD 1005>, 1506 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1507 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1508 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1509 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1510 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1511 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1512 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1513 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1514 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1515 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1516 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1517 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1518 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1519 <&audio_clk_a>, <&audio_clk_b>, 1520 <&audio_clk_c>, 1521 <&cpg CPG_MOD 922>; 1522 clock-names = "ssi-all", 1523 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1524 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1525 "ssi.1", "ssi.0", 1526 "src.9", "src.8", "src.7", "src.6", 1527 "src.5", "src.4", "src.3", "src.2", 1528 "src.1", "src.0", 1529 "mix.1", "mix.0", 1530 "ctu.1", "ctu.0", 1531 "dvc.0", "dvc.1", 1532 "clk_a", "clk_b", "clk_c", "clk_i"; 1533 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1534 resets = <&cpg 1005>, 1535 <&cpg 1006>, <&cpg 1007>, 1536 <&cpg 1008>, <&cpg 1009>, 1537 <&cpg 1010>, <&cpg 1011>, 1538 <&cpg 1012>, <&cpg 1013>, 1539 <&cpg 1014>, <&cpg 1015>; 1540 reset-names = "ssi-all", 1541 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1542 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1543 "ssi.1", "ssi.0"; 1544 status = "disabled"; 1545 1546 rcar_sound,ctu { 1547 ctu00: ctu-0 { }; 1548 ctu01: ctu-1 { }; 1549 ctu02: ctu-2 { }; 1550 ctu03: ctu-3 { }; 1551 ctu10: ctu-4 { }; 1552 ctu11: ctu-5 { }; 1553 ctu12: ctu-6 { }; 1554 ctu13: ctu-7 { }; 1555 }; 1556 1557 rcar_sound,dvc { 1558 dvc0: dvc-0 { 1559 dmas = <&audma0 0xbc>; 1560 dma-names = "tx"; 1561 }; 1562 dvc1: dvc-1 { 1563 dmas = <&audma0 0xbe>; 1564 dma-names = "tx"; 1565 }; 1566 }; 1567 1568 rcar_sound,mix { 1569 mix0: mix-0 { }; 1570 mix1: mix-1 { }; 1571 }; 1572 1573 rcar_sound,src { 1574 src0: src-0 { 1575 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1576 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1577 dma-names = "rx", "tx"; 1578 }; 1579 src1: src-1 { 1580 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1581 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1582 dma-names = "rx", "tx"; 1583 }; 1584 src2: src-2 { 1585 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1586 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1587 dma-names = "rx", "tx"; 1588 }; 1589 src3: src-3 { 1590 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1591 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1592 dma-names = "rx", "tx"; 1593 }; 1594 src4: src-4 { 1595 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1596 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1597 dma-names = "rx", "tx"; 1598 }; 1599 src5: src-5 { 1600 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1601 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1602 dma-names = "rx", "tx"; 1603 }; 1604 src6: src-6 { 1605 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1606 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1607 dma-names = "rx", "tx"; 1608 }; 1609 src7: src-7 { 1610 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1611 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1612 dma-names = "rx", "tx"; 1613 }; 1614 src8: src-8 { 1615 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1616 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1617 dma-names = "rx", "tx"; 1618 }; 1619 src9: src-9 { 1620 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1621 dmas = <&audma0 0x97>, <&audma0 0xba>; 1622 dma-names = "rx", "tx"; 1623 }; 1624 }; 1625 1626 rcar_sound,ssi { 1627 ssi0: ssi-0 { 1628 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1629 dmas = <&audma0 0x01>, <&audma0 0x02>, 1630 <&audma0 0x15>, <&audma0 0x16>; 1631 dma-names = "rx", "tx", "rxu", "txu"; 1632 }; 1633 ssi1: ssi-1 { 1634 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1635 dmas = <&audma0 0x03>, <&audma0 0x04>, 1636 <&audma0 0x49>, <&audma0 0x4a>; 1637 dma-names = "rx", "tx", "rxu", "txu"; 1638 }; 1639 ssi2: ssi-2 { 1640 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1641 dmas = <&audma0 0x05>, <&audma0 0x06>, 1642 <&audma0 0x63>, <&audma0 0x64>; 1643 dma-names = "rx", "tx", "rxu", "txu"; 1644 }; 1645 ssi3: ssi-3 { 1646 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1647 dmas = <&audma0 0x07>, <&audma0 0x08>, 1648 <&audma0 0x6f>, <&audma0 0x70>; 1649 dma-names = "rx", "tx", "rxu", "txu"; 1650 }; 1651 ssi4: ssi-4 { 1652 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1653 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1654 <&audma0 0x71>, <&audma0 0x72>; 1655 dma-names = "rx", "tx", "rxu", "txu"; 1656 }; 1657 ssi5: ssi-5 { 1658 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1659 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1660 <&audma0 0x73>, <&audma0 0x74>; 1661 dma-names = "rx", "tx", "rxu", "txu"; 1662 }; 1663 ssi6: ssi-6 { 1664 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1665 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1666 <&audma0 0x75>, <&audma0 0x76>; 1667 dma-names = "rx", "tx", "rxu", "txu"; 1668 }; 1669 ssi7: ssi-7 { 1670 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1671 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1672 <&audma0 0x79>, <&audma0 0x7a>; 1673 dma-names = "rx", "tx", "rxu", "txu"; 1674 }; 1675 ssi8: ssi-8 { 1676 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1677 dmas = <&audma0 0x11>, <&audma0 0x12>, 1678 <&audma0 0x7b>, <&audma0 0x7c>; 1679 dma-names = "rx", "tx", "rxu", "txu"; 1680 }; 1681 ssi9: ssi-9 { 1682 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1683 dmas = <&audma0 0x13>, <&audma0 0x14>, 1684 <&audma0 0x7d>, <&audma0 0x7e>; 1685 dma-names = "rx", "tx", "rxu", "txu"; 1686 }; 1687 }; 1688 }; 1689 1690 mlp: mlp@ec520000 { 1691 compatible = "renesas,r8a77990-mlp", 1692 "renesas,rcar-gen3-mlp"; 1693 reg = <0 0xec520000 0 0x800>; 1694 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 1695 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 1696 clocks = <&cpg CPG_MOD 802>; 1697 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1698 resets = <&cpg 802>; 1699 status = "disabled"; 1700 }; 1701 1702 audma0: dma-controller@ec700000 { 1703 compatible = "renesas,dmac-r8a77990", 1704 "renesas,rcar-dmac"; 1705 reg = <0 0xec700000 0 0x10000>; 1706 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1707 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1708 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1709 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1710 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1711 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1712 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1713 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1714 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1715 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1716 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1717 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1718 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1719 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1720 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1721 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1722 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1723 interrupt-names = "error", 1724 "ch0", "ch1", "ch2", "ch3", 1725 "ch4", "ch5", "ch6", "ch7", 1726 "ch8", "ch9", "ch10", "ch11", 1727 "ch12", "ch13", "ch14", "ch15"; 1728 clocks = <&cpg CPG_MOD 502>; 1729 clock-names = "fck"; 1730 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1731 resets = <&cpg 502>; 1732 #dma-cells = <1>; 1733 dma-channels = <16>; 1734 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1735 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1736 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1737 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1738 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1739 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1740 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1741 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1742 }; 1743 1744 xhci0: usb@ee000000 { 1745 compatible = "renesas,xhci-r8a77990", 1746 "renesas,rcar-gen3-xhci"; 1747 reg = <0 0xee000000 0 0xc00>; 1748 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1749 clocks = <&cpg CPG_MOD 328>; 1750 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1751 resets = <&cpg 328>; 1752 status = "disabled"; 1753 }; 1754 1755 usb3_peri0: usb@ee020000 { 1756 compatible = "renesas,r8a77990-usb3-peri", 1757 "renesas,rcar-gen3-usb3-peri"; 1758 reg = <0 0xee020000 0 0x400>; 1759 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1760 clocks = <&cpg CPG_MOD 328>; 1761 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1762 resets = <&cpg 328>; 1763 status = "disabled"; 1764 }; 1765 1766 ohci0: usb@ee080000 { 1767 compatible = "generic-ohci"; 1768 reg = <0 0xee080000 0 0x100>; 1769 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1770 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1771 phys = <&usb2_phy0 1>; 1772 phy-names = "usb"; 1773 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1774 resets = <&cpg 703>, <&cpg 704>; 1775 status = "disabled"; 1776 }; 1777 1778 ehci0: usb@ee080100 { 1779 compatible = "generic-ehci"; 1780 reg = <0 0xee080100 0 0x100>; 1781 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1782 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1783 phys = <&usb2_phy0 2>; 1784 phy-names = "usb"; 1785 companion = <&ohci0>; 1786 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1787 resets = <&cpg 703>, <&cpg 704>; 1788 status = "disabled"; 1789 }; 1790 1791 usb2_phy0: usb-phy@ee080200 { 1792 compatible = "renesas,usb2-phy-r8a77990", 1793 "renesas,rcar-gen3-usb2-phy"; 1794 reg = <0 0xee080200 0 0x700>; 1795 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1796 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1797 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1798 resets = <&cpg 703>, <&cpg 704>; 1799 #phy-cells = <1>; 1800 status = "disabled"; 1801 }; 1802 1803 sdhi0: mmc@ee100000 { 1804 compatible = "renesas,sdhi-r8a77990", 1805 "renesas,rcar-gen3-sdhi"; 1806 reg = <0 0xee100000 0 0x2000>; 1807 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1808 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>; 1809 clock-names = "core", "clkh"; 1810 max-frequency = <200000000>; 1811 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1812 resets = <&cpg 314>; 1813 iommus = <&ipmmu_ds1 32>; 1814 status = "disabled"; 1815 }; 1816 1817 sdhi1: mmc@ee120000 { 1818 compatible = "renesas,sdhi-r8a77990", 1819 "renesas,rcar-gen3-sdhi"; 1820 reg = <0 0xee120000 0 0x2000>; 1821 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1822 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>; 1823 clock-names = "core", "clkh"; 1824 max-frequency = <200000000>; 1825 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1826 resets = <&cpg 313>; 1827 iommus = <&ipmmu_ds1 33>; 1828 status = "disabled"; 1829 }; 1830 1831 sdhi3: mmc@ee160000 { 1832 compatible = "renesas,sdhi-r8a77990", 1833 "renesas,rcar-gen3-sdhi"; 1834 reg = <0 0xee160000 0 0x2000>; 1835 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1836 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>; 1837 clock-names = "core", "clkh"; 1838 max-frequency = <200000000>; 1839 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1840 resets = <&cpg 311>; 1841 iommus = <&ipmmu_ds1 35>; 1842 status = "disabled"; 1843 }; 1844 1845 rpc: spi@ee200000 { 1846 compatible = "renesas,r8a77990-rpc-if", 1847 "renesas,rcar-gen3-rpc-if"; 1848 reg = <0 0xee200000 0 0x200>, 1849 <0 0x08000000 0 0x04000000>, 1850 <0 0xee208000 0 0x100>; 1851 reg-names = "regs", "dirmap", "wbuf"; 1852 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1853 clocks = <&cpg CPG_MOD 917>; 1854 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1855 resets = <&cpg 917>; 1856 #address-cells = <1>; 1857 #size-cells = <0>; 1858 status = "disabled"; 1859 }; 1860 1861 gic: interrupt-controller@f1010000 { 1862 compatible = "arm,gic-400"; 1863 #interrupt-cells = <3>; 1864 #address-cells = <0>; 1865 interrupt-controller; 1866 reg = <0x0 0xf1010000 0 0x1000>, 1867 <0x0 0xf1020000 0 0x20000>, 1868 <0x0 0xf1040000 0 0x20000>, 1869 <0x0 0xf1060000 0 0x20000>; 1870 interrupts = <GIC_PPI 9 1871 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1872 clocks = <&cpg CPG_MOD 408>; 1873 clock-names = "clk"; 1874 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1875 resets = <&cpg 408>; 1876 }; 1877 1878 pciec0: pcie@fe000000 { 1879 compatible = "renesas,pcie-r8a77990", 1880 "renesas,pcie-rcar-gen3"; 1881 reg = <0 0xfe000000 0 0x80000>; 1882 #address-cells = <3>; 1883 #size-cells = <2>; 1884 bus-range = <0x00 0xff>; 1885 device_type = "pci"; 1886 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1887 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1888 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1889 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1890 /* Map all possible DDR/IOMMU as inbound ranges */ 1891 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 1892 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1893 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1894 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1895 #interrupt-cells = <1>; 1896 interrupt-map-mask = <0 0 0 0>; 1897 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1898 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1899 clock-names = "pcie", "pcie_bus"; 1900 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1901 resets = <&cpg 319>; 1902 iommu-map = <0 &ipmmu_hc 0 1>; 1903 iommu-map-mask = <0>; 1904 status = "disabled"; 1905 }; 1906 1907 vspb0: vsp@fe960000 { 1908 compatible = "renesas,vsp2"; 1909 reg = <0 0xfe960000 0 0x8000>; 1910 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1911 clocks = <&cpg CPG_MOD 626>; 1912 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1913 resets = <&cpg 626>; 1914 renesas,fcp = <&fcpvb0>; 1915 }; 1916 1917 fcpvb0: fcp@fe96f000 { 1918 compatible = "renesas,fcpv"; 1919 reg = <0 0xfe96f000 0 0x200>; 1920 clocks = <&cpg CPG_MOD 607>; 1921 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1922 resets = <&cpg 607>; 1923 iommus = <&ipmmu_vp0 5>; 1924 }; 1925 1926 vspi0: vsp@fe9a0000 { 1927 compatible = "renesas,vsp2"; 1928 reg = <0 0xfe9a0000 0 0x8000>; 1929 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1930 clocks = <&cpg CPG_MOD 631>; 1931 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1932 resets = <&cpg 631>; 1933 renesas,fcp = <&fcpvi0>; 1934 }; 1935 1936 fcpvi0: fcp@fe9af000 { 1937 compatible = "renesas,fcpv"; 1938 reg = <0 0xfe9af000 0 0x200>; 1939 clocks = <&cpg CPG_MOD 611>; 1940 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1941 resets = <&cpg 611>; 1942 iommus = <&ipmmu_vp0 8>; 1943 }; 1944 1945 vspd0: vsp@fea20000 { 1946 compatible = "renesas,vsp2"; 1947 reg = <0 0xfea20000 0 0x7000>; 1948 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1949 clocks = <&cpg CPG_MOD 623>; 1950 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1951 resets = <&cpg 623>; 1952 renesas,fcp = <&fcpvd0>; 1953 }; 1954 1955 fcpvd0: fcp@fea27000 { 1956 compatible = "renesas,fcpv"; 1957 reg = <0 0xfea27000 0 0x200>; 1958 clocks = <&cpg CPG_MOD 603>; 1959 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1960 resets = <&cpg 603>; 1961 iommus = <&ipmmu_vi0 8>; 1962 }; 1963 1964 vspd1: vsp@fea28000 { 1965 compatible = "renesas,vsp2"; 1966 reg = <0 0xfea28000 0 0x7000>; 1967 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1968 clocks = <&cpg CPG_MOD 622>; 1969 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1970 resets = <&cpg 622>; 1971 renesas,fcp = <&fcpvd1>; 1972 }; 1973 1974 fcpvd1: fcp@fea2f000 { 1975 compatible = "renesas,fcpv"; 1976 reg = <0 0xfea2f000 0 0x200>; 1977 clocks = <&cpg CPG_MOD 602>; 1978 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1979 resets = <&cpg 602>; 1980 iommus = <&ipmmu_vi0 9>; 1981 }; 1982 1983 cmm0: cmm@fea40000 { 1984 compatible = "renesas,r8a77990-cmm", 1985 "renesas,rcar-gen3-cmm"; 1986 reg = <0 0xfea40000 0 0x1000>; 1987 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1988 clocks = <&cpg CPG_MOD 711>; 1989 resets = <&cpg 711>; 1990 }; 1991 1992 cmm1: cmm@fea50000 { 1993 compatible = "renesas,r8a77990-cmm", 1994 "renesas,rcar-gen3-cmm"; 1995 reg = <0 0xfea50000 0 0x1000>; 1996 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1997 clocks = <&cpg CPG_MOD 710>; 1998 resets = <&cpg 710>; 1999 }; 2000 2001 csi40: csi2@feaa0000 { 2002 compatible = "renesas,r8a77990-csi2"; 2003 reg = <0 0xfeaa0000 0 0x10000>; 2004 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2005 clocks = <&cpg CPG_MOD 716>; 2006 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2007 resets = <&cpg 716>; 2008 status = "disabled"; 2009 2010 ports { 2011 #address-cells = <1>; 2012 #size-cells = <0>; 2013 2014 port@0 { 2015 reg = <0>; 2016 }; 2017 2018 port@1 { 2019 #address-cells = <1>; 2020 #size-cells = <0>; 2021 2022 reg = <1>; 2023 2024 csi40vin4: endpoint@0 { 2025 reg = <0>; 2026 remote-endpoint = <&vin4csi40>; 2027 }; 2028 csi40vin5: endpoint@1 { 2029 reg = <1>; 2030 remote-endpoint = <&vin5csi40>; 2031 }; 2032 }; 2033 }; 2034 }; 2035 2036 du: display@feb00000 { 2037 compatible = "renesas,du-r8a77990"; 2038 reg = <0 0xfeb00000 0 0x40000>; 2039 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2040 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 2041 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 2042 clock-names = "du.0", "du.1"; 2043 resets = <&cpg 724>; 2044 reset-names = "du.0"; 2045 2046 renesas,cmms = <&cmm0>, <&cmm1>; 2047 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2048 2049 status = "disabled"; 2050 2051 ports { 2052 #address-cells = <1>; 2053 #size-cells = <0>; 2054 2055 port@0 { 2056 reg = <0>; 2057 }; 2058 2059 port@1 { 2060 reg = <1>; 2061 du_out_lvds0: endpoint { 2062 remote-endpoint = <&lvds0_in>; 2063 }; 2064 }; 2065 2066 port@2 { 2067 reg = <2>; 2068 du_out_lvds1: endpoint { 2069 remote-endpoint = <&lvds1_in>; 2070 }; 2071 }; 2072 }; 2073 }; 2074 2075 lvds0: lvds-encoder@feb90000 { 2076 compatible = "renesas,r8a77990-lvds"; 2077 reg = <0 0xfeb90000 0 0x20>; 2078 clocks = <&cpg CPG_MOD 727>; 2079 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2080 resets = <&cpg 727>; 2081 status = "disabled"; 2082 2083 renesas,companion = <&lvds1>; 2084 2085 ports { 2086 #address-cells = <1>; 2087 #size-cells = <0>; 2088 2089 port@0 { 2090 reg = <0>; 2091 lvds0_in: endpoint { 2092 remote-endpoint = <&du_out_lvds0>; 2093 }; 2094 }; 2095 2096 port@1 { 2097 reg = <1>; 2098 }; 2099 }; 2100 }; 2101 2102 lvds1: lvds-encoder@feb90100 { 2103 compatible = "renesas,r8a77990-lvds"; 2104 reg = <0 0xfeb90100 0 0x20>; 2105 clocks = <&cpg CPG_MOD 727>; 2106 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2107 resets = <&cpg 726>; 2108 status = "disabled"; 2109 2110 ports { 2111 #address-cells = <1>; 2112 #size-cells = <0>; 2113 2114 port@0 { 2115 reg = <0>; 2116 lvds1_in: endpoint { 2117 remote-endpoint = <&du_out_lvds1>; 2118 }; 2119 }; 2120 2121 port@1 { 2122 reg = <1>; 2123 }; 2124 }; 2125 }; 2126 2127 prr: chipid@fff00044 { 2128 compatible = "renesas,prr"; 2129 reg = <0 0xfff00044 0 4>; 2130 bootph-all; 2131 }; 2132 }; 2133 2134 thermal-zones { 2135 cpu-thermal { 2136 polling-delay-passive = <250>; 2137 polling-delay = <0>; 2138 thermal-sensors = <&thermal>; 2139 sustainable-power = <717>; 2140 2141 cooling-maps { 2142 map0 { 2143 trip = <&target>; 2144 cooling-device = <&a53_0 0 2>; 2145 contribution = <1024>; 2146 }; 2147 }; 2148 2149 trips { 2150 sensor1_crit: sensor1-crit { 2151 temperature = <120000>; 2152 hysteresis = <2000>; 2153 type = "critical"; 2154 }; 2155 2156 target: trip-point1 { 2157 temperature = <100000>; 2158 hysteresis = <2000>; 2159 type = "passive"; 2160 }; 2161 }; 2162 }; 2163 }; 2164 2165 timer { 2166 compatible = "arm,armv8-timer"; 2167 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2168 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2169 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2170 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2171 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2172 }; 2173}; 2174