1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774e1 SoC 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a774e1-cpg-mssr.h> 11#include <dt-bindings/power/r8a774e1-sysc.h> 12 13/ { 14 compatible = "renesas,r8a774e1"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock - to be overridden by boards that provide it */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 46 }; 47 48 cluster0_opp: opp-table-0 { 49 compatible = "operating-points-v2"; 50 opp-shared; 51 52 opp-500000000 { 53 opp-hz = /bits/ 64 <500000000>; 54 opp-microvolt = <820000>; 55 clock-latency-ns = <300000>; 56 }; 57 opp-1000000000 { 58 opp-hz = /bits/ 64 <1000000000>; 59 opp-microvolt = <820000>; 60 clock-latency-ns = <300000>; 61 }; 62 opp-1500000000 { 63 opp-hz = /bits/ 64 <1500000000>; 64 opp-microvolt = <820000>; 65 clock-latency-ns = <300000>; 66 opp-suspend; 67 }; 68 }; 69 70 cluster1_opp: opp-table-1 { 71 compatible = "operating-points-v2"; 72 opp-shared; 73 74 opp-800000000 { 75 opp-hz = /bits/ 64 <800000000>; 76 opp-microvolt = <820000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1000000000 { 80 opp-hz = /bits/ 64 <1000000000>; 81 opp-microvolt = <820000>; 82 clock-latency-ns = <300000>; 83 }; 84 opp-1200000000 { 85 opp-hz = /bits/ 64 <1200000000>; 86 opp-microvolt = <820000>; 87 clock-latency-ns = <300000>; 88 }; 89 }; 90 91 cpus { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 95 cpu-map { 96 cluster0 { 97 core0 { 98 cpu = <&a57_0>; 99 }; 100 core1 { 101 cpu = <&a57_1>; 102 }; 103 core2 { 104 cpu = <&a57_2>; 105 }; 106 core3 { 107 cpu = <&a57_3>; 108 }; 109 }; 110 111 cluster1 { 112 core0 { 113 cpu = <&a53_0>; 114 }; 115 core1 { 116 cpu = <&a53_1>; 117 }; 118 core2 { 119 cpu = <&a53_2>; 120 }; 121 core3 { 122 cpu = <&a53_3>; 123 }; 124 }; 125 }; 126 127 a57_0: cpu@0 { 128 compatible = "arm,cortex-a57"; 129 reg = <0x0>; 130 device_type = "cpu"; 131 power-domains = <&sysc R8A774E1_PD_CA57_CPU0>; 132 next-level-cache = <&L2_CA57>; 133 enable-method = "psci"; 134 cpu-idle-states = <&CPU_SLEEP_0>; 135 dynamic-power-coefficient = <854>; 136 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>; 137 operating-points-v2 = <&cluster0_opp>; 138 capacity-dmips-mhz = <1024>; 139 #cooling-cells = <2>; 140 }; 141 142 a57_1: cpu@1 { 143 compatible = "arm,cortex-a57"; 144 reg = <0x1>; 145 device_type = "cpu"; 146 power-domains = <&sysc R8A774E1_PD_CA57_CPU1>; 147 next-level-cache = <&L2_CA57>; 148 enable-method = "psci"; 149 cpu-idle-states = <&CPU_SLEEP_0>; 150 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>; 151 operating-points-v2 = <&cluster0_opp>; 152 capacity-dmips-mhz = <1024>; 153 #cooling-cells = <2>; 154 }; 155 156 a57_2: cpu@2 { 157 compatible = "arm,cortex-a57"; 158 reg = <0x2>; 159 device_type = "cpu"; 160 power-domains = <&sysc R8A774E1_PD_CA57_CPU2>; 161 next-level-cache = <&L2_CA57>; 162 enable-method = "psci"; 163 cpu-idle-states = <&CPU_SLEEP_0>; 164 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>; 165 operating-points-v2 = <&cluster0_opp>; 166 capacity-dmips-mhz = <1024>; 167 #cooling-cells = <2>; 168 }; 169 170 a57_3: cpu@3 { 171 compatible = "arm,cortex-a57"; 172 reg = <0x3>; 173 device_type = "cpu"; 174 power-domains = <&sysc R8A774E1_PD_CA57_CPU3>; 175 next-level-cache = <&L2_CA57>; 176 enable-method = "psci"; 177 cpu-idle-states = <&CPU_SLEEP_0>; 178 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>; 179 operating-points-v2 = <&cluster0_opp>; 180 capacity-dmips-mhz = <1024>; 181 #cooling-cells = <2>; 182 }; 183 184 a53_0: cpu@100 { 185 compatible = "arm,cortex-a53"; 186 reg = <0x100>; 187 device_type = "cpu"; 188 power-domains = <&sysc R8A774E1_PD_CA53_CPU0>; 189 next-level-cache = <&L2_CA53>; 190 enable-method = "psci"; 191 cpu-idle-states = <&CPU_SLEEP_1>; 192 #cooling-cells = <2>; 193 dynamic-power-coefficient = <277>; 194 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>; 195 operating-points-v2 = <&cluster1_opp>; 196 capacity-dmips-mhz = <535>; 197 }; 198 199 a53_1: cpu@101 { 200 compatible = "arm,cortex-a53"; 201 reg = <0x101>; 202 device_type = "cpu"; 203 power-domains = <&sysc R8A774E1_PD_CA53_CPU1>; 204 next-level-cache = <&L2_CA53>; 205 enable-method = "psci"; 206 cpu-idle-states = <&CPU_SLEEP_1>; 207 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>; 208 operating-points-v2 = <&cluster1_opp>; 209 capacity-dmips-mhz = <535>; 210 }; 211 212 a53_2: cpu@102 { 213 compatible = "arm,cortex-a53"; 214 reg = <0x102>; 215 device_type = "cpu"; 216 power-domains = <&sysc R8A774E1_PD_CA53_CPU2>; 217 next-level-cache = <&L2_CA53>; 218 enable-method = "psci"; 219 cpu-idle-states = <&CPU_SLEEP_1>; 220 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>; 221 operating-points-v2 = <&cluster1_opp>; 222 capacity-dmips-mhz = <535>; 223 }; 224 225 a53_3: cpu@103 { 226 compatible = "arm,cortex-a53"; 227 reg = <0x103>; 228 device_type = "cpu"; 229 power-domains = <&sysc R8A774E1_PD_CA53_CPU3>; 230 next-level-cache = <&L2_CA53>; 231 enable-method = "psci"; 232 cpu-idle-states = <&CPU_SLEEP_1>; 233 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>; 234 operating-points-v2 = <&cluster1_opp>; 235 capacity-dmips-mhz = <535>; 236 }; 237 238 L2_CA57: cache-controller-0 { 239 compatible = "cache"; 240 power-domains = <&sysc R8A774E1_PD_CA57_SCU>; 241 cache-unified; 242 cache-level = <2>; 243 }; 244 245 L2_CA53: cache-controller-1 { 246 compatible = "cache"; 247 power-domains = <&sysc R8A774E1_PD_CA53_SCU>; 248 cache-unified; 249 cache-level = <2>; 250 }; 251 252 idle-states { 253 entry-method = "psci"; 254 255 CPU_SLEEP_0: cpu-sleep-0 { 256 compatible = "arm,idle-state"; 257 arm,psci-suspend-param = <0x0010000>; 258 local-timer-stop; 259 entry-latency-us = <400>; 260 exit-latency-us = <500>; 261 min-residency-us = <4000>; 262 }; 263 264 CPU_SLEEP_1: cpu-sleep-1 { 265 compatible = "arm,idle-state"; 266 arm,psci-suspend-param = <0x0010000>; 267 local-timer-stop; 268 entry-latency-us = <700>; 269 exit-latency-us = <700>; 270 min-residency-us = <5000>; 271 }; 272 }; 273 }; 274 275 extal_clk: extal { 276 compatible = "fixed-clock"; 277 #clock-cells = <0>; 278 /* This value must be overridden by the board */ 279 clock-frequency = <0>; 280 bootph-all; 281 }; 282 283 extalr_clk: extalr { 284 compatible = "fixed-clock"; 285 #clock-cells = <0>; 286 /* This value must be overridden by the board */ 287 clock-frequency = <0>; 288 bootph-all; 289 }; 290 291 /* External PCIe clock - can be overridden by the board */ 292 pcie_bus_clk: pcie_bus { 293 compatible = "fixed-clock"; 294 #clock-cells = <0>; 295 clock-frequency = <0>; 296 }; 297 298 pmu_a53 { 299 compatible = "arm,cortex-a53-pmu"; 300 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 301 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 302 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 303 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 304 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 305 }; 306 307 pmu_a57 { 308 compatible = "arm,cortex-a57-pmu"; 309 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 310 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 311 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 312 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 313 interrupt-affinity = <&a57_0>, <&a57_1>, <&a57_2>, <&a57_3>; 314 }; 315 316 psci { 317 compatible = "arm,psci-1.0", "arm,psci-0.2"; 318 method = "smc"; 319 }; 320 321 /* External SCIF clock - to be overridden by boards that provide it */ 322 scif_clk: scif { 323 compatible = "fixed-clock"; 324 #clock-cells = <0>; 325 clock-frequency = <0>; 326 }; 327 328 soc { 329 compatible = "simple-bus"; 330 interrupt-parent = <&gic>; 331 bootph-all; 332 333 #address-cells = <2>; 334 #size-cells = <2>; 335 ranges; 336 337 rwdt: watchdog@e6020000 { 338 compatible = "renesas,r8a774e1-wdt", 339 "renesas,rcar-gen3-wdt"; 340 reg = <0 0xe6020000 0 0x0c>; 341 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 342 clocks = <&cpg CPG_MOD 402>; 343 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 344 resets = <&cpg 402>; 345 status = "disabled"; 346 }; 347 348 gpio0: gpio@e6050000 { 349 compatible = "renesas,gpio-r8a774e1", 350 "renesas,rcar-gen3-gpio"; 351 reg = <0 0xe6050000 0 0x50>; 352 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 353 #gpio-cells = <2>; 354 gpio-controller; 355 gpio-ranges = <&pfc 0 0 16>; 356 #interrupt-cells = <2>; 357 interrupt-controller; 358 clocks = <&cpg CPG_MOD 912>; 359 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 360 resets = <&cpg 912>; 361 }; 362 363 gpio1: gpio@e6051000 { 364 compatible = "renesas,gpio-r8a774e1", 365 "renesas,rcar-gen3-gpio"; 366 reg = <0 0xe6051000 0 0x50>; 367 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 368 #gpio-cells = <2>; 369 gpio-controller; 370 gpio-ranges = <&pfc 0 32 29>; 371 #interrupt-cells = <2>; 372 interrupt-controller; 373 clocks = <&cpg CPG_MOD 911>; 374 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 375 resets = <&cpg 911>; 376 }; 377 378 gpio2: gpio@e6052000 { 379 compatible = "renesas,gpio-r8a774e1", 380 "renesas,rcar-gen3-gpio"; 381 reg = <0 0xe6052000 0 0x50>; 382 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 383 #gpio-cells = <2>; 384 gpio-controller; 385 gpio-ranges = <&pfc 0 64 15>; 386 #interrupt-cells = <2>; 387 interrupt-controller; 388 clocks = <&cpg CPG_MOD 910>; 389 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 390 resets = <&cpg 910>; 391 }; 392 393 gpio3: gpio@e6053000 { 394 compatible = "renesas,gpio-r8a774e1", 395 "renesas,rcar-gen3-gpio"; 396 reg = <0 0xe6053000 0 0x50>; 397 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 398 #gpio-cells = <2>; 399 gpio-controller; 400 gpio-ranges = <&pfc 0 96 16>; 401 #interrupt-cells = <2>; 402 interrupt-controller; 403 clocks = <&cpg CPG_MOD 909>; 404 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 405 resets = <&cpg 909>; 406 }; 407 408 gpio4: gpio@e6054000 { 409 compatible = "renesas,gpio-r8a774e1", 410 "renesas,rcar-gen3-gpio"; 411 reg = <0 0xe6054000 0 0x50>; 412 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 413 #gpio-cells = <2>; 414 gpio-controller; 415 gpio-ranges = <&pfc 0 128 18>; 416 #interrupt-cells = <2>; 417 interrupt-controller; 418 clocks = <&cpg CPG_MOD 908>; 419 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 420 resets = <&cpg 908>; 421 }; 422 423 gpio5: gpio@e6055000 { 424 compatible = "renesas,gpio-r8a774e1", 425 "renesas,rcar-gen3-gpio"; 426 reg = <0 0xe6055000 0 0x50>; 427 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 428 #gpio-cells = <2>; 429 gpio-controller; 430 gpio-ranges = <&pfc 0 160 26>; 431 #interrupt-cells = <2>; 432 interrupt-controller; 433 clocks = <&cpg CPG_MOD 907>; 434 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 435 resets = <&cpg 907>; 436 }; 437 438 gpio6: gpio@e6055400 { 439 compatible = "renesas,gpio-r8a774e1", 440 "renesas,rcar-gen3-gpio"; 441 reg = <0 0xe6055400 0 0x50>; 442 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 443 #gpio-cells = <2>; 444 gpio-controller; 445 gpio-ranges = <&pfc 0 192 32>; 446 #interrupt-cells = <2>; 447 interrupt-controller; 448 clocks = <&cpg CPG_MOD 906>; 449 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 450 resets = <&cpg 906>; 451 }; 452 453 gpio7: gpio@e6055800 { 454 compatible = "renesas,gpio-r8a774e1", 455 "renesas,rcar-gen3-gpio"; 456 reg = <0 0xe6055800 0 0x50>; 457 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 458 #gpio-cells = <2>; 459 gpio-controller; 460 gpio-ranges = <&pfc 0 224 4>; 461 #interrupt-cells = <2>; 462 interrupt-controller; 463 clocks = <&cpg CPG_MOD 905>; 464 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 465 resets = <&cpg 905>; 466 }; 467 468 pfc: pinctrl@e6060000 { 469 compatible = "renesas,pfc-r8a774e1"; 470 reg = <0 0xe6060000 0 0x50c>; 471 bootph-all; 472 }; 473 474 cmt0: timer@e60f0000 { 475 compatible = "renesas,r8a774e1-cmt0", 476 "renesas,rcar-gen3-cmt0"; 477 reg = <0 0xe60f0000 0 0x1004>; 478 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 480 clocks = <&cpg CPG_MOD 303>; 481 clock-names = "fck"; 482 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 483 resets = <&cpg 303>; 484 status = "disabled"; 485 }; 486 487 cmt1: timer@e6130000 { 488 compatible = "renesas,r8a774e1-cmt1", 489 "renesas,rcar-gen3-cmt1"; 490 reg = <0 0xe6130000 0 0x1004>; 491 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 492 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 493 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 494 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 495 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 496 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 497 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 499 clocks = <&cpg CPG_MOD 302>; 500 clock-names = "fck"; 501 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 502 resets = <&cpg 302>; 503 status = "disabled"; 504 }; 505 506 cmt2: timer@e6140000 { 507 compatible = "renesas,r8a774e1-cmt1", 508 "renesas,rcar-gen3-cmt1"; 509 reg = <0 0xe6140000 0 0x1004>; 510 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 518 clocks = <&cpg CPG_MOD 301>; 519 clock-names = "fck"; 520 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 521 resets = <&cpg 301>; 522 status = "disabled"; 523 }; 524 525 cmt3: timer@e6148000 { 526 compatible = "renesas,r8a774e1-cmt1", 527 "renesas,rcar-gen3-cmt1"; 528 reg = <0 0xe6148000 0 0x1004>; 529 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 532 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 533 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 534 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 535 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 536 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 537 clocks = <&cpg CPG_MOD 300>; 538 clock-names = "fck"; 539 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 540 resets = <&cpg 300>; 541 status = "disabled"; 542 }; 543 544 cpg: clock-controller@e6150000 { 545 compatible = "renesas,r8a774e1-cpg-mssr"; 546 reg = <0 0xe6150000 0 0x1000>; 547 clocks = <&extal_clk>, <&extalr_clk>; 548 clock-names = "extal", "extalr"; 549 #clock-cells = <2>; 550 #power-domain-cells = <0>; 551 #reset-cells = <1>; 552 bootph-all; 553 }; 554 555 rst: reset-controller@e6160000 { 556 compatible = "renesas,r8a774e1-rst"; 557 reg = <0 0xe6160000 0 0x0200>; 558 bootph-all; 559 }; 560 561 sysc: system-controller@e6180000 { 562 compatible = "renesas,r8a774e1-sysc"; 563 reg = <0 0xe6180000 0 0x0400>; 564 #power-domain-cells = <1>; 565 }; 566 567 tsc: thermal@e6198000 { 568 compatible = "renesas,r8a774e1-thermal"; 569 reg = <0 0xe6198000 0 0x100>, 570 <0 0xe61a0000 0 0x100>, 571 <0 0xe61a8000 0 0x100>; 572 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 573 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 574 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 575 clocks = <&cpg CPG_MOD 522>; 576 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 577 resets = <&cpg 522>; 578 #thermal-sensor-cells = <1>; 579 }; 580 581 intc_ex: interrupt-controller@e61c0000 { 582 compatible = "renesas,intc-ex-r8a774e1", "renesas,irqc"; 583 #interrupt-cells = <2>; 584 interrupt-controller; 585 reg = <0 0xe61c0000 0 0x200>; 586 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 587 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 588 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 589 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 590 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 591 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 592 clocks = <&cpg CPG_MOD 407>; 593 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 594 resets = <&cpg 407>; 595 }; 596 597 tmu0: timer@e61e0000 { 598 compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; 599 reg = <0 0xe61e0000 0 0x30>; 600 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 601 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 602 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 603 interrupt-names = "tuni0", "tuni1", "tuni2"; 604 clocks = <&cpg CPG_MOD 125>; 605 clock-names = "fck"; 606 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 607 resets = <&cpg 125>; 608 status = "disabled"; 609 }; 610 611 tmu1: timer@e6fc0000 { 612 compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; 613 reg = <0 0xe6fc0000 0 0x30>; 614 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 615 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 616 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 617 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 618 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 619 clocks = <&cpg CPG_MOD 124>; 620 clock-names = "fck"; 621 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 622 resets = <&cpg 124>; 623 status = "disabled"; 624 }; 625 626 tmu2: timer@e6fd0000 { 627 compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; 628 reg = <0 0xe6fd0000 0 0x30>; 629 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 630 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 631 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 632 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 633 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 634 clocks = <&cpg CPG_MOD 123>; 635 clock-names = "fck"; 636 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 637 resets = <&cpg 123>; 638 status = "disabled"; 639 }; 640 641 tmu3: timer@e6fe0000 { 642 compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; 643 reg = <0 0xe6fe0000 0 0x30>; 644 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 647 interrupt-names = "tuni0", "tuni1", "tuni2"; 648 clocks = <&cpg CPG_MOD 122>; 649 clock-names = "fck"; 650 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 651 resets = <&cpg 122>; 652 status = "disabled"; 653 }; 654 655 tmu4: timer@ffc00000 { 656 compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; 657 reg = <0 0xffc00000 0 0x30>; 658 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 659 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 660 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 661 interrupt-names = "tuni0", "tuni1", "tuni2"; 662 clocks = <&cpg CPG_MOD 121>; 663 clock-names = "fck"; 664 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 665 resets = <&cpg 121>; 666 status = "disabled"; 667 }; 668 669 i2c0: i2c@e6500000 { 670 #address-cells = <1>; 671 #size-cells = <0>; 672 compatible = "renesas,i2c-r8a774e1", 673 "renesas,rcar-gen3-i2c"; 674 reg = <0 0xe6500000 0 0x40>; 675 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 676 clocks = <&cpg CPG_MOD 931>; 677 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 678 resets = <&cpg 931>; 679 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 680 <&dmac2 0x91>, <&dmac2 0x90>; 681 dma-names = "tx", "rx", "tx", "rx"; 682 i2c-scl-internal-delay-ns = <110>; 683 status = "disabled"; 684 }; 685 686 i2c1: i2c@e6508000 { 687 #address-cells = <1>; 688 #size-cells = <0>; 689 compatible = "renesas,i2c-r8a774e1", 690 "renesas,rcar-gen3-i2c"; 691 reg = <0 0xe6508000 0 0x40>; 692 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 693 clocks = <&cpg CPG_MOD 930>; 694 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 695 resets = <&cpg 930>; 696 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 697 <&dmac2 0x93>, <&dmac2 0x92>; 698 dma-names = "tx", "rx", "tx", "rx"; 699 i2c-scl-internal-delay-ns = <6>; 700 status = "disabled"; 701 }; 702 703 i2c2: i2c@e6510000 { 704 #address-cells = <1>; 705 #size-cells = <0>; 706 compatible = "renesas,i2c-r8a774e1", 707 "renesas,rcar-gen3-i2c"; 708 reg = <0 0xe6510000 0 0x40>; 709 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 710 clocks = <&cpg CPG_MOD 929>; 711 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 712 resets = <&cpg 929>; 713 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 714 <&dmac2 0x95>, <&dmac2 0x94>; 715 dma-names = "tx", "rx", "tx", "rx"; 716 i2c-scl-internal-delay-ns = <6>; 717 status = "disabled"; 718 }; 719 720 i2c3: i2c@e66d0000 { 721 #address-cells = <1>; 722 #size-cells = <0>; 723 compatible = "renesas,i2c-r8a774e1", 724 "renesas,rcar-gen3-i2c"; 725 reg = <0 0xe66d0000 0 0x40>; 726 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 727 clocks = <&cpg CPG_MOD 928>; 728 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 729 resets = <&cpg 928>; 730 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 731 dma-names = "tx", "rx"; 732 i2c-scl-internal-delay-ns = <110>; 733 status = "disabled"; 734 }; 735 736 i2c4: i2c@e66d8000 { 737 #address-cells = <1>; 738 #size-cells = <0>; 739 compatible = "renesas,i2c-r8a774e1", 740 "renesas,rcar-gen3-i2c"; 741 reg = <0 0xe66d8000 0 0x40>; 742 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 743 clocks = <&cpg CPG_MOD 927>; 744 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 745 resets = <&cpg 927>; 746 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 747 dma-names = "tx", "rx"; 748 i2c-scl-internal-delay-ns = <110>; 749 status = "disabled"; 750 }; 751 752 i2c5: i2c@e66e0000 { 753 #address-cells = <1>; 754 #size-cells = <0>; 755 compatible = "renesas,i2c-r8a774e1", 756 "renesas,rcar-gen3-i2c"; 757 reg = <0 0xe66e0000 0 0x40>; 758 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 759 clocks = <&cpg CPG_MOD 919>; 760 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 761 resets = <&cpg 919>; 762 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 763 dma-names = "tx", "rx"; 764 i2c-scl-internal-delay-ns = <110>; 765 status = "disabled"; 766 }; 767 768 i2c6: i2c@e66e8000 { 769 #address-cells = <1>; 770 #size-cells = <0>; 771 compatible = "renesas,i2c-r8a774e1", 772 "renesas,rcar-gen3-i2c"; 773 reg = <0 0xe66e8000 0 0x40>; 774 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 775 clocks = <&cpg CPG_MOD 918>; 776 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 777 resets = <&cpg 918>; 778 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 779 dma-names = "tx", "rx"; 780 i2c-scl-internal-delay-ns = <6>; 781 status = "disabled"; 782 }; 783 784 iic_pmic: i2c@e60b0000 { 785 #address-cells = <1>; 786 #size-cells = <0>; 787 compatible = "renesas,iic-r8a774e1", 788 "renesas,rcar-gen3-iic", 789 "renesas,rmobile-iic"; 790 reg = <0 0xe60b0000 0 0x425>; 791 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 792 clocks = <&cpg CPG_MOD 926>; 793 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 794 resets = <&cpg 926>; 795 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 796 dma-names = "tx", "rx"; 797 status = "disabled"; 798 }; 799 800 hscif0: serial@e6540000 { 801 compatible = "renesas,hscif-r8a774e1", 802 "renesas,rcar-gen3-hscif", 803 "renesas,hscif"; 804 reg = <0 0xe6540000 0 0x60>; 805 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 806 clocks = <&cpg CPG_MOD 520>, 807 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 808 <&scif_clk>; 809 clock-names = "fck", "brg_int", "scif_clk"; 810 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 811 <&dmac2 0x31>, <&dmac2 0x30>; 812 dma-names = "tx", "rx", "tx", "rx"; 813 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 814 resets = <&cpg 520>; 815 status = "disabled"; 816 }; 817 818 hscif1: serial@e6550000 { 819 compatible = "renesas,hscif-r8a774e1", 820 "renesas,rcar-gen3-hscif", 821 "renesas,hscif"; 822 reg = <0 0xe6550000 0 0x60>; 823 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 824 clocks = <&cpg CPG_MOD 519>, 825 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 826 <&scif_clk>; 827 clock-names = "fck", "brg_int", "scif_clk"; 828 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 829 <&dmac2 0x33>, <&dmac2 0x32>; 830 dma-names = "tx", "rx", "tx", "rx"; 831 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 832 resets = <&cpg 519>; 833 status = "disabled"; 834 }; 835 836 hscif2: serial@e6560000 { 837 compatible = "renesas,hscif-r8a774e1", 838 "renesas,rcar-gen3-hscif", 839 "renesas,hscif"; 840 reg = <0 0xe6560000 0 0x60>; 841 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 842 clocks = <&cpg CPG_MOD 518>, 843 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 844 <&scif_clk>; 845 clock-names = "fck", "brg_int", "scif_clk"; 846 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 847 <&dmac2 0x35>, <&dmac2 0x34>; 848 dma-names = "tx", "rx", "tx", "rx"; 849 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 850 resets = <&cpg 518>; 851 status = "disabled"; 852 }; 853 854 hscif3: serial@e66a0000 { 855 compatible = "renesas,hscif-r8a774e1", 856 "renesas,rcar-gen3-hscif", 857 "renesas,hscif"; 858 reg = <0 0xe66a0000 0 0x60>; 859 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 860 clocks = <&cpg CPG_MOD 517>, 861 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 862 <&scif_clk>; 863 clock-names = "fck", "brg_int", "scif_clk"; 864 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 865 dma-names = "tx", "rx"; 866 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 867 resets = <&cpg 517>; 868 status = "disabled"; 869 }; 870 871 hscif4: serial@e66b0000 { 872 compatible = "renesas,hscif-r8a774e1", 873 "renesas,rcar-gen3-hscif", 874 "renesas,hscif"; 875 reg = <0 0xe66b0000 0 0x60>; 876 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 877 clocks = <&cpg CPG_MOD 516>, 878 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 879 <&scif_clk>; 880 clock-names = "fck", "brg_int", "scif_clk"; 881 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 882 dma-names = "tx", "rx"; 883 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 884 resets = <&cpg 516>; 885 status = "disabled"; 886 }; 887 888 hsusb: usb@e6590000 { 889 compatible = "renesas,usbhs-r8a774e1", 890 "renesas,rcar-gen3-usbhs"; 891 reg = <0 0xe6590000 0 0x200>; 892 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 893 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 894 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 895 <&usb_dmac1 0>, <&usb_dmac1 1>; 896 dma-names = "ch0", "ch1", "ch2", "ch3"; 897 renesas,buswait = <11>; 898 phys = <&usb2_phy0 3>; 899 phy-names = "usb"; 900 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 901 resets = <&cpg 704>, <&cpg 703>; 902 status = "disabled"; 903 }; 904 905 usb2_clksel: clock-controller@e6590630 { 906 compatible = "renesas,r8a774e1-rcar-usb2-clock-sel", 907 "renesas,rcar-gen3-usb2-clock-sel"; 908 reg = <0 0xe6590630 0 0x02>; 909 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, 910 <&usb_extal_clk>, <&usb3s0_clk>; 911 clock-names = "ehci_ohci", "hs-usb-if", 912 "usb_extal", "usb_xtal"; 913 #clock-cells = <0>; 914 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 915 resets = <&cpg 703>, <&cpg 704>; 916 reset-names = "ehci_ohci", "hs-usb-if"; 917 status = "disabled"; 918 }; 919 920 usb_dmac0: dma-controller@e65a0000 { 921 compatible = "renesas,r8a774e1-usb-dmac", 922 "renesas,usb-dmac"; 923 reg = <0 0xe65a0000 0 0x100>; 924 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 926 interrupt-names = "ch0", "ch1"; 927 clocks = <&cpg CPG_MOD 330>; 928 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 929 resets = <&cpg 330>; 930 #dma-cells = <1>; 931 dma-channels = <2>; 932 }; 933 934 usb_dmac1: dma-controller@e65b0000 { 935 compatible = "renesas,r8a774e1-usb-dmac", 936 "renesas,usb-dmac"; 937 reg = <0 0xe65b0000 0 0x100>; 938 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 939 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 940 interrupt-names = "ch0", "ch1"; 941 clocks = <&cpg CPG_MOD 331>; 942 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 943 resets = <&cpg 331>; 944 #dma-cells = <1>; 945 dma-channels = <2>; 946 }; 947 948 usb3_phy0: usb-phy@e65ee000 { 949 compatible = "renesas,r8a774e1-usb3-phy", 950 "renesas,rcar-gen3-usb3-phy"; 951 reg = <0 0xe65ee000 0 0x90>; 952 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 953 <&usb_extal_clk>; 954 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 955 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 956 resets = <&cpg 328>; 957 #phy-cells = <0>; 958 status = "disabled"; 959 }; 960 961 dmac0: dma-controller@e6700000 { 962 compatible = "renesas,dmac-r8a774e1", 963 "renesas,rcar-dmac"; 964 reg = <0 0xe6700000 0 0x10000>; 965 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 982 interrupt-names = "error", 983 "ch0", "ch1", "ch2", "ch3", 984 "ch4", "ch5", "ch6", "ch7", 985 "ch8", "ch9", "ch10", "ch11", 986 "ch12", "ch13", "ch14", "ch15"; 987 clocks = <&cpg CPG_MOD 219>; 988 clock-names = "fck"; 989 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 990 resets = <&cpg 219>; 991 #dma-cells = <1>; 992 dma-channels = <16>; 993 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 994 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 995 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 996 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 997 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 998 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 999 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1000 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1001 }; 1002 1003 dmac1: dma-controller@e7300000 { 1004 compatible = "renesas,dmac-r8a774e1", 1005 "renesas,rcar-dmac"; 1006 reg = <0 0xe7300000 0 0x10000>; 1007 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 1008 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 1009 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 1010 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 1011 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 1012 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 1013 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 1014 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 1015 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 1016 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 1017 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 1018 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 1019 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1020 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1024 interrupt-names = "error", 1025 "ch0", "ch1", "ch2", "ch3", 1026 "ch4", "ch5", "ch6", "ch7", 1027 "ch8", "ch9", "ch10", "ch11", 1028 "ch12", "ch13", "ch14", "ch15"; 1029 clocks = <&cpg CPG_MOD 218>; 1030 clock-names = "fck"; 1031 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1032 resets = <&cpg 218>; 1033 #dma-cells = <1>; 1034 dma-channels = <16>; 1035 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1036 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1037 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1038 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1039 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1040 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1041 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1042 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1043 }; 1044 1045 dmac2: dma-controller@e7310000 { 1046 compatible = "renesas,dmac-r8a774e1", 1047 "renesas,rcar-dmac"; 1048 reg = <0 0xe7310000 0 0x10000>; 1049 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1050 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1051 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1052 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1053 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1054 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1055 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1056 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1057 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1058 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1059 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1060 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1061 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1062 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1063 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1064 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1065 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1066 interrupt-names = "error", 1067 "ch0", "ch1", "ch2", "ch3", 1068 "ch4", "ch5", "ch6", "ch7", 1069 "ch8", "ch9", "ch10", "ch11", 1070 "ch12", "ch13", "ch14", "ch15"; 1071 clocks = <&cpg CPG_MOD 217>; 1072 clock-names = "fck"; 1073 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1074 resets = <&cpg 217>; 1075 #dma-cells = <1>; 1076 dma-channels = <16>; 1077 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1078 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1079 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1080 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1081 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1082 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1083 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1084 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1085 }; 1086 1087 ipmmu_ds0: iommu@e6740000 { 1088 compatible = "renesas,ipmmu-r8a774e1"; 1089 reg = <0 0xe6740000 0 0x1000>; 1090 renesas,ipmmu-main = <&ipmmu_mm 0>; 1091 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1092 #iommu-cells = <1>; 1093 }; 1094 1095 ipmmu_ds1: iommu@e7740000 { 1096 compatible = "renesas,ipmmu-r8a774e1"; 1097 reg = <0 0xe7740000 0 0x1000>; 1098 renesas,ipmmu-main = <&ipmmu_mm 1>; 1099 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1100 #iommu-cells = <1>; 1101 }; 1102 1103 ipmmu_hc: iommu@e6570000 { 1104 compatible = "renesas,ipmmu-r8a774e1"; 1105 reg = <0 0xe6570000 0 0x1000>; 1106 renesas,ipmmu-main = <&ipmmu_mm 2>; 1107 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1108 #iommu-cells = <1>; 1109 }; 1110 1111 ipmmu_mm: iommu@e67b0000 { 1112 compatible = "renesas,ipmmu-r8a774e1"; 1113 reg = <0 0xe67b0000 0 0x1000>; 1114 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1115 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1116 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1117 #iommu-cells = <1>; 1118 }; 1119 1120 ipmmu_mp0: iommu@ec670000 { 1121 compatible = "renesas,ipmmu-r8a774e1"; 1122 reg = <0 0xec670000 0 0x1000>; 1123 renesas,ipmmu-main = <&ipmmu_mm 4>; 1124 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1125 #iommu-cells = <1>; 1126 }; 1127 1128 ipmmu_pv0: iommu@fd800000 { 1129 compatible = "renesas,ipmmu-r8a774e1"; 1130 reg = <0 0xfd800000 0 0x1000>; 1131 renesas,ipmmu-main = <&ipmmu_mm 6>; 1132 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1133 #iommu-cells = <1>; 1134 }; 1135 1136 ipmmu_pv1: iommu@fd950000 { 1137 compatible = "renesas,ipmmu-r8a774e1"; 1138 reg = <0 0xfd950000 0 0x1000>; 1139 renesas,ipmmu-main = <&ipmmu_mm 7>; 1140 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1141 #iommu-cells = <1>; 1142 }; 1143 1144 ipmmu_pv2: iommu@fd960000 { 1145 compatible = "renesas,ipmmu-r8a774e1"; 1146 reg = <0 0xfd960000 0 0x1000>; 1147 renesas,ipmmu-main = <&ipmmu_mm 8>; 1148 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1149 #iommu-cells = <1>; 1150 }; 1151 1152 ipmmu_pv3: iommu@fd970000 { 1153 compatible = "renesas,ipmmu-r8a774e1"; 1154 reg = <0 0xfd970000 0 0x1000>; 1155 renesas,ipmmu-main = <&ipmmu_mm 9>; 1156 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1157 #iommu-cells = <1>; 1158 }; 1159 1160 ipmmu_vc0: iommu@fe6b0000 { 1161 compatible = "renesas,ipmmu-r8a774e1"; 1162 reg = <0 0xfe6b0000 0 0x1000>; 1163 renesas,ipmmu-main = <&ipmmu_mm 12>; 1164 power-domains = <&sysc R8A774E1_PD_A3VC>; 1165 #iommu-cells = <1>; 1166 }; 1167 1168 ipmmu_vc1: iommu@fe6f0000 { 1169 compatible = "renesas,ipmmu-r8a774e1"; 1170 reg = <0 0xfe6f0000 0 0x1000>; 1171 renesas,ipmmu-main = <&ipmmu_mm 13>; 1172 power-domains = <&sysc R8A774E1_PD_A3VC>; 1173 #iommu-cells = <1>; 1174 }; 1175 1176 ipmmu_vi0: iommu@febd0000 { 1177 compatible = "renesas,ipmmu-r8a774e1"; 1178 reg = <0 0xfebd0000 0 0x1000>; 1179 renesas,ipmmu-main = <&ipmmu_mm 14>; 1180 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1181 #iommu-cells = <1>; 1182 }; 1183 1184 ipmmu_vi1: iommu@febe0000 { 1185 compatible = "renesas,ipmmu-r8a774e1"; 1186 reg = <0 0xfebe0000 0 0x1000>; 1187 renesas,ipmmu-main = <&ipmmu_mm 15>; 1188 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1189 #iommu-cells = <1>; 1190 }; 1191 1192 ipmmu_vp0: iommu@fe990000 { 1193 compatible = "renesas,ipmmu-r8a774e1"; 1194 reg = <0 0xfe990000 0 0x1000>; 1195 renesas,ipmmu-main = <&ipmmu_mm 16>; 1196 power-domains = <&sysc R8A774E1_PD_A3VP>; 1197 #iommu-cells = <1>; 1198 }; 1199 1200 ipmmu_vp1: iommu@fe980000 { 1201 compatible = "renesas,ipmmu-r8a774e1"; 1202 reg = <0 0xfe980000 0 0x1000>; 1203 renesas,ipmmu-main = <&ipmmu_mm 17>; 1204 power-domains = <&sysc R8A774E1_PD_A3VP>; 1205 #iommu-cells = <1>; 1206 }; 1207 1208 avb: ethernet@e6800000 { 1209 compatible = "renesas,etheravb-r8a774e1", 1210 "renesas,etheravb-rcar-gen3"; 1211 reg = <0 0xe6800000 0 0x800>; 1212 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1213 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1214 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1215 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1216 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1217 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1218 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1219 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1220 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1221 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1222 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1223 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1224 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1225 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1226 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1227 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1228 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1229 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1230 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1231 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1232 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1233 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1234 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1235 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1236 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1237 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1238 "ch4", "ch5", "ch6", "ch7", 1239 "ch8", "ch9", "ch10", "ch11", 1240 "ch12", "ch13", "ch14", "ch15", 1241 "ch16", "ch17", "ch18", "ch19", 1242 "ch20", "ch21", "ch22", "ch23", 1243 "ch24"; 1244 clocks = <&cpg CPG_MOD 812>; 1245 clock-names = "fck"; 1246 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1247 resets = <&cpg 812>; 1248 phy-mode = "rgmii"; 1249 rx-internal-delay-ps = <0>; 1250 tx-internal-delay-ps = <0>; 1251 iommus = <&ipmmu_ds0 16>; 1252 #address-cells = <1>; 1253 #size-cells = <0>; 1254 status = "disabled"; 1255 }; 1256 1257 can0: can@e6c30000 { 1258 compatible = "renesas,can-r8a774e1", 1259 "renesas,rcar-gen3-can"; 1260 reg = <0 0xe6c30000 0 0x1000>; 1261 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1262 clocks = <&cpg CPG_MOD 916>, 1263 <&cpg CPG_CORE R8A774E1_CLK_CANFD>, 1264 <&can_clk>; 1265 clock-names = "clkp1", "clkp2", "can_clk"; 1266 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>; 1267 assigned-clock-rates = <40000000>; 1268 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1269 resets = <&cpg 916>; 1270 status = "disabled"; 1271 }; 1272 1273 can1: can@e6c38000 { 1274 compatible = "renesas,can-r8a774e1", 1275 "renesas,rcar-gen3-can"; 1276 reg = <0 0xe6c38000 0 0x1000>; 1277 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1278 clocks = <&cpg CPG_MOD 915>, 1279 <&cpg CPG_CORE R8A774E1_CLK_CANFD>, 1280 <&can_clk>; 1281 clock-names = "clkp1", "clkp2", "can_clk"; 1282 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>; 1283 assigned-clock-rates = <40000000>; 1284 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1285 resets = <&cpg 915>; 1286 status = "disabled"; 1287 }; 1288 1289 canfd: can@e66c0000 { 1290 compatible = "renesas,r8a774e1-canfd", 1291 "renesas,rcar-gen3-canfd"; 1292 reg = <0 0xe66c0000 0 0x8000>; 1293 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1294 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1295 interrupt-names = "ch_int", "g_int"; 1296 clocks = <&cpg CPG_MOD 914>, 1297 <&cpg CPG_CORE R8A774E1_CLK_CANFD>, 1298 <&can_clk>; 1299 clock-names = "fck", "canfd", "can_clk"; 1300 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>; 1301 assigned-clock-rates = <40000000>; 1302 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1303 resets = <&cpg 914>; 1304 status = "disabled"; 1305 1306 channel0 { 1307 status = "disabled"; 1308 }; 1309 1310 channel1 { 1311 status = "disabled"; 1312 }; 1313 }; 1314 1315 pwm0: pwm@e6e30000 { 1316 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; 1317 reg = <0 0xe6e30000 0 0x8>; 1318 clocks = <&cpg CPG_MOD 523>; 1319 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1320 resets = <&cpg 523>; 1321 #pwm-cells = <2>; 1322 status = "disabled"; 1323 }; 1324 1325 pwm1: pwm@e6e31000 { 1326 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; 1327 reg = <0 0xe6e31000 0 0x8>; 1328 clocks = <&cpg CPG_MOD 523>; 1329 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1330 resets = <&cpg 523>; 1331 #pwm-cells = <2>; 1332 status = "disabled"; 1333 }; 1334 1335 pwm2: pwm@e6e32000 { 1336 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; 1337 reg = <0 0xe6e32000 0 0x8>; 1338 clocks = <&cpg CPG_MOD 523>; 1339 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1340 resets = <&cpg 523>; 1341 #pwm-cells = <2>; 1342 status = "disabled"; 1343 }; 1344 1345 pwm3: pwm@e6e33000 { 1346 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; 1347 reg = <0 0xe6e33000 0 0x8>; 1348 clocks = <&cpg CPG_MOD 523>; 1349 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1350 resets = <&cpg 523>; 1351 #pwm-cells = <2>; 1352 status = "disabled"; 1353 }; 1354 1355 pwm4: pwm@e6e34000 { 1356 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; 1357 reg = <0 0xe6e34000 0 0x8>; 1358 clocks = <&cpg CPG_MOD 523>; 1359 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1360 resets = <&cpg 523>; 1361 #pwm-cells = <2>; 1362 status = "disabled"; 1363 }; 1364 1365 pwm5: pwm@e6e35000 { 1366 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; 1367 reg = <0 0xe6e35000 0 0x8>; 1368 clocks = <&cpg CPG_MOD 523>; 1369 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1370 resets = <&cpg 523>; 1371 #pwm-cells = <2>; 1372 status = "disabled"; 1373 }; 1374 1375 pwm6: pwm@e6e36000 { 1376 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; 1377 reg = <0 0xe6e36000 0 0x8>; 1378 clocks = <&cpg CPG_MOD 523>; 1379 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1380 resets = <&cpg 523>; 1381 #pwm-cells = <2>; 1382 status = "disabled"; 1383 }; 1384 1385 scif0: serial@e6e60000 { 1386 compatible = "renesas,scif-r8a774e1", 1387 "renesas,rcar-gen3-scif", "renesas,scif"; 1388 reg = <0 0xe6e60000 0 0x40>; 1389 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1390 clocks = <&cpg CPG_MOD 207>, 1391 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 1392 <&scif_clk>; 1393 clock-names = "fck", "brg_int", "scif_clk"; 1394 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1395 <&dmac2 0x51>, <&dmac2 0x50>; 1396 dma-names = "tx", "rx", "tx", "rx"; 1397 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1398 resets = <&cpg 207>; 1399 status = "disabled"; 1400 }; 1401 1402 scif1: serial@e6e68000 { 1403 compatible = "renesas,scif-r8a774e1", 1404 "renesas,rcar-gen3-scif", "renesas,scif"; 1405 reg = <0 0xe6e68000 0 0x40>; 1406 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1407 clocks = <&cpg CPG_MOD 206>, 1408 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 1409 <&scif_clk>; 1410 clock-names = "fck", "brg_int", "scif_clk"; 1411 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1412 <&dmac2 0x53>, <&dmac2 0x52>; 1413 dma-names = "tx", "rx", "tx", "rx"; 1414 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1415 resets = <&cpg 206>; 1416 status = "disabled"; 1417 }; 1418 1419 scif2: serial@e6e88000 { 1420 compatible = "renesas,scif-r8a774e1", 1421 "renesas,rcar-gen3-scif", "renesas,scif"; 1422 reg = <0 0xe6e88000 0 0x40>; 1423 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1424 clocks = <&cpg CPG_MOD 310>, 1425 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 1426 <&scif_clk>; 1427 clock-names = "fck", "brg_int", "scif_clk"; 1428 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1429 <&dmac2 0x13>, <&dmac2 0x12>; 1430 dma-names = "tx", "rx", "tx", "rx"; 1431 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1432 resets = <&cpg 310>; 1433 status = "disabled"; 1434 }; 1435 1436 scif3: serial@e6c50000 { 1437 compatible = "renesas,scif-r8a774e1", 1438 "renesas,rcar-gen3-scif", "renesas,scif"; 1439 reg = <0 0xe6c50000 0 0x40>; 1440 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1441 clocks = <&cpg CPG_MOD 204>, 1442 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 1443 <&scif_clk>; 1444 clock-names = "fck", "brg_int", "scif_clk"; 1445 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1446 dma-names = "tx", "rx"; 1447 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1448 resets = <&cpg 204>; 1449 status = "disabled"; 1450 }; 1451 1452 scif4: serial@e6c40000 { 1453 compatible = "renesas,scif-r8a774e1", 1454 "renesas,rcar-gen3-scif", "renesas,scif"; 1455 reg = <0 0xe6c40000 0 0x40>; 1456 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 203>, 1458 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 1459 <&scif_clk>; 1460 clock-names = "fck", "brg_int", "scif_clk"; 1461 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1462 dma-names = "tx", "rx"; 1463 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1464 resets = <&cpg 203>; 1465 status = "disabled"; 1466 }; 1467 1468 scif5: serial@e6f30000 { 1469 compatible = "renesas,scif-r8a774e1", 1470 "renesas,rcar-gen3-scif", "renesas,scif"; 1471 reg = <0 0xe6f30000 0 0x40>; 1472 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1473 clocks = <&cpg CPG_MOD 202>, 1474 <&cpg CPG_CORE R8A774E1_CLK_S3D1>, 1475 <&scif_clk>; 1476 clock-names = "fck", "brg_int", "scif_clk"; 1477 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1478 <&dmac2 0x5b>, <&dmac2 0x5a>; 1479 dma-names = "tx", "rx", "tx", "rx"; 1480 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1481 resets = <&cpg 202>; 1482 status = "disabled"; 1483 }; 1484 1485 msiof0: spi@e6e90000 { 1486 compatible = "renesas,msiof-r8a774e1", 1487 "renesas,rcar-gen3-msiof"; 1488 reg = <0 0xe6e90000 0 0x0064>; 1489 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1490 clocks = <&cpg CPG_MOD 211>; 1491 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1492 <&dmac2 0x41>, <&dmac2 0x40>; 1493 dma-names = "tx", "rx", "tx", "rx"; 1494 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1495 resets = <&cpg 211>; 1496 #address-cells = <1>; 1497 #size-cells = <0>; 1498 status = "disabled"; 1499 }; 1500 1501 msiof1: spi@e6ea0000 { 1502 compatible = "renesas,msiof-r8a774e1", 1503 "renesas,rcar-gen3-msiof"; 1504 reg = <0 0xe6ea0000 0 0x0064>; 1505 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1506 clocks = <&cpg CPG_MOD 210>; 1507 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1508 <&dmac2 0x43>, <&dmac2 0x42>; 1509 dma-names = "tx", "rx", "tx", "rx"; 1510 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1511 resets = <&cpg 210>; 1512 #address-cells = <1>; 1513 #size-cells = <0>; 1514 status = "disabled"; 1515 }; 1516 1517 msiof2: spi@e6c00000 { 1518 compatible = "renesas,msiof-r8a774e1", 1519 "renesas,rcar-gen3-msiof"; 1520 reg = <0 0xe6c00000 0 0x0064>; 1521 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1522 clocks = <&cpg CPG_MOD 209>; 1523 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1524 dma-names = "tx", "rx"; 1525 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1526 resets = <&cpg 209>; 1527 #address-cells = <1>; 1528 #size-cells = <0>; 1529 status = "disabled"; 1530 }; 1531 1532 msiof3: spi@e6c10000 { 1533 compatible = "renesas,msiof-r8a774e1", 1534 "renesas,rcar-gen3-msiof"; 1535 reg = <0 0xe6c10000 0 0x0064>; 1536 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1537 clocks = <&cpg CPG_MOD 208>; 1538 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1539 dma-names = "tx", "rx"; 1540 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1541 resets = <&cpg 208>; 1542 #address-cells = <1>; 1543 #size-cells = <0>; 1544 status = "disabled"; 1545 }; 1546 1547 vin0: video@e6ef0000 { 1548 compatible = "renesas,vin-r8a774e1"; 1549 reg = <0 0xe6ef0000 0 0x1000>; 1550 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1551 clocks = <&cpg CPG_MOD 811>; 1552 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1553 resets = <&cpg 811>; 1554 renesas,id = <0>; 1555 status = "disabled"; 1556 1557 ports { 1558 #address-cells = <1>; 1559 #size-cells = <0>; 1560 1561 port@1 { 1562 #address-cells = <1>; 1563 #size-cells = <0>; 1564 1565 reg = <1>; 1566 1567 vin0csi20: endpoint@0 { 1568 reg = <0>; 1569 remote-endpoint = <&csi20vin0>; 1570 }; 1571 vin0csi40: endpoint@2 { 1572 reg = <2>; 1573 remote-endpoint = <&csi40vin0>; 1574 }; 1575 }; 1576 }; 1577 }; 1578 1579 vin1: video@e6ef1000 { 1580 compatible = "renesas,vin-r8a774e1"; 1581 reg = <0 0xe6ef1000 0 0x1000>; 1582 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1583 clocks = <&cpg CPG_MOD 810>; 1584 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1585 resets = <&cpg 810>; 1586 renesas,id = <1>; 1587 status = "disabled"; 1588 1589 ports { 1590 #address-cells = <1>; 1591 #size-cells = <0>; 1592 1593 port@1 { 1594 #address-cells = <1>; 1595 #size-cells = <0>; 1596 1597 reg = <1>; 1598 1599 vin1csi20: endpoint@0 { 1600 reg = <0>; 1601 remote-endpoint = <&csi20vin1>; 1602 }; 1603 vin1csi40: endpoint@2 { 1604 reg = <2>; 1605 remote-endpoint = <&csi40vin1>; 1606 }; 1607 }; 1608 }; 1609 }; 1610 1611 vin2: video@e6ef2000 { 1612 compatible = "renesas,vin-r8a774e1"; 1613 reg = <0 0xe6ef2000 0 0x1000>; 1614 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1615 clocks = <&cpg CPG_MOD 809>; 1616 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1617 resets = <&cpg 809>; 1618 renesas,id = <2>; 1619 status = "disabled"; 1620 1621 ports { 1622 #address-cells = <1>; 1623 #size-cells = <0>; 1624 1625 port@1 { 1626 #address-cells = <1>; 1627 #size-cells = <0>; 1628 1629 reg = <1>; 1630 1631 vin2csi20: endpoint@0 { 1632 reg = <0>; 1633 remote-endpoint = <&csi20vin2>; 1634 }; 1635 vin2csi40: endpoint@2 { 1636 reg = <2>; 1637 remote-endpoint = <&csi40vin2>; 1638 }; 1639 }; 1640 }; 1641 }; 1642 1643 vin3: video@e6ef3000 { 1644 compatible = "renesas,vin-r8a774e1"; 1645 reg = <0 0xe6ef3000 0 0x1000>; 1646 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1647 clocks = <&cpg CPG_MOD 808>; 1648 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1649 resets = <&cpg 808>; 1650 renesas,id = <3>; 1651 status = "disabled"; 1652 1653 ports { 1654 #address-cells = <1>; 1655 #size-cells = <0>; 1656 1657 port@1 { 1658 #address-cells = <1>; 1659 #size-cells = <0>; 1660 1661 reg = <1>; 1662 1663 vin3csi20: endpoint@0 { 1664 reg = <0>; 1665 remote-endpoint = <&csi20vin3>; 1666 }; 1667 vin3csi40: endpoint@2 { 1668 reg = <2>; 1669 remote-endpoint = <&csi40vin3>; 1670 }; 1671 }; 1672 }; 1673 }; 1674 1675 vin4: video@e6ef4000 { 1676 compatible = "renesas,vin-r8a774e1"; 1677 reg = <0 0xe6ef4000 0 0x1000>; 1678 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1679 clocks = <&cpg CPG_MOD 807>; 1680 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1681 resets = <&cpg 807>; 1682 renesas,id = <4>; 1683 status = "disabled"; 1684 1685 ports { 1686 #address-cells = <1>; 1687 #size-cells = <0>; 1688 1689 port@1 { 1690 #address-cells = <1>; 1691 #size-cells = <0>; 1692 1693 reg = <1>; 1694 1695 vin4csi20: endpoint@0 { 1696 reg = <0>; 1697 remote-endpoint = <&csi20vin4>; 1698 }; 1699 }; 1700 }; 1701 }; 1702 1703 vin5: video@e6ef5000 { 1704 compatible = "renesas,vin-r8a774e1"; 1705 reg = <0 0xe6ef5000 0 0x1000>; 1706 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1707 clocks = <&cpg CPG_MOD 806>; 1708 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1709 resets = <&cpg 806>; 1710 renesas,id = <5>; 1711 status = "disabled"; 1712 1713 ports { 1714 #address-cells = <1>; 1715 #size-cells = <0>; 1716 1717 port@1 { 1718 #address-cells = <1>; 1719 #size-cells = <0>; 1720 1721 reg = <1>; 1722 1723 vin5csi20: endpoint@0 { 1724 reg = <0>; 1725 remote-endpoint = <&csi20vin5>; 1726 }; 1727 }; 1728 }; 1729 }; 1730 1731 vin6: video@e6ef6000 { 1732 compatible = "renesas,vin-r8a774e1"; 1733 reg = <0 0xe6ef6000 0 0x1000>; 1734 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1735 clocks = <&cpg CPG_MOD 805>; 1736 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1737 resets = <&cpg 805>; 1738 renesas,id = <6>; 1739 status = "disabled"; 1740 1741 ports { 1742 #address-cells = <1>; 1743 #size-cells = <0>; 1744 1745 port@1 { 1746 #address-cells = <1>; 1747 #size-cells = <0>; 1748 1749 reg = <1>; 1750 1751 vin6csi20: endpoint@0 { 1752 reg = <0>; 1753 remote-endpoint = <&csi20vin6>; 1754 }; 1755 }; 1756 }; 1757 }; 1758 1759 vin7: video@e6ef7000 { 1760 compatible = "renesas,vin-r8a774e1"; 1761 reg = <0 0xe6ef7000 0 0x1000>; 1762 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1763 clocks = <&cpg CPG_MOD 804>; 1764 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1765 resets = <&cpg 804>; 1766 renesas,id = <7>; 1767 status = "disabled"; 1768 1769 ports { 1770 #address-cells = <1>; 1771 #size-cells = <0>; 1772 1773 port@1 { 1774 #address-cells = <1>; 1775 #size-cells = <0>; 1776 1777 reg = <1>; 1778 1779 vin7csi20: endpoint@0 { 1780 reg = <0>; 1781 remote-endpoint = <&csi20vin7>; 1782 }; 1783 }; 1784 }; 1785 }; 1786 1787 rcar_sound: sound@ec500000 { 1788 /* 1789 * #sound-dai-cells is required if simple-card 1790 * 1791 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1792 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1793 */ 1794 /* 1795 * #clock-cells is required for audio_clkout0/1/2/3 1796 * 1797 * clkout : #clock-cells = <0>; <&rcar_sound>; 1798 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1799 */ 1800 compatible = "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3"; 1801 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1802 <0 0xec5a0000 0 0x100>, /* ADG */ 1803 <0 0xec540000 0 0x1000>, /* SSIU */ 1804 <0 0xec541000 0 0x280>, /* SSI */ 1805 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1806 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1807 1808 clocks = <&cpg CPG_MOD 1005>, 1809 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1810 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1811 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1812 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1813 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1814 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1815 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1816 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1817 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1818 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1819 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1820 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1821 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1822 <&audio_clk_a>, <&audio_clk_b>, 1823 <&audio_clk_c>, 1824 <&cpg CPG_MOD 922>; 1825 clock-names = "ssi-all", 1826 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1827 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1828 "ssi.1", "ssi.0", 1829 "src.9", "src.8", "src.7", "src.6", 1830 "src.5", "src.4", "src.3", "src.2", 1831 "src.1", "src.0", 1832 "mix.1", "mix.0", 1833 "ctu.1", "ctu.0", 1834 "dvc.0", "dvc.1", 1835 "clk_a", "clk_b", "clk_c", "clk_i"; 1836 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 1837 resets = <&cpg 1005>, 1838 <&cpg 1006>, <&cpg 1007>, 1839 <&cpg 1008>, <&cpg 1009>, 1840 <&cpg 1010>, <&cpg 1011>, 1841 <&cpg 1012>, <&cpg 1013>, 1842 <&cpg 1014>, <&cpg 1015>; 1843 reset-names = "ssi-all", 1844 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1845 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1846 "ssi.1", "ssi.0"; 1847 status = "disabled"; 1848 1849 rcar_sound,dvc { 1850 dvc0: dvc-0 { 1851 dmas = <&audma1 0xbc>; 1852 dma-names = "tx"; 1853 }; 1854 dvc1: dvc-1 { 1855 dmas = <&audma1 0xbe>; 1856 dma-names = "tx"; 1857 }; 1858 }; 1859 1860 rcar_sound,mix { 1861 mix0: mix-0 { }; 1862 mix1: mix-1 { }; 1863 }; 1864 1865 rcar_sound,ctu { 1866 ctu00: ctu-0 { }; 1867 ctu01: ctu-1 { }; 1868 ctu02: ctu-2 { }; 1869 ctu03: ctu-3 { }; 1870 ctu10: ctu-4 { }; 1871 ctu11: ctu-5 { }; 1872 ctu12: ctu-6 { }; 1873 ctu13: ctu-7 { }; 1874 }; 1875 1876 rcar_sound,src { 1877 src0: src-0 { 1878 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1879 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1880 dma-names = "rx", "tx"; 1881 }; 1882 src1: src-1 { 1883 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1884 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1885 dma-names = "rx", "tx"; 1886 }; 1887 src2: src-2 { 1888 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1889 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1890 dma-names = "rx", "tx"; 1891 }; 1892 src3: src-3 { 1893 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1894 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1895 dma-names = "rx", "tx"; 1896 }; 1897 src4: src-4 { 1898 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1899 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1900 dma-names = "rx", "tx"; 1901 }; 1902 src5: src-5 { 1903 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1904 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 src6: src-6 { 1908 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1909 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1910 dma-names = "rx", "tx"; 1911 }; 1912 src7: src-7 { 1913 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1914 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 src8: src-8 { 1918 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1919 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1920 dma-names = "rx", "tx"; 1921 }; 1922 src9: src-9 { 1923 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1924 dmas = <&audma0 0x97>, <&audma1 0xba>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 }; 1928 1929 rcar_sound,ssiu { 1930 ssiu00: ssiu-0 { 1931 dmas = <&audma0 0x15>, <&audma1 0x16>; 1932 dma-names = "rx", "tx"; 1933 }; 1934 ssiu01: ssiu-1 { 1935 dmas = <&audma0 0x35>, <&audma1 0x36>; 1936 dma-names = "rx", "tx"; 1937 }; 1938 ssiu02: ssiu-2 { 1939 dmas = <&audma0 0x37>, <&audma1 0x38>; 1940 dma-names = "rx", "tx"; 1941 }; 1942 ssiu03: ssiu-3 { 1943 dmas = <&audma0 0x47>, <&audma1 0x48>; 1944 dma-names = "rx", "tx"; 1945 }; 1946 ssiu04: ssiu-4 { 1947 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1948 dma-names = "rx", "tx"; 1949 }; 1950 ssiu05: ssiu-5 { 1951 dmas = <&audma0 0x43>, <&audma1 0x44>; 1952 dma-names = "rx", "tx"; 1953 }; 1954 ssiu06: ssiu-6 { 1955 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1956 dma-names = "rx", "tx"; 1957 }; 1958 ssiu07: ssiu-7 { 1959 dmas = <&audma0 0x53>, <&audma1 0x54>; 1960 dma-names = "rx", "tx"; 1961 }; 1962 ssiu10: ssiu-8 { 1963 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1964 dma-names = "rx", "tx"; 1965 }; 1966 ssiu11: ssiu-9 { 1967 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1968 dma-names = "rx", "tx"; 1969 }; 1970 ssiu12: ssiu-10 { 1971 dmas = <&audma0 0x57>, <&audma1 0x58>; 1972 dma-names = "rx", "tx"; 1973 }; 1974 ssiu13: ssiu-11 { 1975 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1976 dma-names = "rx", "tx"; 1977 }; 1978 ssiu14: ssiu-12 { 1979 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1980 dma-names = "rx", "tx"; 1981 }; 1982 ssiu15: ssiu-13 { 1983 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1984 dma-names = "rx", "tx"; 1985 }; 1986 ssiu16: ssiu-14 { 1987 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1988 dma-names = "rx", "tx"; 1989 }; 1990 ssiu17: ssiu-15 { 1991 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1992 dma-names = "rx", "tx"; 1993 }; 1994 ssiu20: ssiu-16 { 1995 dmas = <&audma0 0x63>, <&audma1 0x64>; 1996 dma-names = "rx", "tx"; 1997 }; 1998 ssiu21: ssiu-17 { 1999 dmas = <&audma0 0x67>, <&audma1 0x68>; 2000 dma-names = "rx", "tx"; 2001 }; 2002 ssiu22: ssiu-18 { 2003 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2004 dma-names = "rx", "tx"; 2005 }; 2006 ssiu23: ssiu-19 { 2007 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2008 dma-names = "rx", "tx"; 2009 }; 2010 ssiu24: ssiu-20 { 2011 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2012 dma-names = "rx", "tx"; 2013 }; 2014 ssiu25: ssiu-21 { 2015 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2016 dma-names = "rx", "tx"; 2017 }; 2018 ssiu26: ssiu-22 { 2019 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2020 dma-names = "rx", "tx"; 2021 }; 2022 ssiu27: ssiu-23 { 2023 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2024 dma-names = "rx", "tx"; 2025 }; 2026 ssiu30: ssiu-24 { 2027 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2028 dma-names = "rx", "tx"; 2029 }; 2030 ssiu31: ssiu-25 { 2031 dmas = <&audma0 0x21>, <&audma1 0x22>; 2032 dma-names = "rx", "tx"; 2033 }; 2034 ssiu32: ssiu-26 { 2035 dmas = <&audma0 0x23>, <&audma1 0x24>; 2036 dma-names = "rx", "tx"; 2037 }; 2038 ssiu33: ssiu-27 { 2039 dmas = <&audma0 0x25>, <&audma1 0x26>; 2040 dma-names = "rx", "tx"; 2041 }; 2042 ssiu34: ssiu-28 { 2043 dmas = <&audma0 0x27>, <&audma1 0x28>; 2044 dma-names = "rx", "tx"; 2045 }; 2046 ssiu35: ssiu-29 { 2047 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2048 dma-names = "rx", "tx"; 2049 }; 2050 ssiu36: ssiu-30 { 2051 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2052 dma-names = "rx", "tx"; 2053 }; 2054 ssiu37: ssiu-31 { 2055 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2056 dma-names = "rx", "tx"; 2057 }; 2058 ssiu40: ssiu-32 { 2059 dmas = <&audma0 0x71>, <&audma1 0x72>; 2060 dma-names = "rx", "tx"; 2061 }; 2062 ssiu41: ssiu-33 { 2063 dmas = <&audma0 0x17>, <&audma1 0x18>; 2064 dma-names = "rx", "tx"; 2065 }; 2066 ssiu42: ssiu-34 { 2067 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2068 dma-names = "rx", "tx"; 2069 }; 2070 ssiu43: ssiu-35 { 2071 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2072 dma-names = "rx", "tx"; 2073 }; 2074 ssiu44: ssiu-36 { 2075 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2076 dma-names = "rx", "tx"; 2077 }; 2078 ssiu45: ssiu-37 { 2079 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2080 dma-names = "rx", "tx"; 2081 }; 2082 ssiu46: ssiu-38 { 2083 dmas = <&audma0 0x31>, <&audma1 0x32>; 2084 dma-names = "rx", "tx"; 2085 }; 2086 ssiu47: ssiu-39 { 2087 dmas = <&audma0 0x33>, <&audma1 0x34>; 2088 dma-names = "rx", "tx"; 2089 }; 2090 ssiu50: ssiu-40 { 2091 dmas = <&audma0 0x73>, <&audma1 0x74>; 2092 dma-names = "rx", "tx"; 2093 }; 2094 ssiu60: ssiu-41 { 2095 dmas = <&audma0 0x75>, <&audma1 0x76>; 2096 dma-names = "rx", "tx"; 2097 }; 2098 ssiu70: ssiu-42 { 2099 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2100 dma-names = "rx", "tx"; 2101 }; 2102 ssiu80: ssiu-43 { 2103 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2104 dma-names = "rx", "tx"; 2105 }; 2106 ssiu90: ssiu-44 { 2107 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2108 dma-names = "rx", "tx"; 2109 }; 2110 ssiu91: ssiu-45 { 2111 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2112 dma-names = "rx", "tx"; 2113 }; 2114 ssiu92: ssiu-46 { 2115 dmas = <&audma0 0x81>, <&audma1 0x82>; 2116 dma-names = "rx", "tx"; 2117 }; 2118 ssiu93: ssiu-47 { 2119 dmas = <&audma0 0x83>, <&audma1 0x84>; 2120 dma-names = "rx", "tx"; 2121 }; 2122 ssiu94: ssiu-48 { 2123 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2124 dma-names = "rx", "tx"; 2125 }; 2126 ssiu95: ssiu-49 { 2127 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2128 dma-names = "rx", "tx"; 2129 }; 2130 ssiu96: ssiu-50 { 2131 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2132 dma-names = "rx", "tx"; 2133 }; 2134 ssiu97: ssiu-51 { 2135 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2136 dma-names = "rx", "tx"; 2137 }; 2138 }; 2139 2140 rcar_sound,ssi { 2141 ssi0: ssi-0 { 2142 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2143 dmas = <&audma0 0x01>, <&audma1 0x02>; 2144 dma-names = "rx", "tx"; 2145 }; 2146 ssi1: ssi-1 { 2147 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2148 dmas = <&audma0 0x03>, <&audma1 0x04>; 2149 dma-names = "rx", "tx"; 2150 }; 2151 ssi2: ssi-2 { 2152 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2153 dmas = <&audma0 0x05>, <&audma1 0x06>; 2154 dma-names = "rx", "tx"; 2155 }; 2156 ssi3: ssi-3 { 2157 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2158 dmas = <&audma0 0x07>, <&audma1 0x08>; 2159 dma-names = "rx", "tx"; 2160 }; 2161 ssi4: ssi-4 { 2162 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2163 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2164 dma-names = "rx", "tx"; 2165 }; 2166 ssi5: ssi-5 { 2167 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2168 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2169 dma-names = "rx", "tx"; 2170 }; 2171 ssi6: ssi-6 { 2172 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2173 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2174 dma-names = "rx", "tx"; 2175 }; 2176 ssi7: ssi-7 { 2177 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2178 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2179 dma-names = "rx", "tx"; 2180 }; 2181 ssi8: ssi-8 { 2182 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2183 dmas = <&audma0 0x11>, <&audma1 0x12>; 2184 dma-names = "rx", "tx"; 2185 }; 2186 ssi9: ssi-9 { 2187 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2188 dmas = <&audma0 0x13>, <&audma1 0x14>; 2189 dma-names = "rx", "tx"; 2190 }; 2191 }; 2192 }; 2193 2194 audma0: dma-controller@ec700000 { 2195 compatible = "renesas,dmac-r8a774e1", 2196 "renesas,rcar-dmac"; 2197 reg = <0 0xec700000 0 0x10000>; 2198 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2199 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2200 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2201 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2202 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2203 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2204 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2205 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2206 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2207 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2208 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2209 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2210 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2211 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2212 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2213 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2214 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2215 interrupt-names = "error", 2216 "ch0", "ch1", "ch2", "ch3", 2217 "ch4", "ch5", "ch6", "ch7", 2218 "ch8", "ch9", "ch10", "ch11", 2219 "ch12", "ch13", "ch14", "ch15"; 2220 clocks = <&cpg CPG_MOD 502>; 2221 clock-names = "fck"; 2222 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2223 resets = <&cpg 502>; 2224 #dma-cells = <1>; 2225 dma-channels = <16>; 2226 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, 2227 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, 2228 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, 2229 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, 2230 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, 2231 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, 2232 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, 2233 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; 2234 }; 2235 2236 audma1: dma-controller@ec720000 { 2237 compatible = "renesas,dmac-r8a774e1", 2238 "renesas,rcar-dmac"; 2239 reg = <0 0xec720000 0 0x10000>; 2240 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2241 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2242 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2243 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2244 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2245 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2246 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2247 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2248 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2249 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2250 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2251 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2252 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2253 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2254 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2255 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2256 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2257 interrupt-names = "error", 2258 "ch0", "ch1", "ch2", "ch3", 2259 "ch4", "ch5", "ch6", "ch7", 2260 "ch8", "ch9", "ch10", "ch11", 2261 "ch12", "ch13", "ch14", "ch15"; 2262 clocks = <&cpg CPG_MOD 501>; 2263 clock-names = "fck"; 2264 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2265 resets = <&cpg 501>; 2266 #dma-cells = <1>; 2267 dma-channels = <16>; 2268 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, 2269 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, 2270 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, 2271 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, 2272 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, 2273 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, 2274 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, 2275 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; 2276 }; 2277 2278 xhci0: usb@ee000000 { 2279 compatible = "renesas,xhci-r8a774e1", 2280 "renesas,rcar-gen3-xhci"; 2281 reg = <0 0xee000000 0 0xc00>; 2282 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2283 clocks = <&cpg CPG_MOD 328>; 2284 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2285 resets = <&cpg 328>; 2286 status = "disabled"; 2287 }; 2288 2289 usb3_peri0: usb@ee020000 { 2290 compatible = "renesas,r8a774e1-usb3-peri", 2291 "renesas,rcar-gen3-usb3-peri"; 2292 reg = <0 0xee020000 0 0x400>; 2293 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2294 clocks = <&cpg CPG_MOD 328>; 2295 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2296 resets = <&cpg 328>; 2297 status = "disabled"; 2298 }; 2299 2300 ohci0: usb@ee080000 { 2301 compatible = "generic-ohci"; 2302 reg = <0 0xee080000 0 0x100>; 2303 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2304 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2305 phys = <&usb2_phy0 1>; 2306 phy-names = "usb"; 2307 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2308 resets = <&cpg 703>, <&cpg 704>; 2309 status = "disabled"; 2310 }; 2311 2312 ohci1: usb@ee0a0000 { 2313 compatible = "generic-ohci"; 2314 reg = <0 0xee0a0000 0 0x100>; 2315 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2316 clocks = <&cpg CPG_MOD 702>; 2317 phys = <&usb2_phy1 1>; 2318 phy-names = "usb"; 2319 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2320 resets = <&cpg 702>; 2321 status = "disabled"; 2322 }; 2323 2324 ehci0: usb@ee080100 { 2325 compatible = "generic-ehci"; 2326 reg = <0 0xee080100 0 0x100>; 2327 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2328 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2329 phys = <&usb2_phy0 2>; 2330 phy-names = "usb"; 2331 companion = <&ohci0>; 2332 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2333 resets = <&cpg 703>, <&cpg 704>; 2334 status = "disabled"; 2335 }; 2336 2337 ehci1: usb@ee0a0100 { 2338 compatible = "generic-ehci"; 2339 reg = <0 0xee0a0100 0 0x100>; 2340 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2341 clocks = <&cpg CPG_MOD 702>; 2342 phys = <&usb2_phy1 2>; 2343 phy-names = "usb"; 2344 companion = <&ohci1>; 2345 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2346 resets = <&cpg 702>; 2347 status = "disabled"; 2348 }; 2349 2350 usb2_phy0: usb-phy@ee080200 { 2351 compatible = "renesas,usb2-phy-r8a774e1", 2352 "renesas,rcar-gen3-usb2-phy"; 2353 reg = <0 0xee080200 0 0x700>; 2354 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2355 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2356 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2357 resets = <&cpg 703>, <&cpg 704>; 2358 #phy-cells = <1>; 2359 status = "disabled"; 2360 }; 2361 2362 usb2_phy1: usb-phy@ee0a0200 { 2363 compatible = "renesas,usb2-phy-r8a774e1", 2364 "renesas,rcar-gen3-usb2-phy"; 2365 reg = <0 0xee0a0200 0 0x700>; 2366 clocks = <&cpg CPG_MOD 702>; 2367 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2368 resets = <&cpg 702>; 2369 #phy-cells = <1>; 2370 status = "disabled"; 2371 }; 2372 2373 sdhi0: mmc@ee100000 { 2374 compatible = "renesas,sdhi-r8a774e1", 2375 "renesas,rcar-gen3-sdhi"; 2376 reg = <0 0xee100000 0 0x2000>; 2377 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2378 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774E1_CLK_SD0H>; 2379 clock-names = "core", "clkh"; 2380 max-frequency = <200000000>; 2381 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2382 resets = <&cpg 314>; 2383 iommus = <&ipmmu_ds1 32>; 2384 status = "disabled"; 2385 }; 2386 2387 sdhi1: mmc@ee120000 { 2388 compatible = "renesas,sdhi-r8a774e1", 2389 "renesas,rcar-gen3-sdhi"; 2390 reg = <0 0xee120000 0 0x2000>; 2391 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2392 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774E1_CLK_SD1H>; 2393 clock-names = "core", "clkh"; 2394 max-frequency = <200000000>; 2395 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2396 resets = <&cpg 313>; 2397 iommus = <&ipmmu_ds1 33>; 2398 status = "disabled"; 2399 }; 2400 2401 sdhi2: mmc@ee140000 { 2402 compatible = "renesas,sdhi-r8a774e1", 2403 "renesas,rcar-gen3-sdhi"; 2404 reg = <0 0xee140000 0 0x2000>; 2405 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2406 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774E1_CLK_SD2H>; 2407 clock-names = "core", "clkh"; 2408 max-frequency = <200000000>; 2409 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2410 resets = <&cpg 312>; 2411 iommus = <&ipmmu_ds1 34>; 2412 status = "disabled"; 2413 }; 2414 2415 sdhi3: mmc@ee160000 { 2416 compatible = "renesas,sdhi-r8a774e1", 2417 "renesas,rcar-gen3-sdhi"; 2418 reg = <0 0xee160000 0 0x2000>; 2419 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2420 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774E1_CLK_SD3H>; 2421 clock-names = "core", "clkh"; 2422 max-frequency = <200000000>; 2423 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2424 resets = <&cpg 311>; 2425 iommus = <&ipmmu_ds1 35>; 2426 status = "disabled"; 2427 }; 2428 2429 rpc: spi@ee200000 { 2430 compatible = "renesas,r8a774e1-rpc-if", 2431 "renesas,rcar-gen3-rpc-if"; 2432 reg = <0 0xee200000 0 0x200>, 2433 <0 0x08000000 0 0x4000000>, 2434 <0 0xee208000 0 0x100>; 2435 reg-names = "regs", "dirmap", "wbuf"; 2436 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2437 clocks = <&cpg CPG_MOD 917>; 2438 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2439 resets = <&cpg 917>; 2440 #address-cells = <1>; 2441 #size-cells = <0>; 2442 status = "disabled"; 2443 }; 2444 2445 sata: sata@ee300000 { 2446 compatible = "renesas,sata-r8a774e1", 2447 "renesas,rcar-gen3-sata"; 2448 reg = <0 0xee300000 0 0x200000>; 2449 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2450 clocks = <&cpg CPG_MOD 815>; 2451 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2452 resets = <&cpg 815>; 2453 iommus = <&ipmmu_hc 2>; 2454 status = "disabled"; 2455 }; 2456 2457 gic: interrupt-controller@f1010000 { 2458 compatible = "arm,gic-400"; 2459 #interrupt-cells = <3>; 2460 #address-cells = <0>; 2461 interrupt-controller; 2462 reg = <0x0 0xf1010000 0 0x1000>, 2463 <0x0 0xf1020000 0 0x20000>, 2464 <0x0 0xf1040000 0 0x20000>, 2465 <0x0 0xf1060000 0 0x20000>; 2466 interrupts = <GIC_PPI 9 2467 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 2468 clocks = <&cpg CPG_MOD 408>; 2469 clock-names = "clk"; 2470 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2471 resets = <&cpg 408>; 2472 }; 2473 2474 pciec0: pcie@fe000000 { 2475 compatible = "renesas,pcie-r8a774e1", 2476 "renesas,pcie-rcar-gen3"; 2477 reg = <0 0xfe000000 0 0x80000>; 2478 #address-cells = <3>; 2479 #size-cells = <2>; 2480 bus-range = <0x00 0xff>; 2481 device_type = "pci"; 2482 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2483 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2484 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2485 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2486 /* Map all possible DDR/IOMMU as inbound ranges */ 2487 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2488 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2489 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2490 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2491 #interrupt-cells = <1>; 2492 interrupt-map-mask = <0 0 0 0>; 2493 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2494 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2495 clock-names = "pcie", "pcie_bus"; 2496 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2497 resets = <&cpg 319>; 2498 iommu-map = <0 &ipmmu_hc 0 1>; 2499 iommu-map-mask = <0>; 2500 status = "disabled"; 2501 }; 2502 2503 pciec1: pcie@ee800000 { 2504 compatible = "renesas,pcie-r8a774e1", 2505 "renesas,pcie-rcar-gen3"; 2506 reg = <0 0xee800000 0 0x80000>; 2507 #address-cells = <3>; 2508 #size-cells = <2>; 2509 bus-range = <0x00 0xff>; 2510 device_type = "pci"; 2511 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2512 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2513 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2514 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2515 /* Map all possible DDR/IOMMU as inbound ranges */ 2516 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2517 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2518 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2519 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2520 #interrupt-cells = <1>; 2521 interrupt-map-mask = <0 0 0 0>; 2522 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2523 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2524 clock-names = "pcie", "pcie_bus"; 2525 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2526 resets = <&cpg 318>; 2527 iommu-map = <0 &ipmmu_hc 1 1>; 2528 iommu-map-mask = <0>; 2529 status = "disabled"; 2530 }; 2531 2532 pciec0_ep: pcie-ep@fe000000 { 2533 compatible = "renesas,r8a774e1-pcie-ep", 2534 "renesas,rcar-gen3-pcie-ep"; 2535 reg = <0x0 0xfe000000 0 0x80000>, 2536 <0x0 0xfe100000 0 0x100000>, 2537 <0x0 0xfe200000 0 0x200000>, 2538 <0x0 0x30000000 0 0x8000000>, 2539 <0x0 0x38000000 0 0x8000000>; 2540 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2541 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2542 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2543 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2544 clocks = <&cpg CPG_MOD 319>; 2545 clock-names = "pcie"; 2546 resets = <&cpg 319>; 2547 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2548 status = "disabled"; 2549 }; 2550 2551 pciec1_ep: pcie-ep@ee800000 { 2552 compatible = "renesas,r8a774e1-pcie-ep", 2553 "renesas,rcar-gen3-pcie-ep"; 2554 reg = <0x0 0xee800000 0 0x80000>, 2555 <0x0 0xee900000 0 0x100000>, 2556 <0x0 0xeea00000 0 0x200000>, 2557 <0x0 0xc0000000 0 0x8000000>, 2558 <0x0 0xc8000000 0 0x8000000>; 2559 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2560 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2561 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2562 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2563 clocks = <&cpg CPG_MOD 318>; 2564 clock-names = "pcie"; 2565 resets = <&cpg 318>; 2566 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2567 status = "disabled"; 2568 }; 2569 2570 vspbc: vsp@fe920000 { 2571 compatible = "renesas,vsp2"; 2572 reg = <0 0xfe920000 0 0x8000>; 2573 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 2574 clocks = <&cpg CPG_MOD 624>; 2575 power-domains = <&sysc R8A774E1_PD_A3VP>; 2576 resets = <&cpg 624>; 2577 2578 renesas,fcp = <&fcpvb1>; 2579 }; 2580 2581 vspbd: vsp@fe960000 { 2582 compatible = "renesas,vsp2"; 2583 reg = <0 0xfe960000 0 0x8000>; 2584 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2585 clocks = <&cpg CPG_MOD 626>; 2586 power-domains = <&sysc R8A774E1_PD_A3VP>; 2587 resets = <&cpg 626>; 2588 2589 renesas,fcp = <&fcpvb0>; 2590 }; 2591 2592 vspd0: vsp@fea20000 { 2593 compatible = "renesas,vsp2"; 2594 reg = <0 0xfea20000 0 0x5000>; 2595 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2596 clocks = <&cpg CPG_MOD 623>; 2597 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2598 resets = <&cpg 623>; 2599 2600 renesas,fcp = <&fcpvd0>; 2601 }; 2602 2603 vspd1: vsp@fea28000 { 2604 compatible = "renesas,vsp2"; 2605 reg = <0 0xfea28000 0 0x5000>; 2606 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2607 clocks = <&cpg CPG_MOD 622>; 2608 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2609 resets = <&cpg 622>; 2610 2611 renesas,fcp = <&fcpvd1>; 2612 }; 2613 2614 vspi0: vsp@fe9a0000 { 2615 compatible = "renesas,vsp2"; 2616 reg = <0 0xfe9a0000 0 0x8000>; 2617 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2618 clocks = <&cpg CPG_MOD 631>; 2619 power-domains = <&sysc R8A774E1_PD_A3VP>; 2620 resets = <&cpg 631>; 2621 2622 renesas,fcp = <&fcpvi0>; 2623 }; 2624 2625 vspi1: vsp@fe9b0000 { 2626 compatible = "renesas,vsp2"; 2627 reg = <0 0xfe9b0000 0 0x8000>; 2628 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; 2629 clocks = <&cpg CPG_MOD 630>; 2630 power-domains = <&sysc R8A774E1_PD_A3VP>; 2631 resets = <&cpg 630>; 2632 2633 renesas,fcp = <&fcpvi1>; 2634 }; 2635 2636 fdp1@fe940000 { 2637 compatible = "renesas,fdp1"; 2638 reg = <0 0xfe940000 0 0x2400>; 2639 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2640 clocks = <&cpg CPG_MOD 119>; 2641 power-domains = <&sysc R8A774E1_PD_A3VP>; 2642 resets = <&cpg 119>; 2643 renesas,fcp = <&fcpf0>; 2644 }; 2645 2646 fdp1@fe944000 { 2647 compatible = "renesas,fdp1"; 2648 reg = <0 0xfe944000 0 0x2400>; 2649 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 2650 clocks = <&cpg CPG_MOD 118>; 2651 power-domains = <&sysc R8A774E1_PD_A3VP>; 2652 resets = <&cpg 118>; 2653 renesas,fcp = <&fcpf1>; 2654 }; 2655 2656 fcpf0: fcp@fe950000 { 2657 compatible = "renesas,fcpf"; 2658 reg = <0 0xfe950000 0 0x200>; 2659 clocks = <&cpg CPG_MOD 615>; 2660 power-domains = <&sysc R8A774E1_PD_A3VP>; 2661 resets = <&cpg 615>; 2662 iommus = <&ipmmu_vp0 0>; 2663 }; 2664 2665 fcpf1: fcp@fe951000 { 2666 compatible = "renesas,fcpf"; 2667 reg = <0 0xfe951000 0 0x200>; 2668 clocks = <&cpg CPG_MOD 614>; 2669 power-domains = <&sysc R8A774E1_PD_A3VP>; 2670 resets = <&cpg 614>; 2671 iommus = <&ipmmu_vp1 1>; 2672 }; 2673 2674 fcpvb0: fcp@fe96f000 { 2675 compatible = "renesas,fcpv"; 2676 reg = <0 0xfe96f000 0 0x200>; 2677 clocks = <&cpg CPG_MOD 607>; 2678 power-domains = <&sysc R8A774E1_PD_A3VP>; 2679 resets = <&cpg 607>; 2680 iommus = <&ipmmu_vp0 5>; 2681 }; 2682 2683 fcpvb1: fcp@fe92f000 { 2684 compatible = "renesas,fcpv"; 2685 reg = <0 0xfe92f000 0 0x200>; 2686 clocks = <&cpg CPG_MOD 606>; 2687 power-domains = <&sysc R8A774E1_PD_A3VP>; 2688 resets = <&cpg 606>; 2689 iommus = <&ipmmu_vp1 7>; 2690 }; 2691 2692 fcpvi0: fcp@fe9af000 { 2693 compatible = "renesas,fcpv"; 2694 reg = <0 0xfe9af000 0 0x200>; 2695 clocks = <&cpg CPG_MOD 611>; 2696 power-domains = <&sysc R8A774E1_PD_A3VP>; 2697 resets = <&cpg 611>; 2698 iommus = <&ipmmu_vp0 8>; 2699 }; 2700 2701 fcpvi1: fcp@fe9bf000 { 2702 compatible = "renesas,fcpv"; 2703 reg = <0 0xfe9bf000 0 0x200>; 2704 clocks = <&cpg CPG_MOD 610>; 2705 power-domains = <&sysc R8A774E1_PD_A3VP>; 2706 resets = <&cpg 610>; 2707 iommus = <&ipmmu_vp1 9>; 2708 }; 2709 2710 fcpvd0: fcp@fea27000 { 2711 compatible = "renesas,fcpv"; 2712 reg = <0 0xfea27000 0 0x200>; 2713 clocks = <&cpg CPG_MOD 603>; 2714 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2715 resets = <&cpg 603>; 2716 iommus = <&ipmmu_vi0 8>; 2717 }; 2718 2719 fcpvd1: fcp@fea2f000 { 2720 compatible = "renesas,fcpv"; 2721 reg = <0 0xfea2f000 0 0x200>; 2722 clocks = <&cpg CPG_MOD 602>; 2723 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2724 resets = <&cpg 602>; 2725 iommus = <&ipmmu_vi0 9>; 2726 }; 2727 2728 csi20: csi2@fea80000 { 2729 compatible = "renesas,r8a774e1-csi2"; 2730 reg = <0 0xfea80000 0 0x10000>; 2731 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2732 clocks = <&cpg CPG_MOD 714>; 2733 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2734 resets = <&cpg 714>; 2735 status = "disabled"; 2736 2737 ports { 2738 #address-cells = <1>; 2739 #size-cells = <0>; 2740 2741 port@0 { 2742 reg = <0>; 2743 }; 2744 2745 port@1 { 2746 #address-cells = <1>; 2747 #size-cells = <0>; 2748 2749 reg = <1>; 2750 2751 csi20vin0: endpoint@0 { 2752 reg = <0>; 2753 remote-endpoint = <&vin0csi20>; 2754 }; 2755 csi20vin1: endpoint@1 { 2756 reg = <1>; 2757 remote-endpoint = <&vin1csi20>; 2758 }; 2759 csi20vin2: endpoint@2 { 2760 reg = <2>; 2761 remote-endpoint = <&vin2csi20>; 2762 }; 2763 csi20vin3: endpoint@3 { 2764 reg = <3>; 2765 remote-endpoint = <&vin3csi20>; 2766 }; 2767 csi20vin4: endpoint@4 { 2768 reg = <4>; 2769 remote-endpoint = <&vin4csi20>; 2770 }; 2771 csi20vin5: endpoint@5 { 2772 reg = <5>; 2773 remote-endpoint = <&vin5csi20>; 2774 }; 2775 csi20vin6: endpoint@6 { 2776 reg = <6>; 2777 remote-endpoint = <&vin6csi20>; 2778 }; 2779 csi20vin7: endpoint@7 { 2780 reg = <7>; 2781 remote-endpoint = <&vin7csi20>; 2782 }; 2783 }; 2784 }; 2785 }; 2786 2787 csi40: csi2@feaa0000 { 2788 compatible = "renesas,r8a774e1-csi2"; 2789 reg = <0 0xfeaa0000 0 0x10000>; 2790 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2791 clocks = <&cpg CPG_MOD 716>; 2792 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2793 resets = <&cpg 716>; 2794 status = "disabled"; 2795 2796 ports { 2797 #address-cells = <1>; 2798 #size-cells = <0>; 2799 2800 port@0 { 2801 reg = <0>; 2802 }; 2803 2804 port@1 { 2805 #address-cells = <1>; 2806 #size-cells = <0>; 2807 2808 reg = <1>; 2809 2810 csi40vin0: endpoint@0 { 2811 reg = <0>; 2812 remote-endpoint = <&vin0csi40>; 2813 }; 2814 csi40vin1: endpoint@1 { 2815 reg = <1>; 2816 remote-endpoint = <&vin1csi40>; 2817 }; 2818 csi40vin2: endpoint@2 { 2819 reg = <2>; 2820 remote-endpoint = <&vin2csi40>; 2821 }; 2822 csi40vin3: endpoint@3 { 2823 reg = <3>; 2824 remote-endpoint = <&vin3csi40>; 2825 }; 2826 }; 2827 }; 2828 }; 2829 2830 hdmi0: hdmi@fead0000 { 2831 compatible = "renesas,r8a774e1-hdmi", 2832 "renesas,rcar-gen3-hdmi"; 2833 reg = <0 0xfead0000 0 0x10000>; 2834 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2835 clocks = <&cpg CPG_MOD 729>, 2836 <&cpg CPG_CORE R8A774E1_CLK_HDMI>; 2837 clock-names = "iahb", "isfr"; 2838 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2839 resets = <&cpg 729>; 2840 status = "disabled"; 2841 2842 ports { 2843 #address-cells = <1>; 2844 #size-cells = <0>; 2845 2846 port@0 { 2847 reg = <0>; 2848 dw_hdmi0_in: endpoint { 2849 remote-endpoint = <&du_out_hdmi0>; 2850 }; 2851 }; 2852 port@1 { 2853 reg = <1>; 2854 }; 2855 port@2 { 2856 /* HDMI sound */ 2857 reg = <2>; 2858 }; 2859 }; 2860 }; 2861 2862 du: display@feb00000 { 2863 compatible = "renesas,du-r8a774e1"; 2864 reg = <0 0xfeb00000 0 0x80000>; 2865 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2866 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2867 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2868 clocks = <&cpg CPG_MOD 724>, 2869 <&cpg CPG_MOD 723>, 2870 <&cpg CPG_MOD 721>; 2871 clock-names = "du.0", "du.1", "du.3"; 2872 resets = <&cpg 724>, <&cpg 722>; 2873 reset-names = "du.0", "du.3"; 2874 status = "disabled"; 2875 2876 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2877 2878 ports { 2879 #address-cells = <1>; 2880 #size-cells = <0>; 2881 2882 port@0 { 2883 reg = <0>; 2884 }; 2885 port@1 { 2886 reg = <1>; 2887 du_out_hdmi0: endpoint { 2888 remote-endpoint = <&dw_hdmi0_in>; 2889 }; 2890 }; 2891 port@2 { 2892 reg = <2>; 2893 du_out_lvds0: endpoint { 2894 remote-endpoint = <&lvds0_in>; 2895 }; 2896 }; 2897 }; 2898 }; 2899 2900 lvds0: lvds@feb90000 { 2901 compatible = "renesas,r8a774e1-lvds"; 2902 reg = <0 0xfeb90000 0 0x14>; 2903 clocks = <&cpg CPG_MOD 727>; 2904 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; 2905 resets = <&cpg 727>; 2906 status = "disabled"; 2907 2908 ports { 2909 #address-cells = <1>; 2910 #size-cells = <0>; 2911 2912 port@0 { 2913 reg = <0>; 2914 lvds0_in: endpoint { 2915 remote-endpoint = <&du_out_lvds0>; 2916 }; 2917 }; 2918 port@1 { 2919 reg = <1>; 2920 }; 2921 }; 2922 }; 2923 2924 prr: chipid@fff00044 { 2925 compatible = "renesas,prr"; 2926 reg = <0 0xfff00044 0 4>; 2927 bootph-all; 2928 }; 2929 }; 2930 2931 thermal-zones { 2932 sensor1_thermal: sensor1-thermal { 2933 polling-delay-passive = <250>; 2934 polling-delay = <1000>; 2935 thermal-sensors = <&tsc 0>; 2936 sustainable-power = <6313>; 2937 2938 trips { 2939 sensor1_crit: sensor1-crit { 2940 temperature = <120000>; 2941 hysteresis = <1000>; 2942 type = "critical"; 2943 }; 2944 }; 2945 }; 2946 2947 sensor2_thermal: sensor2-thermal { 2948 polling-delay-passive = <250>; 2949 polling-delay = <1000>; 2950 thermal-sensors = <&tsc 1>; 2951 sustainable-power = <6313>; 2952 2953 trips { 2954 sensor2_crit: sensor2-crit { 2955 temperature = <120000>; 2956 hysteresis = <1000>; 2957 type = "critical"; 2958 }; 2959 }; 2960 }; 2961 2962 sensor3_thermal: sensor3-thermal { 2963 polling-delay-passive = <250>; 2964 polling-delay = <1000>; 2965 thermal-sensors = <&tsc 2>; 2966 sustainable-power = <6313>; 2967 2968 trips { 2969 target: trip-point1 { 2970 temperature = <100000>; 2971 hysteresis = <1000>; 2972 type = "passive"; 2973 }; 2974 2975 sensor3_crit: sensor3-crit { 2976 temperature = <120000>; 2977 hysteresis = <1000>; 2978 type = "critical"; 2979 }; 2980 }; 2981 2982 cooling-maps { 2983 map0 { 2984 trip = <&target>; 2985 cooling-device = <&a57_0 0 2>; 2986 contribution = <1024>; 2987 }; 2988 2989 map1 { 2990 trip = <&target>; 2991 cooling-device = <&a53_0 0 2>; 2992 contribution = <1024>; 2993 }; 2994 }; 2995 }; 2996 }; 2997 2998 timer { 2999 compatible = "arm,armv8-timer"; 3000 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3001 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3002 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3003 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3004 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 3005 }; 3006 3007 /* External USB clocks - can be overridden by the board */ 3008 usb3s0_clk: usb3s0 { 3009 compatible = "fixed-clock"; 3010 #clock-cells = <0>; 3011 clock-frequency = <0>; 3012 }; 3013 3014 usb_extal_clk: usb_extal { 3015 compatible = "fixed-clock"; 3016 #clock-cells = <0>; 3017 clock-frequency = <0>; 3018 }; 3019}; 3020