1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
5 */
6 #include "qla_def.h"
7 #include "qla_gbl.h"
8
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/vmalloc.h>
12
13 #include "qla_devtbl.h"
14
15 #ifdef CONFIG_SPARC
16 #include <asm/prom.h>
17 #endif
18
19 #include "qla_target.h"
20
21 /*
22 * QLogic ISP2x00 Hardware Support Function Prototypes.
23 */
24 static int qla2x00_isp_firmware(scsi_qla_host_t *);
25 static int qla2x00_setup_chip(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32 static int qla2x00_restart_isp(scsi_qla_host_t *);
33
34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35 static int qla84xx_init_chip(scsi_qla_host_t *);
36 static int qla25xx_init_queues(struct qla_hw_data *);
37 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
38 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
39 struct event_arg *ea);
40 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
41 struct event_arg *);
42 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
43
44 /* SRB Extensions ---------------------------------------------------------- */
45
46 void
qla2x00_sp_timeout(struct timer_list * t)47 qla2x00_sp_timeout(struct timer_list *t)
48 {
49 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
50 struct srb_iocb *iocb;
51
52 WARN_ON(irqs_disabled());
53 iocb = &sp->u.iocb_cmd;
54 iocb->timeout(sp);
55 }
56
qla2x00_sp_free(srb_t * sp)57 void qla2x00_sp_free(srb_t *sp)
58 {
59 struct srb_iocb *iocb = &sp->u.iocb_cmd;
60
61 del_timer(&iocb->timer);
62 qla2x00_rel_sp(sp);
63 }
64
qla2xxx_rel_done_warning(srb_t * sp,int res)65 void qla2xxx_rel_done_warning(srb_t *sp, int res)
66 {
67 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
68 }
69
qla2xxx_rel_free_warning(srb_t * sp)70 void qla2xxx_rel_free_warning(srb_t *sp)
71 {
72 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
73 }
74
75 /* Asynchronous Login/Logout Routines -------------------------------------- */
76
77 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)78 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79 {
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95 }
96
qla24xx_abort_iocb_timeout(void * data)97 static void qla24xx_abort_iocb_timeout(void *data)
98 {
99 srb_t *sp = data;
100 struct srb_iocb *abt = &sp->u.iocb_cmd;
101 struct qla_qpair *qpair = sp->qpair;
102 u32 handle;
103 unsigned long flags;
104
105 if (sp->cmd_sp)
106 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
107 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
108 sp->cmd_sp->handle, sp->cmd_sp->type,
109 sp->handle, sp->type);
110 else
111 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
112 "Abort timeout 2 - hdl=%x, type=%x\n",
113 sp->handle, sp->type);
114
115 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
116 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
117 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
118 sp->cmd_sp))
119 qpair->req->outstanding_cmds[handle] = NULL;
120
121 /* removing the abort */
122 if (qpair->req->outstanding_cmds[handle] == sp) {
123 qpair->req->outstanding_cmds[handle] = NULL;
124 break;
125 }
126 }
127 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
128
129 if (sp->cmd_sp)
130 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
131
132 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
133 sp->done(sp, QLA_OS_TIMER_EXPIRED);
134 }
135
qla24xx_abort_sp_done(srb_t * sp,int res)136 static void qla24xx_abort_sp_done(srb_t *sp, int res)
137 {
138 struct srb_iocb *abt = &sp->u.iocb_cmd;
139
140 del_timer(&sp->u.iocb_cmd.timer);
141 if (sp->flags & SRB_WAKEUP_ON_COMP)
142 complete(&abt->u.abt.comp);
143 else
144 sp->free(sp);
145 }
146
qla24xx_async_abort_cmd(srb_t * cmd_sp,bool wait)147 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
148 {
149 scsi_qla_host_t *vha = cmd_sp->vha;
150 struct srb_iocb *abt_iocb;
151 srb_t *sp;
152 int rval = QLA_FUNCTION_FAILED;
153
154 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
155 GFP_ATOMIC);
156 if (!sp)
157 return rval;
158
159 abt_iocb = &sp->u.iocb_cmd;
160 sp->type = SRB_ABT_CMD;
161 sp->name = "abort";
162 sp->qpair = cmd_sp->qpair;
163 sp->cmd_sp = cmd_sp;
164 if (wait)
165 sp->flags = SRB_WAKEUP_ON_COMP;
166
167 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
168 init_completion(&abt_iocb->u.abt.comp);
169 /* FW can send 2 x ABTS's timeout/20s */
170 qla2x00_init_timer(sp, 42);
171
172 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
173 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
174
175 sp->done = qla24xx_abort_sp_done;
176
177 ql_dbg(ql_dbg_async, vha, 0x507c,
178 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
179 cmd_sp->type);
180
181 rval = qla2x00_start_sp(sp);
182 if (rval != QLA_SUCCESS) {
183 sp->free(sp);
184 return rval;
185 }
186
187 if (wait) {
188 wait_for_completion(&abt_iocb->u.abt.comp);
189 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
190 QLA_SUCCESS : QLA_FUNCTION_FAILED;
191 sp->free(sp);
192 }
193
194 return rval;
195 }
196
197 void
qla2x00_async_iocb_timeout(void * data)198 qla2x00_async_iocb_timeout(void *data)
199 {
200 srb_t *sp = data;
201 fc_port_t *fcport = sp->fcport;
202 struct srb_iocb *lio = &sp->u.iocb_cmd;
203 int rc, h;
204 unsigned long flags;
205
206 if (fcport) {
207 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
208 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
209 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
210
211 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
212 } else {
213 pr_info("Async-%s timeout - hdl=%x.\n",
214 sp->name, sp->handle);
215 }
216
217 switch (sp->type) {
218 case SRB_LOGIN_CMD:
219 rc = qla24xx_async_abort_cmd(sp, false);
220 if (rc) {
221 /* Retry as needed. */
222 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
223 lio->u.logio.data[1] =
224 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
225 QLA_LOGIO_LOGIN_RETRIED : 0;
226 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
227 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
228 h++) {
229 if (sp->qpair->req->outstanding_cmds[h] ==
230 sp) {
231 sp->qpair->req->outstanding_cmds[h] =
232 NULL;
233 break;
234 }
235 }
236 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
237 sp->done(sp, QLA_FUNCTION_TIMEOUT);
238 }
239 break;
240 case SRB_LOGOUT_CMD:
241 case SRB_CT_PTHRU_CMD:
242 case SRB_MB_IOCB:
243 case SRB_NACK_PLOGI:
244 case SRB_NACK_PRLI:
245 case SRB_NACK_LOGO:
246 case SRB_CTRL_VP:
247 default:
248 rc = qla24xx_async_abort_cmd(sp, false);
249 if (rc) {
250 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
251 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
252 h++) {
253 if (sp->qpair->req->outstanding_cmds[h] ==
254 sp) {
255 sp->qpair->req->outstanding_cmds[h] =
256 NULL;
257 break;
258 }
259 }
260 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
261 sp->done(sp, QLA_FUNCTION_TIMEOUT);
262 }
263 break;
264 }
265 }
266
qla2x00_async_login_sp_done(srb_t * sp,int res)267 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
268 {
269 struct scsi_qla_host *vha = sp->vha;
270 struct srb_iocb *lio = &sp->u.iocb_cmd;
271 struct event_arg ea;
272
273 ql_dbg(ql_dbg_disc, vha, 0x20dd,
274 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
275
276 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
277
278 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
279 memset(&ea, 0, sizeof(ea));
280 ea.fcport = sp->fcport;
281 ea.data[0] = lio->u.logio.data[0];
282 ea.data[1] = lio->u.logio.data[1];
283 ea.iop[0] = lio->u.logio.iop[0];
284 ea.iop[1] = lio->u.logio.iop[1];
285 ea.sp = sp;
286 qla24xx_handle_plogi_done_event(vha, &ea);
287 }
288
289 sp->free(sp);
290 }
291
292 static inline bool
fcport_is_smaller(fc_port_t * fcport)293 fcport_is_smaller(fc_port_t *fcport)
294 {
295 if (wwn_to_u64(fcport->port_name) <
296 wwn_to_u64(fcport->vha->port_name))
297 return true;
298 else
299 return false;
300 }
301
302 static inline bool
fcport_is_bigger(fc_port_t * fcport)303 fcport_is_bigger(fc_port_t *fcport)
304 {
305 return !fcport_is_smaller(fcport);
306 }
307
308 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)309 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
310 uint16_t *data)
311 {
312 srb_t *sp;
313 struct srb_iocb *lio;
314 int rval = QLA_FUNCTION_FAILED;
315
316 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
317 fcport->loop_id == FC_NO_LOOP_ID) {
318 ql_log(ql_log_warn, vha, 0xffff,
319 "%s: %8phC - not sending command.\n",
320 __func__, fcport->port_name);
321 return rval;
322 }
323
324 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
325 if (!sp)
326 goto done;
327
328 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
329 fcport->flags |= FCF_ASYNC_SENT;
330 fcport->logout_completed = 0;
331
332 sp->type = SRB_LOGIN_CMD;
333 sp->name = "login";
334 sp->gen1 = fcport->rscn_gen;
335 sp->gen2 = fcport->login_gen;
336
337 lio = &sp->u.iocb_cmd;
338 lio->timeout = qla2x00_async_iocb_timeout;
339 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
340
341 sp->done = qla2x00_async_login_sp_done;
342 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
343 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
344 else
345 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
346
347 if (NVME_TARGET(vha->hw, fcport))
348 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
349
350 ql_dbg(ql_dbg_disc, vha, 0x2072,
351 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
352 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
353 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
354 fcport->login_retry);
355
356 rval = qla2x00_start_sp(sp);
357 if (rval != QLA_SUCCESS) {
358 fcport->flags |= FCF_LOGIN_NEEDED;
359 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
360 goto done_free_sp;
361 }
362
363 return rval;
364
365 done_free_sp:
366 sp->free(sp);
367 fcport->flags &= ~FCF_ASYNC_SENT;
368 done:
369 fcport->flags &= ~FCF_ASYNC_ACTIVE;
370 return rval;
371 }
372
qla2x00_async_logout_sp_done(srb_t * sp,int res)373 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
374 {
375 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
376 sp->fcport->login_gen++;
377 qlt_logo_completion_handler(sp->fcport, res);
378 sp->free(sp);
379 }
380
381 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)382 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
383 {
384 srb_t *sp;
385 struct srb_iocb *lio;
386 int rval = QLA_FUNCTION_FAILED;
387
388 fcport->flags |= FCF_ASYNC_SENT;
389 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
390 if (!sp)
391 goto done;
392
393 sp->type = SRB_LOGOUT_CMD;
394 sp->name = "logout";
395
396 lio = &sp->u.iocb_cmd;
397 lio->timeout = qla2x00_async_iocb_timeout;
398 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
399
400 sp->done = qla2x00_async_logout_sp_done;
401
402 ql_dbg(ql_dbg_disc, vha, 0x2070,
403 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
404 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
405 fcport->d_id.b.area, fcport->d_id.b.al_pa,
406 fcport->port_name);
407
408 rval = qla2x00_start_sp(sp);
409 if (rval != QLA_SUCCESS)
410 goto done_free_sp;
411 return rval;
412
413 done_free_sp:
414 sp->free(sp);
415 done:
416 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
417 return rval;
418 }
419
420 void
qla2x00_async_prlo_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)421 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
422 uint16_t *data)
423 {
424 fcport->flags &= ~FCF_ASYNC_ACTIVE;
425 /* Don't re-login in target mode */
426 if (!fcport->tgt_session)
427 qla2x00_mark_device_lost(vha, fcport, 1);
428 qlt_logo_completion_handler(fcport, data[0]);
429 }
430
qla2x00_async_prlo_sp_done(srb_t * sp,int res)431 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
432 {
433 struct srb_iocb *lio = &sp->u.iocb_cmd;
434 struct scsi_qla_host *vha = sp->vha;
435
436 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
437 if (!test_bit(UNLOADING, &vha->dpc_flags))
438 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
439 lio->u.logio.data);
440 sp->free(sp);
441 }
442
443 int
qla2x00_async_prlo(struct scsi_qla_host * vha,fc_port_t * fcport)444 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
445 {
446 srb_t *sp;
447 struct srb_iocb *lio;
448 int rval;
449
450 rval = QLA_FUNCTION_FAILED;
451 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
452 if (!sp)
453 goto done;
454
455 sp->type = SRB_PRLO_CMD;
456 sp->name = "prlo";
457
458 lio = &sp->u.iocb_cmd;
459 lio->timeout = qla2x00_async_iocb_timeout;
460 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
461
462 sp->done = qla2x00_async_prlo_sp_done;
463
464 ql_dbg(ql_dbg_disc, vha, 0x2070,
465 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
466 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
467 fcport->d_id.b.area, fcport->d_id.b.al_pa);
468
469 rval = qla2x00_start_sp(sp);
470 if (rval != QLA_SUCCESS)
471 goto done_free_sp;
472
473 return rval;
474
475 done_free_sp:
476 sp->free(sp);
477 done:
478 fcport->flags &= ~FCF_ASYNC_ACTIVE;
479 return rval;
480 }
481
482 static
qla24xx_handle_adisc_event(scsi_qla_host_t * vha,struct event_arg * ea)483 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
484 {
485 struct fc_port *fcport = ea->fcport;
486
487 ql_dbg(ql_dbg_disc, vha, 0x20d2,
488 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
489 __func__, fcport->port_name, fcport->disc_state,
490 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
491 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
492
493 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
494 ea->data[0]);
495
496 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
497 ql_dbg(ql_dbg_disc, vha, 0x2066,
498 "%s %8phC: adisc fail: post delete\n",
499 __func__, ea->fcport->port_name);
500 /* deleted = 0 & logout_on_delete = force fw cleanup */
501 fcport->deleted = 0;
502 fcport->logout_on_delete = 1;
503 qlt_schedule_sess_for_deletion(ea->fcport);
504 return;
505 }
506
507 if (ea->fcport->disc_state == DSC_DELETE_PEND)
508 return;
509
510 if (ea->sp->gen2 != ea->fcport->login_gen) {
511 /* target side must have changed it. */
512 ql_dbg(ql_dbg_disc, vha, 0x20d3,
513 "%s %8phC generation changed\n",
514 __func__, ea->fcport->port_name);
515 return;
516 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
517 qla_rscn_replay(fcport);
518 qlt_schedule_sess_for_deletion(fcport);
519 return;
520 }
521
522 __qla24xx_handle_gpdb_event(vha, ea);
523 }
524
qla_post_els_plogi_work(struct scsi_qla_host * vha,fc_port_t * fcport)525 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
526 {
527 struct qla_work_evt *e;
528
529 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
530 if (!e)
531 return QLA_FUNCTION_FAILED;
532
533 e->u.fcport.fcport = fcport;
534 fcport->flags |= FCF_ASYNC_ACTIVE;
535 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
536 return qla2x00_post_work(vha, e);
537 }
538
qla2x00_async_adisc_sp_done(srb_t * sp,int res)539 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
540 {
541 struct scsi_qla_host *vha = sp->vha;
542 struct event_arg ea;
543 struct srb_iocb *lio = &sp->u.iocb_cmd;
544
545 ql_dbg(ql_dbg_disc, vha, 0x2066,
546 "Async done-%s res %x %8phC\n",
547 sp->name, res, sp->fcport->port_name);
548
549 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
550
551 memset(&ea, 0, sizeof(ea));
552 ea.rc = res;
553 ea.data[0] = lio->u.logio.data[0];
554 ea.data[1] = lio->u.logio.data[1];
555 ea.iop[0] = lio->u.logio.iop[0];
556 ea.iop[1] = lio->u.logio.iop[1];
557 ea.fcport = sp->fcport;
558 ea.sp = sp;
559
560 qla24xx_handle_adisc_event(vha, &ea);
561
562 sp->free(sp);
563 }
564
565 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)566 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
567 uint16_t *data)
568 {
569 srb_t *sp;
570 struct srb_iocb *lio;
571 int rval = QLA_FUNCTION_FAILED;
572
573 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
574 return rval;
575
576 fcport->flags |= FCF_ASYNC_SENT;
577 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
578 if (!sp)
579 goto done;
580
581 sp->type = SRB_ADISC_CMD;
582 sp->name = "adisc";
583
584 lio = &sp->u.iocb_cmd;
585 lio->timeout = qla2x00_async_iocb_timeout;
586 sp->gen1 = fcport->rscn_gen;
587 sp->gen2 = fcport->login_gen;
588 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
589
590 sp->done = qla2x00_async_adisc_sp_done;
591 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
592 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
593
594 ql_dbg(ql_dbg_disc, vha, 0x206f,
595 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
596 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
597
598 rval = qla2x00_start_sp(sp);
599 if (rval != QLA_SUCCESS)
600 goto done_free_sp;
601
602 return rval;
603
604 done_free_sp:
605 sp->free(sp);
606 done:
607 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
608 qla2x00_post_async_adisc_work(vha, fcport, data);
609 return rval;
610 }
611
qla2x00_is_reserved_id(scsi_qla_host_t * vha,uint16_t loop_id)612 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
613 {
614 struct qla_hw_data *ha = vha->hw;
615
616 if (IS_FWI2_CAPABLE(ha))
617 return loop_id > NPH_LAST_HANDLE;
618
619 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
620 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
621 }
622
623 /**
624 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
625 * @vha: adapter state pointer.
626 * @dev: port structure pointer.
627 *
628 * Returns:
629 * qla2x00 local function return status code.
630 *
631 * Context:
632 * Kernel context.
633 */
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)634 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
635 {
636 int rval;
637 struct qla_hw_data *ha = vha->hw;
638 unsigned long flags = 0;
639
640 rval = QLA_SUCCESS;
641
642 spin_lock_irqsave(&ha->vport_slock, flags);
643
644 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
645 if (dev->loop_id >= LOOPID_MAP_SIZE ||
646 qla2x00_is_reserved_id(vha, dev->loop_id)) {
647 dev->loop_id = FC_NO_LOOP_ID;
648 rval = QLA_FUNCTION_FAILED;
649 } else {
650 set_bit(dev->loop_id, ha->loop_id_map);
651 }
652 spin_unlock_irqrestore(&ha->vport_slock, flags);
653
654 if (rval == QLA_SUCCESS)
655 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
656 "Assigning new loopid=%x, portid=%x.\n",
657 dev->loop_id, dev->d_id.b24);
658 else
659 ql_log(ql_log_warn, dev->vha, 0x2087,
660 "No loop_id's available, portid=%x.\n",
661 dev->d_id.b24);
662
663 return rval;
664 }
665
qla2x00_clear_loop_id(fc_port_t * fcport)666 void qla2x00_clear_loop_id(fc_port_t *fcport)
667 {
668 struct qla_hw_data *ha = fcport->vha->hw;
669
670 if (fcport->loop_id == FC_NO_LOOP_ID ||
671 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
672 return;
673
674 clear_bit(fcport->loop_id, ha->loop_id_map);
675 fcport->loop_id = FC_NO_LOOP_ID;
676 }
677
qla24xx_handle_gnl_done_event(scsi_qla_host_t * vha,struct event_arg * ea)678 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
679 struct event_arg *ea)
680 {
681 fc_port_t *fcport, *conflict_fcport;
682 struct get_name_list_extended *e;
683 u16 i, n, found = 0, loop_id;
684 port_id_t id;
685 u64 wwn;
686 u16 data[2];
687 u8 current_login_state, nvme_cls;
688
689 fcport = ea->fcport;
690 ql_dbg(ql_dbg_disc, vha, 0xffff,
691 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
692 __func__, fcport->port_name, fcport->disc_state,
693 fcport->fw_login_state, ea->rc,
694 fcport->login_gen, fcport->last_login_gen,
695 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
696
697 if (fcport->disc_state == DSC_DELETE_PEND)
698 return;
699
700 if (ea->rc) { /* rval */
701 if (fcport->login_retry == 0) {
702 ql_dbg(ql_dbg_disc, vha, 0x20de,
703 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
704 fcport->port_name, fcport->login_retry);
705 }
706 return;
707 }
708
709 if (fcport->last_rscn_gen != fcport->rscn_gen) {
710 qla_rscn_replay(fcport);
711 qlt_schedule_sess_for_deletion(fcport);
712 return;
713 } else if (fcport->last_login_gen != fcport->login_gen) {
714 ql_dbg(ql_dbg_disc, vha, 0x20e0,
715 "%s %8phC login gen changed\n",
716 __func__, fcport->port_name);
717 return;
718 }
719
720 n = ea->data[0] / sizeof(struct get_name_list_extended);
721
722 ql_dbg(ql_dbg_disc, vha, 0x20e1,
723 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
724 __func__, __LINE__, fcport->port_name, n,
725 fcport->d_id.b.domain, fcport->d_id.b.area,
726 fcport->d_id.b.al_pa, fcport->loop_id);
727
728 for (i = 0; i < n; i++) {
729 e = &vha->gnl.l[i];
730 wwn = wwn_to_u64(e->port_name);
731 id.b.domain = e->port_id[2];
732 id.b.area = e->port_id[1];
733 id.b.al_pa = e->port_id[0];
734 id.b.rsvd_1 = 0;
735
736 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
737 continue;
738
739 if (IS_SW_RESV_ADDR(id))
740 continue;
741
742 found = 1;
743
744 loop_id = le16_to_cpu(e->nport_handle);
745 loop_id = (loop_id & 0x7fff);
746 nvme_cls = e->current_login_state >> 4;
747 current_login_state = e->current_login_state & 0xf;
748
749 if (PRLI_PHASE(nvme_cls)) {
750 current_login_state = nvme_cls;
751 fcport->fc4_type &= ~FS_FC4TYPE_FCP;
752 fcport->fc4_type |= FS_FC4TYPE_NVME;
753 } else if (PRLI_PHASE(current_login_state)) {
754 fcport->fc4_type |= FS_FC4TYPE_FCP;
755 fcport->fc4_type &= ~FS_FC4TYPE_NVME;
756 }
757
758 ql_dbg(ql_dbg_disc, vha, 0x20e2,
759 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
760 __func__, fcport->port_name,
761 e->current_login_state, fcport->fw_login_state,
762 fcport->fc4_type, id.b24, fcport->d_id.b24,
763 loop_id, fcport->loop_id);
764
765 switch (fcport->disc_state) {
766 case DSC_DELETE_PEND:
767 case DSC_DELETED:
768 break;
769 default:
770 if ((id.b24 != fcport->d_id.b24 &&
771 fcport->d_id.b24 &&
772 fcport->loop_id != FC_NO_LOOP_ID) ||
773 (fcport->loop_id != FC_NO_LOOP_ID &&
774 fcport->loop_id != loop_id)) {
775 ql_dbg(ql_dbg_disc, vha, 0x20e3,
776 "%s %d %8phC post del sess\n",
777 __func__, __LINE__, fcport->port_name);
778 if (fcport->n2n_flag)
779 fcport->d_id.b24 = 0;
780 qlt_schedule_sess_for_deletion(fcport);
781 return;
782 }
783 break;
784 }
785
786 fcport->loop_id = loop_id;
787 if (fcport->n2n_flag)
788 fcport->d_id.b24 = id.b24;
789
790 wwn = wwn_to_u64(fcport->port_name);
791 qlt_find_sess_invalidate_other(vha, wwn,
792 id, loop_id, &conflict_fcport);
793
794 if (conflict_fcport) {
795 /*
796 * Another share fcport share the same loop_id &
797 * nport id. Conflict fcport needs to finish
798 * cleanup before this fcport can proceed to login.
799 */
800 conflict_fcport->conflict = fcport;
801 fcport->login_pause = 1;
802 }
803
804 switch (vha->hw->current_topology) {
805 default:
806 switch (current_login_state) {
807 case DSC_LS_PRLI_COMP:
808 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
809 vha, 0x20e4, "%s %d %8phC post gpdb\n",
810 __func__, __LINE__, fcport->port_name);
811
812 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
813 fcport->port_type = FCT_INITIATOR;
814 else
815 fcport->port_type = FCT_TARGET;
816 data[0] = data[1] = 0;
817 qla2x00_post_async_adisc_work(vha, fcport,
818 data);
819 break;
820 case DSC_LS_PORT_UNAVAIL:
821 default:
822 if (fcport->loop_id == FC_NO_LOOP_ID) {
823 qla2x00_find_new_loop_id(vha, fcport);
824 fcport->fw_login_state =
825 DSC_LS_PORT_UNAVAIL;
826 }
827 ql_dbg(ql_dbg_disc, vha, 0x20e5,
828 "%s %d %8phC\n", __func__, __LINE__,
829 fcport->port_name);
830 qla24xx_fcport_handle_login(vha, fcport);
831 break;
832 }
833 break;
834 case ISP_CFG_N:
835 fcport->fw_login_state = current_login_state;
836 fcport->d_id = id;
837 switch (current_login_state) {
838 case DSC_LS_PRLI_PEND:
839 /*
840 * In the middle of PRLI. Let it finish.
841 * Allow relogin code to recheck state again
842 * with GNL. Push disc_state back to DELETED
843 * so GNL can go out again
844 */
845 qla2x00_set_fcport_disc_state(fcport,
846 DSC_DELETED);
847 break;
848 case DSC_LS_PRLI_COMP:
849 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
850 fcport->port_type = FCT_INITIATOR;
851 else
852 fcport->port_type = FCT_TARGET;
853
854 data[0] = data[1] = 0;
855 qla2x00_post_async_adisc_work(vha, fcport,
856 data);
857 break;
858 case DSC_LS_PLOGI_COMP:
859 if (fcport_is_bigger(fcport)) {
860 /* local adapter is smaller */
861 if (fcport->loop_id != FC_NO_LOOP_ID)
862 qla2x00_clear_loop_id(fcport);
863
864 fcport->loop_id = loop_id;
865 qla24xx_fcport_handle_login(vha,
866 fcport);
867 break;
868 }
869 fallthrough;
870 default:
871 if (fcport_is_smaller(fcport)) {
872 /* local adapter is bigger */
873 if (fcport->loop_id != FC_NO_LOOP_ID)
874 qla2x00_clear_loop_id(fcport);
875
876 fcport->loop_id = loop_id;
877 qla24xx_fcport_handle_login(vha,
878 fcport);
879 }
880 break;
881 }
882 break;
883 } /* switch (ha->current_topology) */
884 }
885
886 if (!found) {
887 switch (vha->hw->current_topology) {
888 case ISP_CFG_F:
889 case ISP_CFG_FL:
890 for (i = 0; i < n; i++) {
891 e = &vha->gnl.l[i];
892 id.b.domain = e->port_id[0];
893 id.b.area = e->port_id[1];
894 id.b.al_pa = e->port_id[2];
895 id.b.rsvd_1 = 0;
896 loop_id = le16_to_cpu(e->nport_handle);
897
898 if (fcport->d_id.b24 == id.b24) {
899 conflict_fcport =
900 qla2x00_find_fcport_by_wwpn(vha,
901 e->port_name, 0);
902 if (conflict_fcport) {
903 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
904 vha, 0x20e5,
905 "%s %d %8phC post del sess\n",
906 __func__, __LINE__,
907 conflict_fcport->port_name);
908 qlt_schedule_sess_for_deletion
909 (conflict_fcport);
910 }
911 }
912 /*
913 * FW already picked this loop id for
914 * another fcport
915 */
916 if (fcport->loop_id == loop_id)
917 fcport->loop_id = FC_NO_LOOP_ID;
918 }
919 qla24xx_fcport_handle_login(vha, fcport);
920 break;
921 case ISP_CFG_N:
922 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
923 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
924 if (fcport->n2n_link_reset_cnt < 2) {
925 fcport->n2n_link_reset_cnt++;
926 /*
927 * remote port is not sending PLOGI.
928 * Reset link to kick start his state
929 * machine
930 */
931 set_bit(N2N_LINK_RESET,
932 &vha->dpc_flags);
933 } else {
934 if (fcport->n2n_chip_reset < 1) {
935 ql_log(ql_log_info, vha, 0x705d,
936 "Chip reset to bring laser down");
937 set_bit(ISP_ABORT_NEEDED,
938 &vha->dpc_flags);
939 fcport->n2n_chip_reset++;
940 } else {
941 ql_log(ql_log_info, vha, 0x705d,
942 "Remote port %8ph is not coming back\n",
943 fcport->port_name);
944 fcport->scan_state = 0;
945 }
946 }
947 qla2xxx_wake_dpc(vha);
948 } else {
949 /*
950 * report port suppose to do PLOGI. Give him
951 * more time. FW will catch it.
952 */
953 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
954 }
955 break;
956 default:
957 break;
958 }
959 }
960 } /* gnl_event */
961
qla24xx_async_gnl_sp_done(srb_t * sp,int res)962 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
963 {
964 struct scsi_qla_host *vha = sp->vha;
965 unsigned long flags;
966 struct fc_port *fcport = NULL, *tf;
967 u16 i, n = 0, loop_id;
968 struct event_arg ea;
969 struct get_name_list_extended *e;
970 u64 wwn;
971 struct list_head h;
972 bool found = false;
973
974 ql_dbg(ql_dbg_disc, vha, 0x20e7,
975 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
976 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
977 sp->u.iocb_cmd.u.mbx.in_mb[2]);
978
979 if (res == QLA_FUNCTION_TIMEOUT)
980 return;
981
982 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
983 memset(&ea, 0, sizeof(ea));
984 ea.sp = sp;
985 ea.rc = res;
986
987 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
988 sizeof(struct get_name_list_extended)) {
989 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
990 sizeof(struct get_name_list_extended);
991 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
992 }
993
994 for (i = 0; i < n; i++) {
995 e = &vha->gnl.l[i];
996 loop_id = le16_to_cpu(e->nport_handle);
997 /* mask out reserve bit */
998 loop_id = (loop_id & 0x7fff);
999 set_bit(loop_id, vha->hw->loop_id_map);
1000 wwn = wwn_to_u64(e->port_name);
1001
1002 ql_dbg(ql_dbg_disc, vha, 0x20e8,
1003 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1004 __func__, &wwn, e->port_id[2], e->port_id[1],
1005 e->port_id[0], e->current_login_state, e->last_login_state,
1006 (loop_id & 0x7fff));
1007 }
1008
1009 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1010
1011 INIT_LIST_HEAD(&h);
1012 fcport = tf = NULL;
1013 if (!list_empty(&vha->gnl.fcports))
1014 list_splice_init(&vha->gnl.fcports, &h);
1015 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1016
1017 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1018 list_del_init(&fcport->gnl_entry);
1019 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1020 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1021 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1022 ea.fcport = fcport;
1023
1024 qla24xx_handle_gnl_done_event(vha, &ea);
1025 }
1026
1027 /* create new fcport if fw has knowledge of new sessions */
1028 for (i = 0; i < n; i++) {
1029 port_id_t id;
1030 u64 wwnn;
1031
1032 e = &vha->gnl.l[i];
1033 wwn = wwn_to_u64(e->port_name);
1034
1035 found = false;
1036 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1037 if (!memcmp((u8 *)&wwn, fcport->port_name,
1038 WWN_SIZE)) {
1039 found = true;
1040 break;
1041 }
1042 }
1043
1044 id.b.domain = e->port_id[2];
1045 id.b.area = e->port_id[1];
1046 id.b.al_pa = e->port_id[0];
1047 id.b.rsvd_1 = 0;
1048
1049 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1050 ql_dbg(ql_dbg_disc, vha, 0x2065,
1051 "%s %d %8phC %06x post new sess\n",
1052 __func__, __LINE__, (u8 *)&wwn, id.b24);
1053 wwnn = wwn_to_u64(e->node_name);
1054 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1055 (u8 *)&wwnn, NULL, 0);
1056 }
1057 }
1058
1059 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1060 vha->gnl.sent = 0;
1061 if (!list_empty(&vha->gnl.fcports)) {
1062 /* retrigger gnl */
1063 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1064 gnl_entry) {
1065 list_del_init(&fcport->gnl_entry);
1066 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1067 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1068 break;
1069 }
1070 }
1071 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1072
1073 sp->free(sp);
1074 }
1075
qla24xx_async_gnl(struct scsi_qla_host * vha,fc_port_t * fcport)1076 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1077 {
1078 srb_t *sp;
1079 struct srb_iocb *mbx;
1080 int rval = QLA_FUNCTION_FAILED;
1081 unsigned long flags;
1082 u16 *mb;
1083
1084 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1085 return rval;
1086
1087 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1088 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1089
1090 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1091 fcport->flags |= FCF_ASYNC_SENT;
1092 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1093 fcport->last_rscn_gen = fcport->rscn_gen;
1094 fcport->last_login_gen = fcport->login_gen;
1095
1096 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1097 if (vha->gnl.sent) {
1098 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1099 return QLA_SUCCESS;
1100 }
1101 vha->gnl.sent = 1;
1102 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1103
1104 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1105 if (!sp)
1106 goto done;
1107
1108 sp->type = SRB_MB_IOCB;
1109 sp->name = "gnlist";
1110 sp->gen1 = fcport->rscn_gen;
1111 sp->gen2 = fcport->login_gen;
1112
1113 mbx = &sp->u.iocb_cmd;
1114 mbx->timeout = qla2x00_async_iocb_timeout;
1115 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
1116
1117 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1118 mb[0] = MBC_PORT_NODE_NAME_LIST;
1119 mb[1] = BIT_2 | BIT_3;
1120 mb[2] = MSW(vha->gnl.ldma);
1121 mb[3] = LSW(vha->gnl.ldma);
1122 mb[6] = MSW(MSD(vha->gnl.ldma));
1123 mb[7] = LSW(MSD(vha->gnl.ldma));
1124 mb[8] = vha->gnl.size;
1125 mb[9] = vha->vp_idx;
1126
1127 sp->done = qla24xx_async_gnl_sp_done;
1128
1129 ql_dbg(ql_dbg_disc, vha, 0x20da,
1130 "Async-%s - OUT WWPN %8phC hndl %x\n",
1131 sp->name, fcport->port_name, sp->handle);
1132
1133 rval = qla2x00_start_sp(sp);
1134 if (rval != QLA_SUCCESS)
1135 goto done_free_sp;
1136
1137 return rval;
1138
1139 done_free_sp:
1140 sp->free(sp);
1141 done:
1142 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT);
1143 return rval;
1144 }
1145
qla24xx_post_gnl_work(struct scsi_qla_host * vha,fc_port_t * fcport)1146 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1147 {
1148 struct qla_work_evt *e;
1149
1150 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1151 if (!e)
1152 return QLA_FUNCTION_FAILED;
1153
1154 e->u.fcport.fcport = fcport;
1155 fcport->flags |= FCF_ASYNC_ACTIVE;
1156 return qla2x00_post_work(vha, e);
1157 }
1158
qla24xx_async_gpdb_sp_done(srb_t * sp,int res)1159 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1160 {
1161 struct scsi_qla_host *vha = sp->vha;
1162 struct qla_hw_data *ha = vha->hw;
1163 fc_port_t *fcport = sp->fcport;
1164 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1165 struct event_arg ea;
1166
1167 ql_dbg(ql_dbg_disc, vha, 0x20db,
1168 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1169 sp->name, res, fcport->port_name, mb[1], mb[2]);
1170
1171 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1172
1173 if (res == QLA_FUNCTION_TIMEOUT)
1174 goto done;
1175
1176 memset(&ea, 0, sizeof(ea));
1177 ea.fcport = fcport;
1178 ea.sp = sp;
1179
1180 qla24xx_handle_gpdb_event(vha, &ea);
1181
1182 done:
1183 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1184 sp->u.iocb_cmd.u.mbx.in_dma);
1185
1186 sp->free(sp);
1187 }
1188
qla24xx_post_prli_work(struct scsi_qla_host * vha,fc_port_t * fcport)1189 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1190 {
1191 struct qla_work_evt *e;
1192
1193 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1194 if (!e)
1195 return QLA_FUNCTION_FAILED;
1196
1197 e->u.fcport.fcport = fcport;
1198
1199 return qla2x00_post_work(vha, e);
1200 }
1201
qla2x00_async_prli_sp_done(srb_t * sp,int res)1202 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1203 {
1204 struct scsi_qla_host *vha = sp->vha;
1205 struct srb_iocb *lio = &sp->u.iocb_cmd;
1206 struct event_arg ea;
1207
1208 ql_dbg(ql_dbg_disc, vha, 0x2129,
1209 "%s %8phC res %d \n", __func__,
1210 sp->fcport->port_name, res);
1211
1212 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1213
1214 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1215 memset(&ea, 0, sizeof(ea));
1216 ea.fcport = sp->fcport;
1217 ea.data[0] = lio->u.logio.data[0];
1218 ea.data[1] = lio->u.logio.data[1];
1219 ea.iop[0] = lio->u.logio.iop[0];
1220 ea.iop[1] = lio->u.logio.iop[1];
1221 ea.sp = sp;
1222
1223 qla24xx_handle_prli_done_event(vha, &ea);
1224 }
1225
1226 sp->free(sp);
1227 }
1228
1229 int
qla24xx_async_prli(struct scsi_qla_host * vha,fc_port_t * fcport)1230 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1231 {
1232 srb_t *sp;
1233 struct srb_iocb *lio;
1234 int rval = QLA_FUNCTION_FAILED;
1235
1236 if (!vha->flags.online) {
1237 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1238 __func__, __LINE__, fcport->port_name);
1239 return rval;
1240 }
1241
1242 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1243 fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1244 qla_dual_mode_enabled(vha)) {
1245 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1246 __func__, __LINE__, fcport->port_name);
1247 return rval;
1248 }
1249
1250 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1251 if (!sp)
1252 return rval;
1253
1254 fcport->flags |= FCF_ASYNC_SENT;
1255 fcport->logout_completed = 0;
1256
1257 sp->type = SRB_PRLI_CMD;
1258 sp->name = "prli";
1259
1260 lio = &sp->u.iocb_cmd;
1261 lio->timeout = qla2x00_async_iocb_timeout;
1262 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1263
1264 sp->done = qla2x00_async_prli_sp_done;
1265 lio->u.logio.flags = 0;
1266
1267 if (NVME_TARGET(vha->hw, fcport))
1268 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1269
1270 ql_dbg(ql_dbg_disc, vha, 0x211b,
1271 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1272 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1273 fcport->login_retry, NVME_TARGET(vha->hw, fcport) ? "nvme" : "fc");
1274
1275 rval = qla2x00_start_sp(sp);
1276 if (rval != QLA_SUCCESS) {
1277 fcport->flags |= FCF_LOGIN_NEEDED;
1278 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1279 goto done_free_sp;
1280 }
1281
1282 return rval;
1283
1284 done_free_sp:
1285 sp->free(sp);
1286 fcport->flags &= ~FCF_ASYNC_SENT;
1287 return rval;
1288 }
1289
qla24xx_post_gpdb_work(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1290 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1291 {
1292 struct qla_work_evt *e;
1293
1294 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1295 if (!e)
1296 return QLA_FUNCTION_FAILED;
1297
1298 e->u.fcport.fcport = fcport;
1299 e->u.fcport.opt = opt;
1300 fcport->flags |= FCF_ASYNC_ACTIVE;
1301 return qla2x00_post_work(vha, e);
1302 }
1303
qla24xx_async_gpdb(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1304 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1305 {
1306 srb_t *sp;
1307 struct srb_iocb *mbx;
1308 int rval = QLA_FUNCTION_FAILED;
1309 u16 *mb;
1310 dma_addr_t pd_dma;
1311 struct port_database_24xx *pd;
1312 struct qla_hw_data *ha = vha->hw;
1313
1314 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
1315 fcport->loop_id == FC_NO_LOOP_ID) {
1316 ql_log(ql_log_warn, vha, 0xffff,
1317 "%s: %8phC - not sending command.\n",
1318 __func__, fcport->port_name);
1319 return rval;
1320 }
1321
1322 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1323 if (!sp)
1324 goto done;
1325
1326 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1327
1328 fcport->flags |= FCF_ASYNC_SENT;
1329 sp->type = SRB_MB_IOCB;
1330 sp->name = "gpdb";
1331 sp->gen1 = fcport->rscn_gen;
1332 sp->gen2 = fcport->login_gen;
1333
1334 mbx = &sp->u.iocb_cmd;
1335 mbx->timeout = qla2x00_async_iocb_timeout;
1336 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1337
1338 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1339 if (pd == NULL) {
1340 ql_log(ql_log_warn, vha, 0xd043,
1341 "Failed to allocate port database structure.\n");
1342 goto done_free_sp;
1343 }
1344
1345 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1346 mb[0] = MBC_GET_PORT_DATABASE;
1347 mb[1] = fcport->loop_id;
1348 mb[2] = MSW(pd_dma);
1349 mb[3] = LSW(pd_dma);
1350 mb[6] = MSW(MSD(pd_dma));
1351 mb[7] = LSW(MSD(pd_dma));
1352 mb[9] = vha->vp_idx;
1353 mb[10] = opt;
1354
1355 mbx->u.mbx.in = pd;
1356 mbx->u.mbx.in_dma = pd_dma;
1357
1358 sp->done = qla24xx_async_gpdb_sp_done;
1359
1360 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1361 "Async-%s %8phC hndl %x opt %x\n",
1362 sp->name, fcport->port_name, sp->handle, opt);
1363
1364 rval = qla2x00_start_sp(sp);
1365 if (rval != QLA_SUCCESS)
1366 goto done_free_sp;
1367 return rval;
1368
1369 done_free_sp:
1370 if (pd)
1371 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1372
1373 sp->free(sp);
1374 fcport->flags &= ~FCF_ASYNC_SENT;
1375 done:
1376 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1377 qla24xx_post_gpdb_work(vha, fcport, opt);
1378 return rval;
1379 }
1380
1381 static
__qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1382 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1383 {
1384 unsigned long flags;
1385
1386 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1387 ea->fcport->login_gen++;
1388 ea->fcport->deleted = 0;
1389 ea->fcport->logout_on_delete = 1;
1390
1391 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1392 vha->fcport_count++;
1393 ea->fcport->login_succ = 1;
1394
1395 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1396 qla24xx_sched_upd_fcport(ea->fcport);
1397 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1398 } else if (ea->fcport->login_succ) {
1399 /*
1400 * We have an existing session. A late RSCN delivery
1401 * must have triggered the session to be re-validate.
1402 * Session is still valid.
1403 */
1404 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1405 "%s %d %8phC session revalidate success\n",
1406 __func__, __LINE__, ea->fcport->port_name);
1407 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1408 }
1409 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1410 }
1411
1412 static
qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1413 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1414 {
1415 fc_port_t *fcport = ea->fcport;
1416 struct port_database_24xx *pd;
1417 struct srb *sp = ea->sp;
1418 uint8_t ls;
1419
1420 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1421
1422 fcport->flags &= ~FCF_ASYNC_SENT;
1423
1424 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1425 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__,
1426 fcport->port_name, fcport->disc_state, pd->current_login_state,
1427 fcport->fc4_type, ea->rc);
1428
1429 if (fcport->disc_state == DSC_DELETE_PEND)
1430 return;
1431
1432 if (NVME_TARGET(vha->hw, fcport))
1433 ls = pd->current_login_state >> 4;
1434 else
1435 ls = pd->current_login_state & 0xf;
1436
1437 if (ea->sp->gen2 != fcport->login_gen) {
1438 /* target side must have changed it. */
1439
1440 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1441 "%s %8phC generation changed\n",
1442 __func__, fcport->port_name);
1443 return;
1444 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1445 qla_rscn_replay(fcport);
1446 qlt_schedule_sess_for_deletion(fcport);
1447 return;
1448 }
1449
1450 switch (ls) {
1451 case PDS_PRLI_COMPLETE:
1452 __qla24xx_parse_gpdb(vha, fcport, pd);
1453 break;
1454 case PDS_PLOGI_PENDING:
1455 case PDS_PLOGI_COMPLETE:
1456 case PDS_PRLI_PENDING:
1457 case PDS_PRLI2_PENDING:
1458 /* Set discovery state back to GNL to Relogin attempt */
1459 if (qla_dual_mode_enabled(vha) ||
1460 qla_ini_mode_enabled(vha)) {
1461 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1462 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1463 }
1464 return;
1465 case PDS_LOGO_PENDING:
1466 case PDS_PORT_UNAVAILABLE:
1467 default:
1468 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1469 __func__, __LINE__, fcport->port_name);
1470 qlt_schedule_sess_for_deletion(fcport);
1471 return;
1472 }
1473 __qla24xx_handle_gpdb_event(vha, ea);
1474 } /* gpdb event */
1475
qla_chk_n2n_b4_login(struct scsi_qla_host * vha,fc_port_t * fcport)1476 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1477 {
1478 u8 login = 0;
1479 int rc;
1480
1481 if (qla_tgt_mode_enabled(vha))
1482 return;
1483
1484 if (qla_dual_mode_enabled(vha)) {
1485 if (N2N_TOPO(vha->hw)) {
1486 u64 mywwn, wwn;
1487
1488 mywwn = wwn_to_u64(vha->port_name);
1489 wwn = wwn_to_u64(fcport->port_name);
1490 if (mywwn > wwn)
1491 login = 1;
1492 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1493 && time_after_eq(jiffies,
1494 fcport->plogi_nack_done_deadline))
1495 login = 1;
1496 } else {
1497 login = 1;
1498 }
1499 } else {
1500 /* initiator mode */
1501 login = 1;
1502 }
1503
1504 if (login && fcport->login_retry) {
1505 fcport->login_retry--;
1506 if (fcport->loop_id == FC_NO_LOOP_ID) {
1507 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1508 rc = qla2x00_find_new_loop_id(vha, fcport);
1509 if (rc) {
1510 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1511 "%s %d %8phC post del sess - out of loopid\n",
1512 __func__, __LINE__, fcport->port_name);
1513 fcport->scan_state = 0;
1514 qlt_schedule_sess_for_deletion(fcport);
1515 return;
1516 }
1517 }
1518 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1519 "%s %d %8phC post login\n",
1520 __func__, __LINE__, fcport->port_name);
1521 qla2x00_post_async_login_work(vha, fcport, NULL);
1522 }
1523 }
1524
qla24xx_fcport_handle_login(struct scsi_qla_host * vha,fc_port_t * fcport)1525 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1526 {
1527 u16 data[2];
1528 u64 wwn;
1529 u16 sec;
1530
1531 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1532 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
1533 __func__, fcport->port_name, fcport->disc_state,
1534 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1535 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1536 fcport->login_gen, fcport->loop_id, fcport->scan_state);
1537
1538 if (fcport->scan_state != QLA_FCPORT_FOUND)
1539 return 0;
1540
1541 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1542 qla_dual_mode_enabled(vha) &&
1543 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1544 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1545 return 0;
1546
1547 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1548 !N2N_TOPO(vha->hw)) {
1549 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1550 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1551 return 0;
1552 }
1553 }
1554
1555 /* Target won't initiate port login if fabric is present */
1556 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1557 return 0;
1558
1559 if (fcport->flags & FCF_ASYNC_SENT) {
1560 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1561 return 0;
1562 }
1563
1564 switch (fcport->disc_state) {
1565 case DSC_DELETED:
1566 wwn = wwn_to_u64(fcport->node_name);
1567 switch (vha->hw->current_topology) {
1568 case ISP_CFG_N:
1569 if (fcport_is_smaller(fcport)) {
1570 /* this adapter is bigger */
1571 if (fcport->login_retry) {
1572 if (fcport->loop_id == FC_NO_LOOP_ID) {
1573 qla2x00_find_new_loop_id(vha,
1574 fcport);
1575 fcport->fw_login_state =
1576 DSC_LS_PORT_UNAVAIL;
1577 }
1578 fcport->login_retry--;
1579 qla_post_els_plogi_work(vha, fcport);
1580 } else {
1581 ql_log(ql_log_info, vha, 0x705d,
1582 "Unable to reach remote port %8phC",
1583 fcport->port_name);
1584 }
1585 } else {
1586 qla24xx_post_gnl_work(vha, fcport);
1587 }
1588 break;
1589 default:
1590 if (wwn == 0) {
1591 ql_dbg(ql_dbg_disc, vha, 0xffff,
1592 "%s %d %8phC post GNNID\n",
1593 __func__, __LINE__, fcport->port_name);
1594 qla24xx_post_gnnid_work(vha, fcport);
1595 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1596 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1597 "%s %d %8phC post gnl\n",
1598 __func__, __LINE__, fcport->port_name);
1599 qla24xx_post_gnl_work(vha, fcport);
1600 } else {
1601 qla_chk_n2n_b4_login(vha, fcport);
1602 }
1603 break;
1604 }
1605 break;
1606
1607 case DSC_GNL:
1608 switch (vha->hw->current_topology) {
1609 case ISP_CFG_N:
1610 if ((fcport->current_login_state & 0xf) == 0x6) {
1611 ql_dbg(ql_dbg_disc, vha, 0x2118,
1612 "%s %d %8phC post GPDB work\n",
1613 __func__, __LINE__, fcport->port_name);
1614 fcport->chip_reset =
1615 vha->hw->base_qpair->chip_reset;
1616 qla24xx_post_gpdb_work(vha, fcport, 0);
1617 } else {
1618 ql_dbg(ql_dbg_disc, vha, 0x2118,
1619 "%s %d %8phC post %s PRLI\n",
1620 __func__, __LINE__, fcport->port_name,
1621 NVME_TARGET(vha->hw, fcport) ? "NVME" :
1622 "FC");
1623 qla24xx_post_prli_work(vha, fcport);
1624 }
1625 break;
1626 default:
1627 if (fcport->login_pause) {
1628 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1629 "%s %d %8phC exit\n",
1630 __func__, __LINE__,
1631 fcport->port_name);
1632 fcport->last_rscn_gen = fcport->rscn_gen;
1633 fcport->last_login_gen = fcport->login_gen;
1634 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1635 break;
1636 }
1637 qla_chk_n2n_b4_login(vha, fcport);
1638 break;
1639 }
1640 break;
1641
1642 case DSC_LOGIN_FAILED:
1643 if (N2N_TOPO(vha->hw))
1644 qla_chk_n2n_b4_login(vha, fcport);
1645 else
1646 qlt_schedule_sess_for_deletion(fcport);
1647 break;
1648
1649 case DSC_LOGIN_COMPLETE:
1650 /* recheck login state */
1651 data[0] = data[1] = 0;
1652 qla2x00_post_async_adisc_work(vha, fcport, data);
1653 break;
1654
1655 case DSC_LOGIN_PEND:
1656 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1657 qla24xx_post_prli_work(vha, fcport);
1658 break;
1659
1660 case DSC_UPD_FCPORT:
1661 sec = jiffies_to_msecs(jiffies -
1662 fcport->jiffies_at_registration)/1000;
1663 if (fcport->sec_since_registration < sec && sec &&
1664 !(sec % 60)) {
1665 fcport->sec_since_registration = sec;
1666 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1667 "%s %8phC - Slow Rport registration(%d Sec)\n",
1668 __func__, fcport->port_name, sec);
1669 }
1670
1671 if (fcport->next_disc_state != DSC_DELETE_PEND)
1672 fcport->next_disc_state = DSC_ADISC;
1673 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1674 break;
1675
1676 default:
1677 break;
1678 }
1679
1680 return 0;
1681 }
1682
qla24xx_post_newsess_work(struct scsi_qla_host * vha,port_id_t * id,u8 * port_name,u8 * node_name,void * pla,u8 fc4_type)1683 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1684 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1685 {
1686 struct qla_work_evt *e;
1687
1688 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1689 if (!e)
1690 return QLA_FUNCTION_FAILED;
1691
1692 e->u.new_sess.id = *id;
1693 e->u.new_sess.pla = pla;
1694 e->u.new_sess.fc4_type = fc4_type;
1695 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1696 if (node_name)
1697 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1698
1699 return qla2x00_post_work(vha, e);
1700 }
1701
qla2x00_handle_rscn(scsi_qla_host_t * vha,struct event_arg * ea)1702 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1703 {
1704 fc_port_t *fcport;
1705 unsigned long flags;
1706
1707 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1708 if (fcport) {
1709 fcport->scan_needed = 1;
1710 fcport->rscn_gen++;
1711 }
1712
1713 spin_lock_irqsave(&vha->work_lock, flags);
1714 if (vha->scan.scan_flags == 0) {
1715 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1716 vha->scan.scan_flags |= SF_QUEUED;
1717 schedule_delayed_work(&vha->scan.scan_work, 5);
1718 }
1719 spin_unlock_irqrestore(&vha->work_lock, flags);
1720 }
1721
qla24xx_handle_relogin_event(scsi_qla_host_t * vha,struct event_arg * ea)1722 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1723 struct event_arg *ea)
1724 {
1725 fc_port_t *fcport = ea->fcport;
1726
1727 if (test_bit(UNLOADING, &vha->dpc_flags))
1728 return;
1729
1730 ql_dbg(ql_dbg_disc, vha, 0x2102,
1731 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1732 __func__, fcport->port_name, fcport->disc_state,
1733 fcport->fw_login_state, fcport->login_pause,
1734 fcport->deleted, fcport->conflict,
1735 fcport->last_rscn_gen, fcport->rscn_gen,
1736 fcport->last_login_gen, fcport->login_gen,
1737 fcport->flags);
1738
1739 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1740 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1741 __func__, __LINE__, fcport->port_name);
1742 qla24xx_post_gnl_work(vha, fcport);
1743 return;
1744 }
1745
1746 qla24xx_fcport_handle_login(vha, fcport);
1747 }
1748
qla_handle_els_plogi_done(scsi_qla_host_t * vha,struct event_arg * ea)1749 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1750 struct event_arg *ea)
1751 {
1752 /* for pure Target Mode, PRLI will not be initiated */
1753 if (vha->host->active_mode == MODE_TARGET)
1754 return;
1755
1756 ql_dbg(ql_dbg_disc, vha, 0x2118,
1757 "%s %d %8phC post PRLI\n",
1758 __func__, __LINE__, ea->fcport->port_name);
1759 qla24xx_post_prli_work(vha, ea->fcport);
1760 }
1761
1762 /*
1763 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1764 * to be consumed by the fcport
1765 */
qla_rscn_replay(fc_port_t * fcport)1766 void qla_rscn_replay(fc_port_t *fcport)
1767 {
1768 struct event_arg ea;
1769
1770 switch (fcport->disc_state) {
1771 case DSC_DELETE_PEND:
1772 return;
1773 default:
1774 break;
1775 }
1776
1777 if (fcport->scan_needed) {
1778 memset(&ea, 0, sizeof(ea));
1779 ea.id = fcport->d_id;
1780 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1781 qla2x00_handle_rscn(fcport->vha, &ea);
1782 }
1783 }
1784
1785 static void
qla2x00_tmf_iocb_timeout(void * data)1786 qla2x00_tmf_iocb_timeout(void *data)
1787 {
1788 srb_t *sp = data;
1789 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1790 int rc, h;
1791 unsigned long flags;
1792
1793 rc = qla24xx_async_abort_cmd(sp, false);
1794 if (rc) {
1795 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
1796 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
1797 if (sp->qpair->req->outstanding_cmds[h] == sp) {
1798 sp->qpair->req->outstanding_cmds[h] = NULL;
1799 break;
1800 }
1801 }
1802 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
1803 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
1804 tmf->u.tmf.data = QLA_FUNCTION_FAILED;
1805 complete(&tmf->u.tmf.comp);
1806 }
1807 }
1808
qla2x00_tmf_sp_done(srb_t * sp,int res)1809 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
1810 {
1811 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1812
1813 complete(&tmf->u.tmf.comp);
1814 }
1815
1816 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint32_t lun,uint32_t tag)1817 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1818 uint32_t tag)
1819 {
1820 struct scsi_qla_host *vha = fcport->vha;
1821 struct srb_iocb *tm_iocb;
1822 srb_t *sp;
1823 int rval = QLA_FUNCTION_FAILED;
1824
1825 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1826 if (!sp)
1827 goto done;
1828
1829 tm_iocb = &sp->u.iocb_cmd;
1830 sp->type = SRB_TM_CMD;
1831 sp->name = "tmf";
1832
1833 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1834 init_completion(&tm_iocb->u.tmf.comp);
1835 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1836
1837 tm_iocb->u.tmf.flags = flags;
1838 tm_iocb->u.tmf.lun = lun;
1839 tm_iocb->u.tmf.data = tag;
1840 sp->done = qla2x00_tmf_sp_done;
1841
1842 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1843 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1844 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1845 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1846
1847 rval = qla2x00_start_sp(sp);
1848 if (rval != QLA_SUCCESS)
1849 goto done_free_sp;
1850 wait_for_completion(&tm_iocb->u.tmf.comp);
1851
1852 rval = tm_iocb->u.tmf.data;
1853
1854 if (rval != QLA_SUCCESS) {
1855 ql_log(ql_log_warn, vha, 0x8030,
1856 "TM IOCB failed (%x).\n", rval);
1857 }
1858
1859 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1860 flags = tm_iocb->u.tmf.flags;
1861 lun = (uint16_t)tm_iocb->u.tmf.lun;
1862
1863 /* Issue Marker IOCB */
1864 qla2x00_marker(vha, vha->hw->base_qpair,
1865 fcport->loop_id, lun,
1866 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1867 }
1868
1869 done_free_sp:
1870 sp->free(sp);
1871 fcport->flags &= ~FCF_ASYNC_SENT;
1872 done:
1873 return rval;
1874 }
1875
1876 int
qla24xx_async_abort_command(srb_t * sp)1877 qla24xx_async_abort_command(srb_t *sp)
1878 {
1879 unsigned long flags = 0;
1880
1881 uint32_t handle;
1882 fc_port_t *fcport = sp->fcport;
1883 struct qla_qpair *qpair = sp->qpair;
1884 struct scsi_qla_host *vha = fcport->vha;
1885 struct req_que *req = qpair->req;
1886
1887 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1888 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1889 if (req->outstanding_cmds[handle] == sp)
1890 break;
1891 }
1892 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1893
1894 if (handle == req->num_outstanding_cmds) {
1895 /* Command not found. */
1896 return QLA_FUNCTION_FAILED;
1897 }
1898 if (sp->type == SRB_FXIOCB_DCMD)
1899 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1900 FXDISC_ABORT_IOCTL);
1901
1902 return qla24xx_async_abort_cmd(sp, true);
1903 }
1904
1905 static void
qla24xx_handle_prli_done_event(struct scsi_qla_host * vha,struct event_arg * ea)1906 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1907 {
1908 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1909 ea->data[0]);
1910
1911 switch (ea->data[0]) {
1912 case MBS_COMMAND_COMPLETE:
1913 ql_dbg(ql_dbg_disc, vha, 0x2118,
1914 "%s %d %8phC post gpdb\n",
1915 __func__, __LINE__, ea->fcport->port_name);
1916
1917 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1918 ea->fcport->logout_on_delete = 1;
1919 ea->fcport->nvme_prli_service_param = ea->iop[0];
1920 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
1921 ea->fcport->nvme_first_burst_size =
1922 (ea->iop[1] & 0xffff) * 512;
1923 else
1924 ea->fcport->nvme_first_burst_size = 0;
1925 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1926 break;
1927 default:
1928 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1929 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1930 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1931 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1932 break;
1933 }
1934
1935 /*
1936 * Retry PRLI with other FC-4 type if failure occurred on dual
1937 * FCP/NVMe port
1938 */
1939 if (NVME_FCP_TARGET(ea->fcport)) {
1940 ql_dbg(ql_dbg_disc, vha, 0x2118,
1941 "%s %d %8phC post %s prli\n",
1942 __func__, __LINE__, ea->fcport->port_name,
1943 (ea->fcport->fc4_type & FS_FC4TYPE_NVME) ?
1944 "NVMe" : "FCP");
1945 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME)
1946 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
1947 else
1948 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
1949 }
1950
1951 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1952 ea->fcport->keep_nport_handle = 0;
1953 ea->fcport->logout_on_delete = 1;
1954 qlt_schedule_sess_for_deletion(ea->fcport);
1955 break;
1956 }
1957 }
1958
1959 void
qla24xx_handle_plogi_done_event(struct scsi_qla_host * vha,struct event_arg * ea)1960 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1961 {
1962 port_id_t cid; /* conflict Nport id */
1963 u16 lid;
1964 struct fc_port *conflict_fcport;
1965 unsigned long flags;
1966 struct fc_port *fcport = ea->fcport;
1967
1968 ql_dbg(ql_dbg_disc, vha, 0xffff,
1969 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1970 __func__, fcport->port_name, fcport->disc_state,
1971 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1972 ea->sp->gen1, fcport->rscn_gen,
1973 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1974
1975 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1976 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1977 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1978 "%s %d %8phC Remote is trying to login\n",
1979 __func__, __LINE__, fcport->port_name);
1980 return;
1981 }
1982
1983 if ((fcport->disc_state == DSC_DELETE_PEND) ||
1984 (fcport->disc_state == DSC_DELETED)) {
1985 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1986 return;
1987 }
1988
1989 if (ea->sp->gen2 != fcport->login_gen) {
1990 /* target side must have changed it. */
1991 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1992 "%s %8phC generation changed\n",
1993 __func__, fcport->port_name);
1994 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1995 return;
1996 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1997 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1998 "%s %8phC RSCN generation changed\n",
1999 __func__, fcport->port_name);
2000 qla_rscn_replay(fcport);
2001 qlt_schedule_sess_for_deletion(fcport);
2002 return;
2003 }
2004
2005 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2006 ea->data[0]);
2007
2008 switch (ea->data[0]) {
2009 case MBS_COMMAND_COMPLETE:
2010 /*
2011 * Driver must validate login state - If PRLI not complete,
2012 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2013 * requests.
2014 */
2015 if (NVME_TARGET(vha->hw, ea->fcport)) {
2016 ql_dbg(ql_dbg_disc, vha, 0x2117,
2017 "%s %d %8phC post prli\n",
2018 __func__, __LINE__, ea->fcport->port_name);
2019 qla24xx_post_prli_work(vha, ea->fcport);
2020 } else {
2021 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2022 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2023 __func__, __LINE__, ea->fcport->port_name,
2024 ea->fcport->loop_id, ea->fcport->d_id.b24);
2025
2026 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2027 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2028 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2029 ea->fcport->logout_on_delete = 1;
2030 ea->fcport->send_els_logo = 0;
2031 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
2032 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2033
2034 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2035 }
2036 break;
2037 case MBS_COMMAND_ERROR:
2038 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2039 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2040
2041 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2042 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED);
2043 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
2044 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2045 else
2046 qla2x00_mark_device_lost(vha, ea->fcport, 1);
2047 break;
2048 case MBS_LOOP_ID_USED:
2049 /* data[1] = IO PARAM 1 = nport ID */
2050 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2051 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2052 cid.b.al_pa = ea->iop[1] & 0xff;
2053 cid.b.rsvd_1 = 0;
2054
2055 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2056 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2057 __func__, __LINE__, ea->fcport->port_name,
2058 ea->fcport->loop_id, cid.b24);
2059
2060 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2061 ea->fcport->loop_id = FC_NO_LOOP_ID;
2062 qla24xx_post_gnl_work(vha, ea->fcport);
2063 break;
2064 case MBS_PORT_ID_USED:
2065 lid = ea->iop[1] & 0xffff;
2066 qlt_find_sess_invalidate_other(vha,
2067 wwn_to_u64(ea->fcport->port_name),
2068 ea->fcport->d_id, lid, &conflict_fcport);
2069
2070 if (conflict_fcport) {
2071 /*
2072 * Another fcport share the same loop_id/nport id.
2073 * Conflict fcport needs to finish cleanup before this
2074 * fcport can proceed to login.
2075 */
2076 conflict_fcport->conflict = ea->fcport;
2077 ea->fcport->login_pause = 1;
2078
2079 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2080 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2081 __func__, __LINE__, ea->fcport->port_name,
2082 ea->fcport->d_id.b24, lid);
2083 } else {
2084 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2085 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2086 __func__, __LINE__, ea->fcport->port_name,
2087 ea->fcport->d_id.b24, lid);
2088
2089 qla2x00_clear_loop_id(ea->fcport);
2090 set_bit(lid, vha->hw->loop_id_map);
2091 ea->fcport->loop_id = lid;
2092 ea->fcport->keep_nport_handle = 0;
2093 ea->fcport->logout_on_delete = 1;
2094 qlt_schedule_sess_for_deletion(ea->fcport);
2095 }
2096 break;
2097 }
2098 return;
2099 }
2100
2101 /****************************************************************************/
2102 /* QLogic ISP2x00 Hardware Support Functions. */
2103 /****************************************************************************/
2104
2105 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)2106 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2107 {
2108 int rval = QLA_SUCCESS;
2109 struct qla_hw_data *ha = vha->hw;
2110 uint32_t idc_major_ver, idc_minor_ver;
2111 uint16_t config[4];
2112
2113 qla83xx_idc_lock(vha, 0);
2114
2115 /* SV: TODO: Assign initialization timeout from
2116 * flash-info / other param
2117 */
2118 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2119 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2120
2121 /* Set our fcoe function presence */
2122 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2123 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2124 "Error while setting DRV-Presence.\n");
2125 rval = QLA_FUNCTION_FAILED;
2126 goto exit;
2127 }
2128
2129 /* Decide the reset ownership */
2130 qla83xx_reset_ownership(vha);
2131
2132 /*
2133 * On first protocol driver load:
2134 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2135 * register.
2136 * Others: Check compatibility with current IDC Major version.
2137 */
2138 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2139 if (ha->flags.nic_core_reset_owner) {
2140 /* Set IDC Major version */
2141 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2142 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2143
2144 /* Clearing IDC-Lock-Recovery register */
2145 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2146 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2147 /*
2148 * Clear further IDC participation if we are not compatible with
2149 * the current IDC Major Version.
2150 */
2151 ql_log(ql_log_warn, vha, 0xb07d,
2152 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2153 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2154 __qla83xx_clear_drv_presence(vha);
2155 rval = QLA_FUNCTION_FAILED;
2156 goto exit;
2157 }
2158 /* Each function sets its supported Minor version. */
2159 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2160 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2161 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2162
2163 if (ha->flags.nic_core_reset_owner) {
2164 memset(config, 0, sizeof(config));
2165 if (!qla81xx_get_port_config(vha, config))
2166 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2167 QLA8XXX_DEV_READY);
2168 }
2169
2170 rval = qla83xx_idc_state_handler(vha);
2171
2172 exit:
2173 qla83xx_idc_unlock(vha, 0);
2174
2175 return rval;
2176 }
2177
2178 /*
2179 * qla2x00_initialize_adapter
2180 * Initialize board.
2181 *
2182 * Input:
2183 * ha = adapter block pointer.
2184 *
2185 * Returns:
2186 * 0 = success
2187 */
2188 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)2189 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2190 {
2191 int rval;
2192 struct qla_hw_data *ha = vha->hw;
2193 struct req_que *req = ha->req_q_map[0];
2194 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2195
2196 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2197 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2198
2199 /* Clear adapter flags. */
2200 vha->flags.online = 0;
2201 ha->flags.chip_reset_done = 0;
2202 vha->flags.reset_active = 0;
2203 ha->flags.pci_channel_io_perm_failure = 0;
2204 ha->flags.eeh_busy = 0;
2205 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2206 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2207 atomic_set(&vha->loop_state, LOOP_DOWN);
2208 vha->device_flags = DFLG_NO_CABLE;
2209 vha->dpc_flags = 0;
2210 vha->flags.management_server_logged_in = 0;
2211 vha->marker_needed = 0;
2212 ha->isp_abort_cnt = 0;
2213 ha->beacon_blink_led = 0;
2214
2215 set_bit(0, ha->req_qid_map);
2216 set_bit(0, ha->rsp_qid_map);
2217
2218 ql_dbg(ql_dbg_init, vha, 0x0040,
2219 "Configuring PCI space...\n");
2220 rval = ha->isp_ops->pci_config(vha);
2221 if (rval) {
2222 ql_log(ql_log_warn, vha, 0x0044,
2223 "Unable to configure PCI space.\n");
2224 return (rval);
2225 }
2226
2227 ha->isp_ops->reset_chip(vha);
2228
2229 /* Check for secure flash support */
2230 if (IS_QLA28XX(ha)) {
2231 if (rd_reg_word(®->mailbox12) & BIT_0)
2232 ha->flags.secure_adapter = 1;
2233 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
2234 (ha->flags.secure_adapter) ? "Yes" : "No");
2235 }
2236
2237
2238 rval = qla2xxx_get_flash_info(vha);
2239 if (rval) {
2240 ql_log(ql_log_fatal, vha, 0x004f,
2241 "Unable to validate FLASH data.\n");
2242 return rval;
2243 }
2244
2245 if (IS_QLA8044(ha)) {
2246 qla8044_read_reset_template(vha);
2247
2248 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2249 * If DONRESET_BIT0 is set, drivers should not set dev_state
2250 * to NEED_RESET. But if NEED_RESET is set, drivers should
2251 * should honor the reset. */
2252 if (ql2xdontresethba == 1)
2253 qla8044_set_idc_dontreset(vha);
2254 }
2255
2256 ha->isp_ops->get_flash_version(vha, req->ring);
2257 ql_dbg(ql_dbg_init, vha, 0x0061,
2258 "Configure NVRAM parameters...\n");
2259
2260 /* Let priority default to FCP, can be overridden by nvram_config */
2261 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2262
2263 ha->isp_ops->nvram_config(vha);
2264
2265 if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2266 ha->fc4_type_priority != FC4_PRIORITY_NVME)
2267 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2268
2269 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2270 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2271
2272 if (ha->flags.disable_serdes) {
2273 /* Mask HBA via NVRAM settings? */
2274 ql_log(ql_log_info, vha, 0x0077,
2275 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2276 return QLA_FUNCTION_FAILED;
2277 }
2278
2279 ql_dbg(ql_dbg_init, vha, 0x0078,
2280 "Verifying loaded RISC code...\n");
2281
2282 /* If smartsan enabled then require fdmi and rdp enabled */
2283 if (ql2xsmartsan) {
2284 ql2xfdmienable = 1;
2285 ql2xrdpenable = 1;
2286 }
2287
2288 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2289 rval = ha->isp_ops->chip_diag(vha);
2290 if (rval)
2291 return (rval);
2292 rval = qla2x00_setup_chip(vha);
2293 if (rval)
2294 return (rval);
2295 }
2296
2297 if (IS_QLA84XX(ha)) {
2298 ha->cs84xx = qla84xx_get_chip(vha);
2299 if (!ha->cs84xx) {
2300 ql_log(ql_log_warn, vha, 0x00d0,
2301 "Unable to configure ISP84XX.\n");
2302 return QLA_FUNCTION_FAILED;
2303 }
2304 }
2305
2306 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2307 rval = qla2x00_init_rings(vha);
2308
2309 /* No point in continuing if firmware initialization failed. */
2310 if (rval != QLA_SUCCESS)
2311 return rval;
2312
2313 ha->flags.chip_reset_done = 1;
2314
2315 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2316 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2317 rval = qla84xx_init_chip(vha);
2318 if (rval != QLA_SUCCESS) {
2319 ql_log(ql_log_warn, vha, 0x00d4,
2320 "Unable to initialize ISP84XX.\n");
2321 qla84xx_put_chip(vha);
2322 }
2323 }
2324
2325 /* Load the NIC Core f/w if we are the first protocol driver. */
2326 if (IS_QLA8031(ha)) {
2327 rval = qla83xx_nic_core_fw_load(vha);
2328 if (rval)
2329 ql_log(ql_log_warn, vha, 0x0124,
2330 "Error in initializing NIC Core f/w.\n");
2331 }
2332
2333 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2334 qla24xx_read_fcp_prio_cfg(vha);
2335
2336 if (IS_P3P_TYPE(ha))
2337 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2338 else
2339 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2340
2341 return (rval);
2342 }
2343
2344 /**
2345 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2346 * @vha: HA context
2347 *
2348 * Returns 0 on success.
2349 */
2350 int
qla2100_pci_config(scsi_qla_host_t * vha)2351 qla2100_pci_config(scsi_qla_host_t *vha)
2352 {
2353 uint16_t w;
2354 unsigned long flags;
2355 struct qla_hw_data *ha = vha->hw;
2356 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2357
2358 pci_set_master(ha->pdev);
2359 pci_try_set_mwi(ha->pdev);
2360
2361 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2362 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2363 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2364
2365 pci_disable_rom(ha->pdev);
2366
2367 /* Get PCI bus information. */
2368 spin_lock_irqsave(&ha->hardware_lock, flags);
2369 ha->pci_attr = rd_reg_word(®->ctrl_status);
2370 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2371
2372 return QLA_SUCCESS;
2373 }
2374
2375 /**
2376 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2377 * @vha: HA context
2378 *
2379 * Returns 0 on success.
2380 */
2381 int
qla2300_pci_config(scsi_qla_host_t * vha)2382 qla2300_pci_config(scsi_qla_host_t *vha)
2383 {
2384 uint16_t w;
2385 unsigned long flags = 0;
2386 uint32_t cnt;
2387 struct qla_hw_data *ha = vha->hw;
2388 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2389
2390 pci_set_master(ha->pdev);
2391 pci_try_set_mwi(ha->pdev);
2392
2393 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2394 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2395
2396 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2397 w &= ~PCI_COMMAND_INTX_DISABLE;
2398 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2399
2400 /*
2401 * If this is a 2300 card and not 2312, reset the
2402 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2403 * the 2310 also reports itself as a 2300 so we need to get the
2404 * fb revision level -- a 6 indicates it really is a 2300 and
2405 * not a 2310.
2406 */
2407 if (IS_QLA2300(ha)) {
2408 spin_lock_irqsave(&ha->hardware_lock, flags);
2409
2410 /* Pause RISC. */
2411 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2412 for (cnt = 0; cnt < 30000; cnt++) {
2413 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0)
2414 break;
2415
2416 udelay(10);
2417 }
2418
2419 /* Select FPM registers. */
2420 wrt_reg_word(®->ctrl_status, 0x20);
2421 rd_reg_word(®->ctrl_status);
2422
2423 /* Get the fb rev level */
2424 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2425
2426 if (ha->fb_rev == FPM_2300)
2427 pci_clear_mwi(ha->pdev);
2428
2429 /* Deselect FPM registers. */
2430 wrt_reg_word(®->ctrl_status, 0x0);
2431 rd_reg_word(®->ctrl_status);
2432
2433 /* Release RISC module. */
2434 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2435 for (cnt = 0; cnt < 30000; cnt++) {
2436 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0)
2437 break;
2438
2439 udelay(10);
2440 }
2441
2442 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2443 }
2444
2445 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2446
2447 pci_disable_rom(ha->pdev);
2448
2449 /* Get PCI bus information. */
2450 spin_lock_irqsave(&ha->hardware_lock, flags);
2451 ha->pci_attr = rd_reg_word(®->ctrl_status);
2452 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2453
2454 return QLA_SUCCESS;
2455 }
2456
2457 /**
2458 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2459 * @vha: HA context
2460 *
2461 * Returns 0 on success.
2462 */
2463 int
qla24xx_pci_config(scsi_qla_host_t * vha)2464 qla24xx_pci_config(scsi_qla_host_t *vha)
2465 {
2466 uint16_t w;
2467 unsigned long flags = 0;
2468 struct qla_hw_data *ha = vha->hw;
2469 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2470
2471 pci_set_master(ha->pdev);
2472 pci_try_set_mwi(ha->pdev);
2473
2474 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2475 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2476 w &= ~PCI_COMMAND_INTX_DISABLE;
2477 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2478
2479 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2480
2481 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2482 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2483 pcix_set_mmrbc(ha->pdev, 2048);
2484
2485 /* PCIe -- adjust Maximum Read Request Size (2048). */
2486 if (pci_is_pcie(ha->pdev))
2487 pcie_set_readrq(ha->pdev, 4096);
2488
2489 pci_disable_rom(ha->pdev);
2490
2491 ha->chip_revision = ha->pdev->revision;
2492
2493 /* Get PCI bus information. */
2494 spin_lock_irqsave(&ha->hardware_lock, flags);
2495 ha->pci_attr = rd_reg_dword(®->ctrl_status);
2496 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2497
2498 return QLA_SUCCESS;
2499 }
2500
2501 /**
2502 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2503 * @vha: HA context
2504 *
2505 * Returns 0 on success.
2506 */
2507 int
qla25xx_pci_config(scsi_qla_host_t * vha)2508 qla25xx_pci_config(scsi_qla_host_t *vha)
2509 {
2510 uint16_t w;
2511 struct qla_hw_data *ha = vha->hw;
2512
2513 pci_set_master(ha->pdev);
2514 pci_try_set_mwi(ha->pdev);
2515
2516 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2517 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2518 w &= ~PCI_COMMAND_INTX_DISABLE;
2519 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2520
2521 /* PCIe -- adjust Maximum Read Request Size (2048). */
2522 if (pci_is_pcie(ha->pdev))
2523 pcie_set_readrq(ha->pdev, 4096);
2524
2525 pci_disable_rom(ha->pdev);
2526
2527 ha->chip_revision = ha->pdev->revision;
2528
2529 return QLA_SUCCESS;
2530 }
2531
2532 /**
2533 * qla2x00_isp_firmware() - Choose firmware image.
2534 * @vha: HA context
2535 *
2536 * Returns 0 on success.
2537 */
2538 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)2539 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2540 {
2541 int rval;
2542 uint16_t loop_id, topo, sw_cap;
2543 uint8_t domain, area, al_pa;
2544 struct qla_hw_data *ha = vha->hw;
2545
2546 /* Assume loading risc code */
2547 rval = QLA_FUNCTION_FAILED;
2548
2549 if (ha->flags.disable_risc_code_load) {
2550 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2551
2552 /* Verify checksum of loaded RISC code. */
2553 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2554 if (rval == QLA_SUCCESS) {
2555 /* And, verify we are not in ROM code. */
2556 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2557 &area, &domain, &topo, &sw_cap);
2558 }
2559 }
2560
2561 if (rval)
2562 ql_dbg(ql_dbg_init, vha, 0x007a,
2563 "**** Load RISC code ****.\n");
2564
2565 return (rval);
2566 }
2567
2568 /**
2569 * qla2x00_reset_chip() - Reset ISP chip.
2570 * @vha: HA context
2571 *
2572 * Returns 0 on success.
2573 */
2574 int
qla2x00_reset_chip(scsi_qla_host_t * vha)2575 qla2x00_reset_chip(scsi_qla_host_t *vha)
2576 {
2577 unsigned long flags = 0;
2578 struct qla_hw_data *ha = vha->hw;
2579 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2580 uint32_t cnt;
2581 uint16_t cmd;
2582 int rval = QLA_FUNCTION_FAILED;
2583
2584 if (unlikely(pci_channel_offline(ha->pdev)))
2585 return rval;
2586
2587 ha->isp_ops->disable_intrs(ha);
2588
2589 spin_lock_irqsave(&ha->hardware_lock, flags);
2590
2591 /* Turn off master enable */
2592 cmd = 0;
2593 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2594 cmd &= ~PCI_COMMAND_MASTER;
2595 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2596
2597 if (!IS_QLA2100(ha)) {
2598 /* Pause RISC. */
2599 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2600 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2601 for (cnt = 0; cnt < 30000; cnt++) {
2602 if ((rd_reg_word(®->hccr) &
2603 HCCR_RISC_PAUSE) != 0)
2604 break;
2605 udelay(100);
2606 }
2607 } else {
2608 rd_reg_word(®->hccr); /* PCI Posting. */
2609 udelay(10);
2610 }
2611
2612 /* Select FPM registers. */
2613 wrt_reg_word(®->ctrl_status, 0x20);
2614 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2615
2616 /* FPM Soft Reset. */
2617 wrt_reg_word(®->fpm_diag_config, 0x100);
2618 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
2619
2620 /* Toggle Fpm Reset. */
2621 if (!IS_QLA2200(ha)) {
2622 wrt_reg_word(®->fpm_diag_config, 0x0);
2623 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
2624 }
2625
2626 /* Select frame buffer registers. */
2627 wrt_reg_word(®->ctrl_status, 0x10);
2628 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2629
2630 /* Reset frame buffer FIFOs. */
2631 if (IS_QLA2200(ha)) {
2632 WRT_FB_CMD_REG(ha, reg, 0xa000);
2633 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2634 } else {
2635 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2636
2637 /* Read back fb_cmd until zero or 3 seconds max */
2638 for (cnt = 0; cnt < 3000; cnt++) {
2639 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2640 break;
2641 udelay(100);
2642 }
2643 }
2644
2645 /* Select RISC module registers. */
2646 wrt_reg_word(®->ctrl_status, 0);
2647 rd_reg_word(®->ctrl_status); /* PCI Posting. */
2648
2649 /* Reset RISC processor. */
2650 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
2651 rd_reg_word(®->hccr); /* PCI Posting. */
2652
2653 /* Release RISC processor. */
2654 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2655 rd_reg_word(®->hccr); /* PCI Posting. */
2656 }
2657
2658 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
2659 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT);
2660
2661 /* Reset ISP chip. */
2662 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
2663
2664 /* Wait for RISC to recover from reset. */
2665 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2666 /*
2667 * It is necessary to for a delay here since the card doesn't
2668 * respond to PCI reads during a reset. On some architectures
2669 * this will result in an MCA.
2670 */
2671 udelay(20);
2672 for (cnt = 30000; cnt; cnt--) {
2673 if ((rd_reg_word(®->ctrl_status) &
2674 CSR_ISP_SOFT_RESET) == 0)
2675 break;
2676 udelay(100);
2677 }
2678 } else
2679 udelay(10);
2680
2681 /* Reset RISC processor. */
2682 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
2683
2684 wrt_reg_word(®->semaphore, 0);
2685
2686 /* Release RISC processor. */
2687 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2688 rd_reg_word(®->hccr); /* PCI Posting. */
2689
2690 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2691 for (cnt = 0; cnt < 30000; cnt++) {
2692 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2693 break;
2694
2695 udelay(100);
2696 }
2697 } else
2698 udelay(100);
2699
2700 /* Turn on master enable */
2701 cmd |= PCI_COMMAND_MASTER;
2702 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2703
2704 /* Disable RISC pause on FPM parity error. */
2705 if (!IS_QLA2100(ha)) {
2706 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
2707 rd_reg_word(®->hccr); /* PCI Posting. */
2708 }
2709
2710 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2711
2712 return QLA_SUCCESS;
2713 }
2714
2715 /**
2716 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2717 * @vha: HA context
2718 *
2719 * Returns 0 on success.
2720 */
2721 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)2722 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2723 {
2724 uint16_t mb[4] = {0x1010, 0, 1, 0};
2725
2726 if (!IS_QLA81XX(vha->hw))
2727 return QLA_SUCCESS;
2728
2729 return qla81xx_write_mpi_register(vha, mb);
2730 }
2731
2732 /**
2733 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2734 * @vha: HA context
2735 *
2736 * Returns 0 on success.
2737 */
2738 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)2739 qla24xx_reset_risc(scsi_qla_host_t *vha)
2740 {
2741 unsigned long flags = 0;
2742 struct qla_hw_data *ha = vha->hw;
2743 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2744 uint32_t cnt;
2745 uint16_t wd;
2746 static int abts_cnt; /* ISP abort retry counts */
2747 int rval = QLA_SUCCESS;
2748
2749 spin_lock_irqsave(&ha->hardware_lock, flags);
2750
2751 /* Reset RISC. */
2752 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2753 for (cnt = 0; cnt < 30000; cnt++) {
2754 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2755 break;
2756
2757 udelay(10);
2758 }
2759
2760 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE))
2761 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2762
2763 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2764 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2765 rd_reg_dword(®->hccr),
2766 rd_reg_dword(®->ctrl_status),
2767 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE));
2768
2769 wrt_reg_dword(®->ctrl_status,
2770 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2771 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2772
2773 udelay(100);
2774
2775 /* Wait for firmware to complete NVRAM accesses. */
2776 rd_reg_word(®->mailbox0);
2777 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 &&
2778 rval == QLA_SUCCESS; cnt--) {
2779 barrier();
2780 if (cnt)
2781 udelay(5);
2782 else
2783 rval = QLA_FUNCTION_TIMEOUT;
2784 }
2785
2786 if (rval == QLA_SUCCESS)
2787 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2788
2789 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2790 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2791 rd_reg_dword(®->hccr),
2792 rd_reg_word(®->mailbox0));
2793
2794 /* Wait for soft-reset to complete. */
2795 rd_reg_dword(®->ctrl_status);
2796 for (cnt = 0; cnt < 60; cnt++) {
2797 barrier();
2798 if ((rd_reg_dword(®->ctrl_status) &
2799 CSRX_ISP_SOFT_RESET) == 0)
2800 break;
2801
2802 udelay(5);
2803 }
2804 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
2805 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2806
2807 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2808 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2809 rd_reg_dword(®->hccr),
2810 rd_reg_dword(®->ctrl_status));
2811
2812 /* If required, do an MPI FW reset now */
2813 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2814 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2815 if (++abts_cnt < 5) {
2816 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2817 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2818 } else {
2819 /*
2820 * We exhausted the ISP abort retries. We have to
2821 * set the board offline.
2822 */
2823 abts_cnt = 0;
2824 vha->flags.online = 0;
2825 }
2826 }
2827 }
2828
2829 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
2830 rd_reg_dword(®->hccr);
2831
2832 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
2833 rd_reg_dword(®->hccr);
2834
2835 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET);
2836 rd_reg_dword(®->hccr);
2837
2838 rd_reg_word(®->mailbox0);
2839 for (cnt = 60; rd_reg_word(®->mailbox0) != 0 &&
2840 rval == QLA_SUCCESS; cnt--) {
2841 barrier();
2842 if (cnt)
2843 udelay(5);
2844 else
2845 rval = QLA_FUNCTION_TIMEOUT;
2846 }
2847 if (rval == QLA_SUCCESS)
2848 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2849
2850 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2851 "Host Risc 0x%x, mailbox0 0x%x\n",
2852 rd_reg_dword(®->hccr),
2853 rd_reg_word(®->mailbox0));
2854
2855 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2856
2857 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2858 "Driver in %s mode\n",
2859 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2860
2861 if (IS_NOPOLLING_TYPE(ha))
2862 ha->isp_ops->enable_intrs(ha);
2863
2864 return rval;
2865 }
2866
2867 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)2868 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2869 {
2870 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2871
2872 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2873 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
2874 }
2875
2876 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)2877 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2878 {
2879 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2880
2881 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2882 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
2883 }
2884
2885 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)2886 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2887 {
2888 uint32_t wd32 = 0;
2889 uint delta_msec = 100;
2890 uint elapsed_msec = 0;
2891 uint timeout_msec;
2892 ulong n;
2893
2894 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2895 vha->hw->pdev->subsystem_device != 0x0240)
2896 return;
2897
2898 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2899 udelay(100);
2900
2901 attempt:
2902 timeout_msec = TIMEOUT_SEMAPHORE;
2903 n = timeout_msec / delta_msec;
2904 while (n--) {
2905 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2906 qla25xx_read_risc_sema_reg(vha, &wd32);
2907 if (wd32 & RISC_SEMAPHORE)
2908 break;
2909 msleep(delta_msec);
2910 elapsed_msec += delta_msec;
2911 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2912 goto force;
2913 }
2914
2915 if (!(wd32 & RISC_SEMAPHORE))
2916 goto force;
2917
2918 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2919 goto acquired;
2920
2921 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2922 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2923 n = timeout_msec / delta_msec;
2924 while (n--) {
2925 qla25xx_read_risc_sema_reg(vha, &wd32);
2926 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2927 break;
2928 msleep(delta_msec);
2929 elapsed_msec += delta_msec;
2930 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2931 goto force;
2932 }
2933
2934 if (wd32 & RISC_SEMAPHORE_FORCE)
2935 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2936
2937 goto attempt;
2938
2939 force:
2940 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2941
2942 acquired:
2943 return;
2944 }
2945
2946 /**
2947 * qla24xx_reset_chip() - Reset ISP24xx chip.
2948 * @vha: HA context
2949 *
2950 * Returns 0 on success.
2951 */
2952 int
qla24xx_reset_chip(scsi_qla_host_t * vha)2953 qla24xx_reset_chip(scsi_qla_host_t *vha)
2954 {
2955 struct qla_hw_data *ha = vha->hw;
2956 int rval = QLA_FUNCTION_FAILED;
2957
2958 if (pci_channel_offline(ha->pdev) &&
2959 ha->flags.pci_channel_io_perm_failure) {
2960 return rval;
2961 }
2962
2963 ha->isp_ops->disable_intrs(ha);
2964
2965 qla25xx_manipulate_risc_semaphore(vha);
2966
2967 /* Perform RISC reset. */
2968 rval = qla24xx_reset_risc(vha);
2969
2970 return rval;
2971 }
2972
2973 /**
2974 * qla2x00_chip_diag() - Test chip for proper operation.
2975 * @vha: HA context
2976 *
2977 * Returns 0 on success.
2978 */
2979 int
qla2x00_chip_diag(scsi_qla_host_t * vha)2980 qla2x00_chip_diag(scsi_qla_host_t *vha)
2981 {
2982 int rval;
2983 struct qla_hw_data *ha = vha->hw;
2984 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2985 unsigned long flags = 0;
2986 uint16_t data;
2987 uint32_t cnt;
2988 uint16_t mb[5];
2989 struct req_que *req = ha->req_q_map[0];
2990
2991 /* Assume a failed state */
2992 rval = QLA_FUNCTION_FAILED;
2993
2994 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2995 ®->flash_address);
2996
2997 spin_lock_irqsave(&ha->hardware_lock, flags);
2998
2999 /* Reset ISP chip. */
3000 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
3001
3002 /*
3003 * We need to have a delay here since the card will not respond while
3004 * in reset causing an MCA on some architectures.
3005 */
3006 udelay(20);
3007 data = qla2x00_debounce_register(®->ctrl_status);
3008 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3009 udelay(5);
3010 data = rd_reg_word(®->ctrl_status);
3011 barrier();
3012 }
3013
3014 if (!cnt)
3015 goto chip_diag_failed;
3016
3017 ql_dbg(ql_dbg_init, vha, 0x007c,
3018 "Reset register cleared by chip reset.\n");
3019
3020 /* Reset RISC processor. */
3021 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3022 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3023
3024 /* Workaround for QLA2312 PCI parity error */
3025 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3026 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3027 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3028 udelay(5);
3029 data = RD_MAILBOX_REG(ha, reg, 0);
3030 barrier();
3031 }
3032 } else
3033 udelay(10);
3034
3035 if (!cnt)
3036 goto chip_diag_failed;
3037
3038 /* Check product ID of chip */
3039 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3040
3041 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3042 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3043 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3044 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3045 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3046 mb[3] != PROD_ID_3) {
3047 ql_log(ql_log_warn, vha, 0x0062,
3048 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3049 mb[1], mb[2], mb[3]);
3050
3051 goto chip_diag_failed;
3052 }
3053 ha->product_id[0] = mb[1];
3054 ha->product_id[1] = mb[2];
3055 ha->product_id[2] = mb[3];
3056 ha->product_id[3] = mb[4];
3057
3058 /* Adjust fw RISC transfer size */
3059 if (req->length > 1024)
3060 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3061 else
3062 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3063 req->length;
3064
3065 if (IS_QLA2200(ha) &&
3066 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3067 /* Limit firmware transfer size with a 2200A */
3068 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3069
3070 ha->device_type |= DT_ISP2200A;
3071 ha->fw_transfer_size = 128;
3072 }
3073
3074 /* Wrap Incoming Mailboxes Test. */
3075 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3076
3077 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3078 rval = qla2x00_mbx_reg_test(vha);
3079 if (rval)
3080 ql_log(ql_log_warn, vha, 0x0080,
3081 "Failed mailbox send register test.\n");
3082 else
3083 /* Flag a successful rval */
3084 rval = QLA_SUCCESS;
3085 spin_lock_irqsave(&ha->hardware_lock, flags);
3086
3087 chip_diag_failed:
3088 if (rval)
3089 ql_log(ql_log_info, vha, 0x0081,
3090 "Chip diagnostics **** FAILED ****.\n");
3091
3092 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3093
3094 return (rval);
3095 }
3096
3097 /**
3098 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3099 * @vha: HA context
3100 *
3101 * Returns 0 on success.
3102 */
3103 int
qla24xx_chip_diag(scsi_qla_host_t * vha)3104 qla24xx_chip_diag(scsi_qla_host_t *vha)
3105 {
3106 int rval;
3107 struct qla_hw_data *ha = vha->hw;
3108 struct req_que *req = ha->req_q_map[0];
3109
3110 if (IS_P3P_TYPE(ha))
3111 return QLA_SUCCESS;
3112
3113 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3114
3115 rval = qla2x00_mbx_reg_test(vha);
3116 if (rval) {
3117 ql_log(ql_log_warn, vha, 0x0082,
3118 "Failed mailbox send register test.\n");
3119 } else {
3120 /* Flag a successful rval */
3121 rval = QLA_SUCCESS;
3122 }
3123
3124 return rval;
3125 }
3126
3127 static void
qla2x00_init_fce_trace(scsi_qla_host_t * vha)3128 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3129 {
3130 int rval;
3131 dma_addr_t tc_dma;
3132 void *tc;
3133 struct qla_hw_data *ha = vha->hw;
3134
3135 if (!IS_FWI2_CAPABLE(ha))
3136 return;
3137
3138 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3139 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3140 return;
3141
3142 if (ha->fce) {
3143 ql_dbg(ql_dbg_init, vha, 0x00bd,
3144 "%s: FCE Mem is already allocated.\n",
3145 __func__);
3146 return;
3147 }
3148
3149 /* Allocate memory for Fibre Channel Event Buffer. */
3150 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3151 GFP_KERNEL);
3152 if (!tc) {
3153 ql_log(ql_log_warn, vha, 0x00be,
3154 "Unable to allocate (%d KB) for FCE.\n",
3155 FCE_SIZE / 1024);
3156 return;
3157 }
3158
3159 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3160 ha->fce_mb, &ha->fce_bufs);
3161 if (rval) {
3162 ql_log(ql_log_warn, vha, 0x00bf,
3163 "Unable to initialize FCE (%d).\n", rval);
3164 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3165 return;
3166 }
3167
3168 ql_dbg(ql_dbg_init, vha, 0x00c0,
3169 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3170
3171 ha->flags.fce_enabled = 1;
3172 ha->fce_dma = tc_dma;
3173 ha->fce = tc;
3174 }
3175
3176 static void
qla2x00_init_eft_trace(scsi_qla_host_t * vha)3177 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3178 {
3179 int rval;
3180 dma_addr_t tc_dma;
3181 void *tc;
3182 struct qla_hw_data *ha = vha->hw;
3183
3184 if (!IS_FWI2_CAPABLE(ha))
3185 return;
3186
3187 if (ha->eft) {
3188 ql_dbg(ql_dbg_init, vha, 0x00bd,
3189 "%s: EFT Mem is already allocated.\n",
3190 __func__);
3191 return;
3192 }
3193
3194 /* Allocate memory for Extended Trace Buffer. */
3195 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3196 GFP_KERNEL);
3197 if (!tc) {
3198 ql_log(ql_log_warn, vha, 0x00c1,
3199 "Unable to allocate (%d KB) for EFT.\n",
3200 EFT_SIZE / 1024);
3201 return;
3202 }
3203
3204 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3205 if (rval) {
3206 ql_log(ql_log_warn, vha, 0x00c2,
3207 "Unable to initialize EFT (%d).\n", rval);
3208 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3209 return;
3210 }
3211
3212 ql_dbg(ql_dbg_init, vha, 0x00c3,
3213 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3214
3215 ha->eft_dma = tc_dma;
3216 ha->eft = tc;
3217 }
3218
3219 static void
qla2x00_alloc_offload_mem(scsi_qla_host_t * vha)3220 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3221 {
3222 qla2x00_init_fce_trace(vha);
3223 qla2x00_init_eft_trace(vha);
3224 }
3225
3226 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)3227 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3228 {
3229 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3230 eft_size, fce_size, mq_size;
3231 struct qla_hw_data *ha = vha->hw;
3232 struct req_que *req = ha->req_q_map[0];
3233 struct rsp_que *rsp = ha->rsp_q_map[0];
3234 struct qla2xxx_fw_dump *fw_dump;
3235
3236 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3237 req_q_size = rsp_q_size = 0;
3238
3239 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3240 fixed_size = sizeof(struct qla2100_fw_dump);
3241 } else if (IS_QLA23XX(ha)) {
3242 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3243 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3244 sizeof(uint16_t);
3245 } else if (IS_FWI2_CAPABLE(ha)) {
3246 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
3247 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3248 else if (IS_QLA81XX(ha))
3249 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3250 else if (IS_QLA25XX(ha))
3251 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3252 else
3253 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3254
3255 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3256 sizeof(uint32_t);
3257 if (ha->mqenable) {
3258 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) &&
3259 !IS_QLA28XX(ha))
3260 mq_size = sizeof(struct qla2xxx_mq_chain);
3261 /*
3262 * Allocate maximum buffer size for all queues - Q0.
3263 * Resizing must be done at end-of-dump processing.
3264 */
3265 mq_size += (ha->max_req_queues - 1) *
3266 (req->length * sizeof(request_t));
3267 mq_size += (ha->max_rsp_queues - 1) *
3268 (rsp->length * sizeof(response_t));
3269 }
3270 if (ha->tgt.atio_ring)
3271 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3272
3273 qla2x00_init_fce_trace(vha);
3274 if (ha->fce)
3275 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3276 qla2x00_init_eft_trace(vha);
3277 if (ha->eft)
3278 eft_size = EFT_SIZE;
3279 }
3280
3281 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3282 struct fwdt *fwdt = ha->fwdt;
3283 uint j;
3284
3285 for (j = 0; j < 2; j++, fwdt++) {
3286 if (!fwdt->template) {
3287 ql_dbg(ql_dbg_init, vha, 0x00ba,
3288 "-> fwdt%u no template\n", j);
3289 continue;
3290 }
3291 ql_dbg(ql_dbg_init, vha, 0x00fa,
3292 "-> fwdt%u calculating fwdump size...\n", j);
3293 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3294 vha, fwdt->template);
3295 ql_dbg(ql_dbg_init, vha, 0x00fa,
3296 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3297 j, fwdt->dump_size);
3298 dump_size += fwdt->dump_size;
3299 }
3300 /* Add space for spare MPI fw dump. */
3301 dump_size += ha->fwdt[1].dump_size;
3302 } else {
3303 req_q_size = req->length * sizeof(request_t);
3304 rsp_q_size = rsp->length * sizeof(response_t);
3305 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3306 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3307 + eft_size;
3308 ha->chain_offset = dump_size;
3309 dump_size += mq_size + fce_size;
3310 if (ha->exchoffld_buf)
3311 dump_size += sizeof(struct qla2xxx_offld_chain) +
3312 ha->exchoffld_size;
3313 if (ha->exlogin_buf)
3314 dump_size += sizeof(struct qla2xxx_offld_chain) +
3315 ha->exlogin_size;
3316 }
3317
3318 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3319
3320 ql_dbg(ql_dbg_init, vha, 0x00c5,
3321 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3322 __func__, dump_size, ha->fw_dump_len,
3323 ha->fw_dump_alloc_len);
3324
3325 fw_dump = vmalloc(dump_size);
3326 if (!fw_dump) {
3327 ql_log(ql_log_warn, vha, 0x00c4,
3328 "Unable to allocate (%d KB) for firmware dump.\n",
3329 dump_size / 1024);
3330 } else {
3331 mutex_lock(&ha->optrom_mutex);
3332 if (ha->fw_dumped) {
3333 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3334 vfree(ha->fw_dump);
3335 ha->fw_dump = fw_dump;
3336 ha->fw_dump_alloc_len = dump_size;
3337 ql_dbg(ql_dbg_init, vha, 0x00c5,
3338 "Re-Allocated (%d KB) and save firmware dump.\n",
3339 dump_size / 1024);
3340 } else {
3341 if (ha->fw_dump)
3342 vfree(ha->fw_dump);
3343 ha->fw_dump = fw_dump;
3344
3345 ha->fw_dump_len = ha->fw_dump_alloc_len =
3346 dump_size;
3347 ql_dbg(ql_dbg_init, vha, 0x00c5,
3348 "Allocated (%d KB) for firmware dump.\n",
3349 dump_size / 1024);
3350
3351 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3352 ha->mpi_fw_dump = (char *)fw_dump +
3353 ha->fwdt[1].dump_size;
3354 mutex_unlock(&ha->optrom_mutex);
3355 return;
3356 }
3357
3358 ha->fw_dump->signature[0] = 'Q';
3359 ha->fw_dump->signature[1] = 'L';
3360 ha->fw_dump->signature[2] = 'G';
3361 ha->fw_dump->signature[3] = 'C';
3362 ha->fw_dump->version = htonl(1);
3363
3364 ha->fw_dump->fixed_size = htonl(fixed_size);
3365 ha->fw_dump->mem_size = htonl(mem_size);
3366 ha->fw_dump->req_q_size = htonl(req_q_size);
3367 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3368
3369 ha->fw_dump->eft_size = htonl(eft_size);
3370 ha->fw_dump->eft_addr_l =
3371 htonl(LSD(ha->eft_dma));
3372 ha->fw_dump->eft_addr_h =
3373 htonl(MSD(ha->eft_dma));
3374
3375 ha->fw_dump->header_size =
3376 htonl(offsetof
3377 (struct qla2xxx_fw_dump, isp));
3378 }
3379 mutex_unlock(&ha->optrom_mutex);
3380 }
3381 }
3382 }
3383
3384 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)3385 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3386 {
3387 #define MPS_MASK 0xe0
3388 int rval;
3389 uint16_t dc;
3390 uint32_t dw;
3391
3392 if (!IS_QLA81XX(vha->hw))
3393 return QLA_SUCCESS;
3394
3395 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3396 if (rval != QLA_SUCCESS) {
3397 ql_log(ql_log_warn, vha, 0x0105,
3398 "Unable to acquire semaphore.\n");
3399 goto done;
3400 }
3401
3402 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3403 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3404 if (rval != QLA_SUCCESS) {
3405 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3406 goto done_release;
3407 }
3408
3409 dc &= MPS_MASK;
3410 if (dc == (dw & MPS_MASK))
3411 goto done_release;
3412
3413 dw &= ~MPS_MASK;
3414 dw |= dc;
3415 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3416 if (rval != QLA_SUCCESS) {
3417 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3418 }
3419
3420 done_release:
3421 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3422 if (rval != QLA_SUCCESS) {
3423 ql_log(ql_log_warn, vha, 0x006d,
3424 "Unable to release semaphore.\n");
3425 }
3426
3427 done:
3428 return rval;
3429 }
3430
3431 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)3432 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3433 {
3434 /* Don't try to reallocate the array */
3435 if (req->outstanding_cmds)
3436 return QLA_SUCCESS;
3437
3438 if (!IS_FWI2_CAPABLE(ha))
3439 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3440 else {
3441 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3442 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3443 else
3444 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3445 }
3446
3447 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3448 sizeof(srb_t *),
3449 GFP_KERNEL);
3450
3451 if (!req->outstanding_cmds) {
3452 /*
3453 * Try to allocate a minimal size just so we can get through
3454 * initialization.
3455 */
3456 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3457 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3458 sizeof(srb_t *),
3459 GFP_KERNEL);
3460
3461 if (!req->outstanding_cmds) {
3462 ql_log(ql_log_fatal, NULL, 0x0126,
3463 "Failed to allocate memory for "
3464 "outstanding_cmds for req_que %p.\n", req);
3465 req->num_outstanding_cmds = 0;
3466 return QLA_FUNCTION_FAILED;
3467 }
3468 }
3469
3470 return QLA_SUCCESS;
3471 }
3472
3473 #define PRINT_FIELD(_field, _flag, _str) { \
3474 if (a0->_field & _flag) {\
3475 if (p) {\
3476 strcat(ptr, "|");\
3477 ptr++;\
3478 leftover--;\
3479 } \
3480 len = snprintf(ptr, leftover, "%s", _str); \
3481 p = 1;\
3482 leftover -= len;\
3483 ptr += len; \
3484 } \
3485 }
3486
qla2xxx_print_sfp_info(struct scsi_qla_host * vha)3487 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3488 {
3489 #define STR_LEN 64
3490 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3491 u8 str[STR_LEN], *ptr, p;
3492 int leftover, len;
3493
3494 memset(str, 0, STR_LEN);
3495 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3496 ql_dbg(ql_dbg_init, vha, 0x015a,
3497 "SFP MFG Name: %s\n", str);
3498
3499 memset(str, 0, STR_LEN);
3500 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3501 ql_dbg(ql_dbg_init, vha, 0x015c,
3502 "SFP Part Name: %s\n", str);
3503
3504 /* media */
3505 memset(str, 0, STR_LEN);
3506 ptr = str;
3507 leftover = STR_LEN;
3508 p = len = 0;
3509 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3510 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3511 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3512 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3513 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3514 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3515 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3516 ql_dbg(ql_dbg_init, vha, 0x0160,
3517 "SFP Media: %s\n", str);
3518
3519 /* link length */
3520 memset(str, 0, STR_LEN);
3521 ptr = str;
3522 leftover = STR_LEN;
3523 p = len = 0;
3524 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3525 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3526 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3527 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3528 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3529 ql_dbg(ql_dbg_init, vha, 0x0196,
3530 "SFP Link Length: %s\n", str);
3531
3532 memset(str, 0, STR_LEN);
3533 ptr = str;
3534 leftover = STR_LEN;
3535 p = len = 0;
3536 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3537 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3538 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3539 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3540 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3541 ql_dbg(ql_dbg_init, vha, 0x016e,
3542 "SFP FC Link Tech: %s\n", str);
3543
3544 if (a0->length_km)
3545 ql_dbg(ql_dbg_init, vha, 0x016f,
3546 "SFP Distant: %d km\n", a0->length_km);
3547 if (a0->length_100m)
3548 ql_dbg(ql_dbg_init, vha, 0x0170,
3549 "SFP Distant: %d m\n", a0->length_100m*100);
3550 if (a0->length_50um_10m)
3551 ql_dbg(ql_dbg_init, vha, 0x0189,
3552 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3553 if (a0->length_62um_10m)
3554 ql_dbg(ql_dbg_init, vha, 0x018a,
3555 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3556 if (a0->length_om4_10m)
3557 ql_dbg(ql_dbg_init, vha, 0x0194,
3558 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3559 if (a0->length_om3_10m)
3560 ql_dbg(ql_dbg_init, vha, 0x0195,
3561 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3562 }
3563
3564
3565 /**
3566 * qla24xx_detect_sfp()
3567 *
3568 * @vha: adapter state pointer.
3569 *
3570 * @return
3571 * 0 -- Configure firmware to use short-range settings -- normal
3572 * buffer-to-buffer credits.
3573 *
3574 * 1 -- Configure firmware to use long-range settings -- extra
3575 * buffer-to-buffer credits should be allocated with
3576 * ha->lr_distance containing distance settings from NVRAM or SFP
3577 * (if supported).
3578 */
3579 int
qla24xx_detect_sfp(scsi_qla_host_t * vha)3580 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3581 {
3582 int rc, used_nvram;
3583 struct sff_8247_a0 *a;
3584 struct qla_hw_data *ha = vha->hw;
3585 struct nvram_81xx *nv = ha->nvram;
3586 #define LR_DISTANCE_UNKNOWN 2
3587 static const char * const types[] = { "Short", "Long" };
3588 static const char * const lengths[] = { "(10km)", "(5km)", "" };
3589 u8 ll = 0;
3590
3591 /* Seed with NVRAM settings. */
3592 used_nvram = 0;
3593 ha->flags.lr_detected = 0;
3594 if (IS_BPM_RANGE_CAPABLE(ha) &&
3595 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
3596 used_nvram = 1;
3597 ha->flags.lr_detected = 1;
3598 ha->lr_distance =
3599 (nv->enhanced_features >> LR_DIST_NV_POS)
3600 & LR_DIST_NV_MASK;
3601 }
3602
3603 if (!IS_BPM_ENABLED(vha))
3604 goto out;
3605 /* Determine SR/LR capabilities of SFP/Transceiver. */
3606 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3607 if (rc)
3608 goto out;
3609
3610 used_nvram = 0;
3611 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3612 qla2xxx_print_sfp_info(vha);
3613
3614 ha->flags.lr_detected = 0;
3615 ll = a->fc_ll_cc7;
3616 if (ll & FC_LL_VL || ll & FC_LL_L) {
3617 /* Long range, track length. */
3618 ha->flags.lr_detected = 1;
3619
3620 if (a->length_km > 5 || a->length_100m > 50)
3621 ha->lr_distance = LR_DISTANCE_10K;
3622 else
3623 ha->lr_distance = LR_DISTANCE_5K;
3624 }
3625
3626 out:
3627 ql_dbg(ql_dbg_async, vha, 0x507b,
3628 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
3629 types[ha->flags.lr_detected],
3630 ha->flags.lr_detected ? lengths[ha->lr_distance] :
3631 lengths[LR_DISTANCE_UNKNOWN],
3632 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
3633 return ha->flags.lr_detected;
3634 }
3635
qla_init_iocb_limit(scsi_qla_host_t * vha)3636 void qla_init_iocb_limit(scsi_qla_host_t *vha)
3637 {
3638 u16 i, num_qps;
3639 u32 limit;
3640 struct qla_hw_data *ha = vha->hw;
3641
3642 num_qps = ha->num_qpairs + 1;
3643 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
3644
3645 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
3646 ha->base_qpair->fwres.iocbs_limit = limit;
3647 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps;
3648 ha->base_qpair->fwres.iocbs_used = 0;
3649 for (i = 0; i < ha->max_qpairs; i++) {
3650 if (ha->queue_pair_map[i]) {
3651 ha->queue_pair_map[i]->fwres.iocbs_total =
3652 ha->orig_fw_iocb_count;
3653 ha->queue_pair_map[i]->fwres.iocbs_limit = limit;
3654 ha->queue_pair_map[i]->fwres.iocbs_qp_limit =
3655 limit / num_qps;
3656 ha->queue_pair_map[i]->fwres.iocbs_used = 0;
3657 }
3658 }
3659 }
3660
3661 /**
3662 * qla2x00_setup_chip() - Load and start RISC firmware.
3663 * @vha: HA context
3664 *
3665 * Returns 0 on success.
3666 */
3667 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)3668 qla2x00_setup_chip(scsi_qla_host_t *vha)
3669 {
3670 int rval;
3671 uint32_t srisc_address = 0;
3672 struct qla_hw_data *ha = vha->hw;
3673 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3674 unsigned long flags;
3675 uint16_t fw_major_version;
3676 int done_once = 0;
3677
3678 if (IS_P3P_TYPE(ha)) {
3679 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3680 if (rval == QLA_SUCCESS) {
3681 qla2x00_stop_firmware(vha);
3682 goto enable_82xx_npiv;
3683 } else
3684 goto failed;
3685 }
3686
3687 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3688 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3689 spin_lock_irqsave(&ha->hardware_lock, flags);
3690 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
3691 rd_reg_word(®->hccr);
3692 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3693 }
3694
3695 qla81xx_mpi_sync(vha);
3696
3697 execute_fw_with_lr:
3698 /* Load firmware sequences */
3699 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3700 if (rval == QLA_SUCCESS) {
3701 ql_dbg(ql_dbg_init, vha, 0x00c9,
3702 "Verifying Checksum of loaded RISC code.\n");
3703
3704 rval = qla2x00_verify_checksum(vha, srisc_address);
3705 if (rval == QLA_SUCCESS) {
3706 /* Start firmware execution. */
3707 ql_dbg(ql_dbg_init, vha, 0x00ca,
3708 "Starting firmware.\n");
3709
3710 if (ql2xexlogins)
3711 ha->flags.exlogins_enabled = 1;
3712
3713 if (qla_is_exch_offld_enabled(vha))
3714 ha->flags.exchoffld_enabled = 1;
3715
3716 rval = qla2x00_execute_fw(vha, srisc_address);
3717 /* Retrieve firmware information. */
3718 if (rval == QLA_SUCCESS) {
3719 /* Enable BPM support? */
3720 if (!done_once++ && qla24xx_detect_sfp(vha)) {
3721 ql_dbg(ql_dbg_init, vha, 0x00ca,
3722 "Re-starting firmware -- BPM.\n");
3723 /* Best-effort - re-init. */
3724 ha->isp_ops->reset_chip(vha);
3725 ha->isp_ops->chip_diag(vha);
3726 goto execute_fw_with_lr;
3727 }
3728
3729 if (IS_ZIO_THRESHOLD_CAPABLE(ha))
3730 qla27xx_set_zio_threshold(vha,
3731 ha->last_zio_threshold);
3732
3733 rval = qla2x00_set_exlogins_buffer(vha);
3734 if (rval != QLA_SUCCESS)
3735 goto failed;
3736
3737 rval = qla2x00_set_exchoffld_buffer(vha);
3738 if (rval != QLA_SUCCESS)
3739 goto failed;
3740
3741 enable_82xx_npiv:
3742 fw_major_version = ha->fw_major_version;
3743 if (IS_P3P_TYPE(ha))
3744 qla82xx_check_md_needed(vha);
3745 else
3746 rval = qla2x00_get_fw_version(vha);
3747 if (rval != QLA_SUCCESS)
3748 goto failed;
3749 ha->flags.npiv_supported = 0;
3750 if (IS_QLA2XXX_MIDTYPE(ha) &&
3751 (ha->fw_attributes & BIT_2)) {
3752 ha->flags.npiv_supported = 1;
3753 if ((!ha->max_npiv_vports) ||
3754 ((ha->max_npiv_vports + 1) %
3755 MIN_MULTI_ID_FABRIC))
3756 ha->max_npiv_vports =
3757 MIN_MULTI_ID_FABRIC - 1;
3758 }
3759 qla2x00_get_resource_cnts(vha);
3760 qla_init_iocb_limit(vha);
3761
3762 /*
3763 * Allocate the array of outstanding commands
3764 * now that we know the firmware resources.
3765 */
3766 rval = qla2x00_alloc_outstanding_cmds(ha,
3767 vha->req);
3768 if (rval != QLA_SUCCESS)
3769 goto failed;
3770
3771 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3772 qla2x00_alloc_offload_mem(vha);
3773
3774 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3775 qla2x00_alloc_fw_dump(vha);
3776
3777 } else {
3778 goto failed;
3779 }
3780 } else {
3781 ql_log(ql_log_fatal, vha, 0x00cd,
3782 "ISP Firmware failed checksum.\n");
3783 goto failed;
3784 }
3785
3786 /* Enable PUREX PASSTHRU */
3787 if (ql2xrdpenable || ha->flags.scm_supported_f)
3788 qla25xx_set_els_cmds_supported(vha);
3789 } else
3790 goto failed;
3791
3792 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3793 /* Enable proper parity. */
3794 spin_lock_irqsave(&ha->hardware_lock, flags);
3795 if (IS_QLA2300(ha))
3796 /* SRAM parity */
3797 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1);
3798 else
3799 /* SRAM, Instruction RAM and GP RAM parity */
3800 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7);
3801 rd_reg_word(®->hccr);
3802 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3803 }
3804
3805 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
3806 ha->flags.fac_supported = 1;
3807 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3808 uint32_t size;
3809
3810 rval = qla81xx_fac_get_sector_size(vha, &size);
3811 if (rval == QLA_SUCCESS) {
3812 ha->flags.fac_supported = 1;
3813 ha->fdt_block_size = size << 2;
3814 } else {
3815 ql_log(ql_log_warn, vha, 0x00ce,
3816 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3817 ha->fw_major_version, ha->fw_minor_version,
3818 ha->fw_subminor_version);
3819
3820 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3821 IS_QLA28XX(ha)) {
3822 ha->flags.fac_supported = 0;
3823 rval = QLA_SUCCESS;
3824 }
3825 }
3826 }
3827 failed:
3828 if (rval) {
3829 ql_log(ql_log_fatal, vha, 0x00cf,
3830 "Setup chip ****FAILED****.\n");
3831 }
3832
3833 return (rval);
3834 }
3835
3836 /**
3837 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3838 * @rsp: response queue
3839 *
3840 * Beginning of request ring has initialization control block already built
3841 * by nvram config routine.
3842 *
3843 * Returns 0 on success.
3844 */
3845 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)3846 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3847 {
3848 uint16_t cnt;
3849 response_t *pkt;
3850
3851 rsp->ring_ptr = rsp->ring;
3852 rsp->ring_index = 0;
3853 rsp->status_srb = NULL;
3854 pkt = rsp->ring_ptr;
3855 for (cnt = 0; cnt < rsp->length; cnt++) {
3856 pkt->signature = RESPONSE_PROCESSED;
3857 pkt++;
3858 }
3859 }
3860
3861 /**
3862 * qla2x00_update_fw_options() - Read and process firmware options.
3863 * @vha: HA context
3864 *
3865 * Returns 0 on success.
3866 */
3867 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)3868 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3869 {
3870 uint16_t swing, emphasis, tx_sens, rx_sens;
3871 struct qla_hw_data *ha = vha->hw;
3872
3873 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3874 qla2x00_get_fw_options(vha, ha->fw_options);
3875
3876 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3877 return;
3878
3879 /* Serial Link options. */
3880 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3881 "Serial link options.\n");
3882 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3883 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
3884
3885 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3886 if (ha->fw_seriallink_options[3] & BIT_2) {
3887 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3888
3889 /* 1G settings */
3890 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3891 emphasis = (ha->fw_seriallink_options[2] &
3892 (BIT_4 | BIT_3)) >> 3;
3893 tx_sens = ha->fw_seriallink_options[0] &
3894 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3895 rx_sens = (ha->fw_seriallink_options[0] &
3896 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3897 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3898 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3899 if (rx_sens == 0x0)
3900 rx_sens = 0x3;
3901 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3902 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3903 ha->fw_options[10] |= BIT_5 |
3904 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3905 (tx_sens & (BIT_1 | BIT_0));
3906
3907 /* 2G settings */
3908 swing = (ha->fw_seriallink_options[2] &
3909 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3910 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3911 tx_sens = ha->fw_seriallink_options[1] &
3912 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3913 rx_sens = (ha->fw_seriallink_options[1] &
3914 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3915 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3916 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3917 if (rx_sens == 0x0)
3918 rx_sens = 0x3;
3919 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3920 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3921 ha->fw_options[11] |= BIT_5 |
3922 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3923 (tx_sens & (BIT_1 | BIT_0));
3924 }
3925
3926 /* FCP2 options. */
3927 /* Return command IOCBs without waiting for an ABTS to complete. */
3928 ha->fw_options[3] |= BIT_13;
3929
3930 /* LED scheme. */
3931 if (ha->flags.enable_led_scheme)
3932 ha->fw_options[2] |= BIT_12;
3933
3934 /* Detect ISP6312. */
3935 if (IS_QLA6312(ha))
3936 ha->fw_options[2] |= BIT_13;
3937
3938 /* Set Retry FLOGI in case of P2P connection */
3939 if (ha->operating_mode == P2P) {
3940 ha->fw_options[2] |= BIT_3;
3941 ql_dbg(ql_dbg_disc, vha, 0x2100,
3942 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3943 __func__, ha->fw_options[2]);
3944 }
3945
3946 /* Update firmware options. */
3947 qla2x00_set_fw_options(vha, ha->fw_options);
3948 }
3949
3950 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)3951 qla24xx_update_fw_options(scsi_qla_host_t *vha)
3952 {
3953 int rval;
3954 struct qla_hw_data *ha = vha->hw;
3955
3956 if (IS_P3P_TYPE(ha))
3957 return;
3958
3959 /* Hold status IOCBs until ABTS response received. */
3960 if (ql2xfwholdabts)
3961 ha->fw_options[3] |= BIT_12;
3962
3963 /* Set Retry FLOGI in case of P2P connection */
3964 if (ha->operating_mode == P2P) {
3965 ha->fw_options[2] |= BIT_3;
3966 ql_dbg(ql_dbg_disc, vha, 0x2101,
3967 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3968 __func__, ha->fw_options[2]);
3969 }
3970
3971 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3972 if (ql2xmvasynctoatio &&
3973 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
3974 if (qla_tgt_mode_enabled(vha) ||
3975 qla_dual_mode_enabled(vha))
3976 ha->fw_options[2] |= BIT_11;
3977 else
3978 ha->fw_options[2] &= ~BIT_11;
3979 }
3980
3981 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3982 IS_QLA28XX(ha)) {
3983 /*
3984 * Tell FW to track each exchange to prevent
3985 * driver from using stale exchange.
3986 */
3987 if (qla_tgt_mode_enabled(vha) ||
3988 qla_dual_mode_enabled(vha))
3989 ha->fw_options[2] |= BIT_4;
3990 else
3991 ha->fw_options[2] &= ~BIT_4;
3992
3993 /* Reserve 1/2 of emergency exchanges for ELS.*/
3994 if (qla2xuseresexchforels)
3995 ha->fw_options[2] |= BIT_8;
3996 else
3997 ha->fw_options[2] &= ~BIT_8;
3998 }
3999
4000 if (ql2xrdpenable || ha->flags.scm_supported_f)
4001 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4002
4003 /* Enable Async 8130/8131 events -- transceiver insertion/removal */
4004 if (IS_BPM_RANGE_CAPABLE(ha))
4005 ha->fw_options[3] |= BIT_10;
4006
4007 ql_dbg(ql_dbg_init, vha, 0x00e8,
4008 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4009 __func__, ha->fw_options[1], ha->fw_options[2],
4010 ha->fw_options[3], vha->host->active_mode);
4011
4012 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4013 qla2x00_set_fw_options(vha, ha->fw_options);
4014
4015 /* Update Serial Link options. */
4016 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4017 return;
4018
4019 rval = qla2x00_set_serdes_params(vha,
4020 le16_to_cpu(ha->fw_seriallink_options24[1]),
4021 le16_to_cpu(ha->fw_seriallink_options24[2]),
4022 le16_to_cpu(ha->fw_seriallink_options24[3]));
4023 if (rval != QLA_SUCCESS) {
4024 ql_log(ql_log_warn, vha, 0x0104,
4025 "Unable to update Serial Link options (%x).\n", rval);
4026 }
4027 }
4028
4029 void
qla2x00_config_rings(struct scsi_qla_host * vha)4030 qla2x00_config_rings(struct scsi_qla_host *vha)
4031 {
4032 struct qla_hw_data *ha = vha->hw;
4033 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4034 struct req_que *req = ha->req_q_map[0];
4035 struct rsp_que *rsp = ha->rsp_q_map[0];
4036
4037 /* Setup ring parameters in initialization control block. */
4038 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4039 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4040 ha->init_cb->request_q_length = cpu_to_le16(req->length);
4041 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4042 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
4043 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
4044
4045 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
4046 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
4047 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
4048 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
4049 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4050 }
4051
4052 void
qla24xx_config_rings(struct scsi_qla_host * vha)4053 qla24xx_config_rings(struct scsi_qla_host *vha)
4054 {
4055 struct qla_hw_data *ha = vha->hw;
4056 device_reg_t *reg = ISP_QUE_REG(ha, 0);
4057 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4058 struct qla_msix_entry *msix;
4059 struct init_cb_24xx *icb;
4060 uint16_t rid = 0;
4061 struct req_que *req = ha->req_q_map[0];
4062 struct rsp_que *rsp = ha->rsp_q_map[0];
4063
4064 /* Setup ring parameters in initialization control block. */
4065 icb = (struct init_cb_24xx *)ha->init_cb;
4066 icb->request_q_outpointer = cpu_to_le16(0);
4067 icb->response_q_inpointer = cpu_to_le16(0);
4068 icb->request_q_length = cpu_to_le16(req->length);
4069 icb->response_q_length = cpu_to_le16(rsp->length);
4070 put_unaligned_le64(req->dma, &icb->request_q_address);
4071 put_unaligned_le64(rsp->dma, &icb->response_q_address);
4072
4073 /* Setup ATIO queue dma pointers for target mode */
4074 icb->atio_q_inpointer = cpu_to_le16(0);
4075 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4076 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
4077
4078 if (IS_SHADOW_REG_CAPABLE(ha))
4079 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4080
4081 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4082 IS_QLA28XX(ha)) {
4083 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4084 icb->rid = cpu_to_le16(rid);
4085 if (ha->flags.msix_enabled) {
4086 msix = &ha->msix_entries[1];
4087 ql_dbg(ql_dbg_init, vha, 0x0019,
4088 "Registering vector 0x%x for base que.\n",
4089 msix->entry);
4090 icb->msix = cpu_to_le16(msix->entry);
4091 }
4092 /* Use alternate PCI bus number */
4093 if (MSB(rid))
4094 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4095 /* Use alternate PCI devfn */
4096 if (LSB(rid))
4097 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4098
4099 /* Use Disable MSIX Handshake mode for capable adapters */
4100 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4101 (ha->flags.msix_enabled)) {
4102 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4103 ha->flags.disable_msix_handshake = 1;
4104 ql_dbg(ql_dbg_init, vha, 0x00fe,
4105 "MSIX Handshake Disable Mode turned on.\n");
4106 } else {
4107 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4108 }
4109 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4110
4111 wrt_reg_dword(®->isp25mq.req_q_in, 0);
4112 wrt_reg_dword(®->isp25mq.req_q_out, 0);
4113 wrt_reg_dword(®->isp25mq.rsp_q_in, 0);
4114 wrt_reg_dword(®->isp25mq.rsp_q_out, 0);
4115 } else {
4116 wrt_reg_dword(®->isp24.req_q_in, 0);
4117 wrt_reg_dword(®->isp24.req_q_out, 0);
4118 wrt_reg_dword(®->isp24.rsp_q_in, 0);
4119 wrt_reg_dword(®->isp24.rsp_q_out, 0);
4120 }
4121
4122 qlt_24xx_config_rings(vha);
4123
4124 /* If the user has configured the speed, set it here */
4125 if (ha->set_data_rate) {
4126 ql_dbg(ql_dbg_init, vha, 0x00fd,
4127 "Speed set by user : %s Gbps \n",
4128 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4129 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4130 }
4131
4132 /* PCI posting */
4133 rd_reg_word(&ioreg->hccr);
4134 }
4135
4136 /**
4137 * qla2x00_init_rings() - Initializes firmware.
4138 * @vha: HA context
4139 *
4140 * Beginning of request ring has initialization control block already built
4141 * by nvram config routine.
4142 *
4143 * Returns 0 on success.
4144 */
4145 int
qla2x00_init_rings(scsi_qla_host_t * vha)4146 qla2x00_init_rings(scsi_qla_host_t *vha)
4147 {
4148 int rval;
4149 unsigned long flags = 0;
4150 int cnt, que;
4151 struct qla_hw_data *ha = vha->hw;
4152 struct req_que *req;
4153 struct rsp_que *rsp;
4154 struct mid_init_cb_24xx *mid_init_cb =
4155 (struct mid_init_cb_24xx *) ha->init_cb;
4156
4157 spin_lock_irqsave(&ha->hardware_lock, flags);
4158
4159 /* Clear outstanding commands array. */
4160 for (que = 0; que < ha->max_req_queues; que++) {
4161 req = ha->req_q_map[que];
4162 if (!req || !test_bit(que, ha->req_qid_map))
4163 continue;
4164 req->out_ptr = (uint16_t *)(req->ring + req->length);
4165 *req->out_ptr = 0;
4166 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4167 req->outstanding_cmds[cnt] = NULL;
4168
4169 req->current_outstanding_cmd = 1;
4170
4171 /* Initialize firmware. */
4172 req->ring_ptr = req->ring;
4173 req->ring_index = 0;
4174 req->cnt = req->length;
4175 }
4176
4177 for (que = 0; que < ha->max_rsp_queues; que++) {
4178 rsp = ha->rsp_q_map[que];
4179 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4180 continue;
4181 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4182 *rsp->in_ptr = 0;
4183 /* Initialize response queue entries */
4184 if (IS_QLAFX00(ha))
4185 qlafx00_init_response_q_entries(rsp);
4186 else
4187 qla2x00_init_response_q_entries(rsp);
4188 }
4189
4190 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4191 ha->tgt.atio_ring_index = 0;
4192 /* Initialize ATIO queue entries */
4193 qlt_init_atio_q_entries(vha);
4194
4195 ha->isp_ops->config_rings(vha);
4196
4197 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4198
4199 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4200
4201 if (IS_QLAFX00(ha)) {
4202 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4203 goto next_check;
4204 }
4205
4206 /* Update any ISP specific firmware options before initialization. */
4207 ha->isp_ops->update_fw_options(vha);
4208
4209 if (ha->flags.npiv_supported) {
4210 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4211 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4212 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4213 }
4214
4215 if (IS_FWI2_CAPABLE(ha)) {
4216 mid_init_cb->options = cpu_to_le16(BIT_1);
4217 mid_init_cb->init_cb.execution_throttle =
4218 cpu_to_le16(ha->cur_fw_xcb_count);
4219 ha->flags.dport_enabled =
4220 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4221 BIT_7) != 0;
4222 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4223 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4224 /* FA-WWPN Status */
4225 ha->flags.fawwpn_enabled =
4226 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4227 BIT_6) != 0;
4228 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4229 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4230 }
4231
4232 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4233 next_check:
4234 if (rval) {
4235 ql_log(ql_log_fatal, vha, 0x00d2,
4236 "Init Firmware **** FAILED ****.\n");
4237 } else {
4238 ql_dbg(ql_dbg_init, vha, 0x00d3,
4239 "Init Firmware -- success.\n");
4240 QLA_FW_STARTED(ha);
4241 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4242 }
4243
4244 return (rval);
4245 }
4246
4247 /**
4248 * qla2x00_fw_ready() - Waits for firmware ready.
4249 * @vha: HA context
4250 *
4251 * Returns 0 on success.
4252 */
4253 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)4254 qla2x00_fw_ready(scsi_qla_host_t *vha)
4255 {
4256 int rval;
4257 unsigned long wtime, mtime, cs84xx_time;
4258 uint16_t min_wait; /* Minimum wait time if loop is down */
4259 uint16_t wait_time; /* Wait time if loop is coming ready */
4260 uint16_t state[6];
4261 struct qla_hw_data *ha = vha->hw;
4262
4263 if (IS_QLAFX00(vha->hw))
4264 return qlafx00_fw_ready(vha);
4265
4266 rval = QLA_SUCCESS;
4267
4268 /* Time to wait for loop down */
4269 if (IS_P3P_TYPE(ha))
4270 min_wait = 30;
4271 else
4272 min_wait = 20;
4273
4274 /*
4275 * Firmware should take at most one RATOV to login, plus 5 seconds for
4276 * our own processing.
4277 */
4278 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4279 wait_time = min_wait;
4280 }
4281
4282 /* Min wait time if loop down */
4283 mtime = jiffies + (min_wait * HZ);
4284
4285 /* wait time before firmware ready */
4286 wtime = jiffies + (wait_time * HZ);
4287
4288 /* Wait for ISP to finish LIP */
4289 if (!vha->flags.init_done)
4290 ql_log(ql_log_info, vha, 0x801e,
4291 "Waiting for LIP to complete.\n");
4292
4293 do {
4294 memset(state, -1, sizeof(state));
4295 rval = qla2x00_get_firmware_state(vha, state);
4296 if (rval == QLA_SUCCESS) {
4297 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4298 vha->device_flags &= ~DFLG_NO_CABLE;
4299 }
4300 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4301 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4302 "fw_state=%x 84xx=%x.\n", state[0],
4303 state[2]);
4304 if ((state[2] & FSTATE_LOGGED_IN) &&
4305 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4306 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4307 "Sending verify iocb.\n");
4308
4309 cs84xx_time = jiffies;
4310 rval = qla84xx_init_chip(vha);
4311 if (rval != QLA_SUCCESS) {
4312 ql_log(ql_log_warn,
4313 vha, 0x8007,
4314 "Init chip failed.\n");
4315 break;
4316 }
4317
4318 /* Add time taken to initialize. */
4319 cs84xx_time = jiffies - cs84xx_time;
4320 wtime += cs84xx_time;
4321 mtime += cs84xx_time;
4322 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4323 "Increasing wait time by %ld. "
4324 "New time %ld.\n", cs84xx_time,
4325 wtime);
4326 }
4327 } else if (state[0] == FSTATE_READY) {
4328 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4329 "F/W Ready - OK.\n");
4330
4331 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4332 &ha->login_timeout, &ha->r_a_tov);
4333
4334 rval = QLA_SUCCESS;
4335 break;
4336 }
4337
4338 rval = QLA_FUNCTION_FAILED;
4339
4340 if (atomic_read(&vha->loop_down_timer) &&
4341 state[0] != FSTATE_READY) {
4342 /* Loop down. Timeout on min_wait for states
4343 * other than Wait for Login.
4344 */
4345 if (time_after_eq(jiffies, mtime)) {
4346 ql_log(ql_log_info, vha, 0x8038,
4347 "Cable is unplugged...\n");
4348
4349 vha->device_flags |= DFLG_NO_CABLE;
4350 break;
4351 }
4352 }
4353 } else {
4354 /* Mailbox cmd failed. Timeout on min_wait. */
4355 if (time_after_eq(jiffies, mtime) ||
4356 ha->flags.isp82xx_fw_hung)
4357 break;
4358 }
4359
4360 if (time_after_eq(jiffies, wtime))
4361 break;
4362
4363 /* Delay for a while */
4364 msleep(500);
4365 } while (1);
4366
4367 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4368 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4369 state[1], state[2], state[3], state[4], state[5], jiffies);
4370
4371 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4372 ql_log(ql_log_warn, vha, 0x803b,
4373 "Firmware ready **** FAILED ****.\n");
4374 }
4375
4376 return (rval);
4377 }
4378
4379 /*
4380 * qla2x00_configure_hba
4381 * Setup adapter context.
4382 *
4383 * Input:
4384 * ha = adapter state pointer.
4385 *
4386 * Returns:
4387 * 0 = success
4388 *
4389 * Context:
4390 * Kernel context.
4391 */
4392 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)4393 qla2x00_configure_hba(scsi_qla_host_t *vha)
4394 {
4395 int rval;
4396 uint16_t loop_id;
4397 uint16_t topo;
4398 uint16_t sw_cap;
4399 uint8_t al_pa;
4400 uint8_t area;
4401 uint8_t domain;
4402 char connect_type[22];
4403 struct qla_hw_data *ha = vha->hw;
4404 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4405 port_id_t id;
4406 unsigned long flags;
4407
4408 /* Get host addresses. */
4409 rval = qla2x00_get_adapter_id(vha,
4410 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4411 if (rval != QLA_SUCCESS) {
4412 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4413 IS_CNA_CAPABLE(ha) ||
4414 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4415 ql_dbg(ql_dbg_disc, vha, 0x2008,
4416 "Loop is in a transition state.\n");
4417 } else {
4418 ql_log(ql_log_warn, vha, 0x2009,
4419 "Unable to get host loop ID.\n");
4420 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4421 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4422 ql_log(ql_log_warn, vha, 0x1151,
4423 "Doing link init.\n");
4424 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4425 return rval;
4426 }
4427 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4428 }
4429 return (rval);
4430 }
4431
4432 if (topo == 4) {
4433 ql_log(ql_log_info, vha, 0x200a,
4434 "Cannot get topology - retrying.\n");
4435 return (QLA_FUNCTION_FAILED);
4436 }
4437
4438 vha->loop_id = loop_id;
4439
4440 /* initialize */
4441 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4442 ha->operating_mode = LOOP;
4443 ha->switch_cap = 0;
4444
4445 switch (topo) {
4446 case 0:
4447 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4448 ha->current_topology = ISP_CFG_NL;
4449 strcpy(connect_type, "(Loop)");
4450 break;
4451
4452 case 1:
4453 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4454 ha->switch_cap = sw_cap;
4455 ha->current_topology = ISP_CFG_FL;
4456 strcpy(connect_type, "(FL_Port)");
4457 break;
4458
4459 case 2:
4460 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4461 ha->operating_mode = P2P;
4462 ha->current_topology = ISP_CFG_N;
4463 strcpy(connect_type, "(N_Port-to-N_Port)");
4464 break;
4465
4466 case 3:
4467 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4468 ha->switch_cap = sw_cap;
4469 ha->operating_mode = P2P;
4470 ha->current_topology = ISP_CFG_F;
4471 strcpy(connect_type, "(F_Port)");
4472 break;
4473
4474 default:
4475 ql_dbg(ql_dbg_disc, vha, 0x200f,
4476 "HBA in unknown topology %x, using NL.\n", topo);
4477 ha->current_topology = ISP_CFG_NL;
4478 strcpy(connect_type, "(Loop)");
4479 break;
4480 }
4481
4482 /* Save Host port and loop ID. */
4483 /* byte order - Big Endian */
4484 id.b.domain = domain;
4485 id.b.area = area;
4486 id.b.al_pa = al_pa;
4487 id.b.rsvd_1 = 0;
4488 spin_lock_irqsave(&ha->hardware_lock, flags);
4489 if (!(topo == 2 && ha->flags.n2n_bigger))
4490 qlt_update_host_map(vha, id);
4491 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4492
4493 if (!vha->flags.init_done)
4494 ql_log(ql_log_info, vha, 0x2010,
4495 "Topology - %s, Host Loop address 0x%x.\n",
4496 connect_type, vha->loop_id);
4497
4498 return(rval);
4499 }
4500
4501 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,const char * def)4502 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4503 const char *def)
4504 {
4505 char *st, *en;
4506 uint16_t index;
4507 uint64_t zero[2] = { 0 };
4508 struct qla_hw_data *ha = vha->hw;
4509 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4510 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4511
4512 if (len > sizeof(zero))
4513 len = sizeof(zero);
4514 if (memcmp(model, &zero, len) != 0) {
4515 memcpy(ha->model_number, model, len);
4516 st = en = ha->model_number;
4517 en += len - 1;
4518 while (en > st) {
4519 if (*en != 0x20 && *en != 0x00)
4520 break;
4521 *en-- = '\0';
4522 }
4523
4524 index = (ha->pdev->subsystem_device & 0xff);
4525 if (use_tbl &&
4526 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4527 index < QLA_MODEL_NAMES)
4528 strlcpy(ha->model_desc,
4529 qla2x00_model_name[index * 2 + 1],
4530 sizeof(ha->model_desc));
4531 } else {
4532 index = (ha->pdev->subsystem_device & 0xff);
4533 if (use_tbl &&
4534 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4535 index < QLA_MODEL_NAMES) {
4536 strlcpy(ha->model_number,
4537 qla2x00_model_name[index * 2],
4538 sizeof(ha->model_number));
4539 strlcpy(ha->model_desc,
4540 qla2x00_model_name[index * 2 + 1],
4541 sizeof(ha->model_desc));
4542 } else {
4543 strlcpy(ha->model_number, def,
4544 sizeof(ha->model_number));
4545 }
4546 }
4547 if (IS_FWI2_CAPABLE(ha))
4548 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4549 sizeof(ha->model_desc));
4550 }
4551
4552 /* On sparc systems, obtain port and node WWN from firmware
4553 * properties.
4554 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)4555 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4556 {
4557 #ifdef CONFIG_SPARC
4558 struct qla_hw_data *ha = vha->hw;
4559 struct pci_dev *pdev = ha->pdev;
4560 struct device_node *dp = pci_device_to_OF_node(pdev);
4561 const u8 *val;
4562 int len;
4563
4564 val = of_get_property(dp, "port-wwn", &len);
4565 if (val && len >= WWN_SIZE)
4566 memcpy(nv->port_name, val, WWN_SIZE);
4567
4568 val = of_get_property(dp, "node-wwn", &len);
4569 if (val && len >= WWN_SIZE)
4570 memcpy(nv->node_name, val, WWN_SIZE);
4571 #endif
4572 }
4573
4574 /*
4575 * NVRAM configuration for ISP 2xxx
4576 *
4577 * Input:
4578 * ha = adapter block pointer.
4579 *
4580 * Output:
4581 * initialization control block in response_ring
4582 * host adapters parameters in host adapter block
4583 *
4584 * Returns:
4585 * 0 = success.
4586 */
4587 int
qla2x00_nvram_config(scsi_qla_host_t * vha)4588 qla2x00_nvram_config(scsi_qla_host_t *vha)
4589 {
4590 int rval;
4591 uint8_t chksum = 0;
4592 uint16_t cnt;
4593 uint8_t *dptr1, *dptr2;
4594 struct qla_hw_data *ha = vha->hw;
4595 init_cb_t *icb = ha->init_cb;
4596 nvram_t *nv = ha->nvram;
4597 uint8_t *ptr = ha->nvram;
4598 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4599
4600 rval = QLA_SUCCESS;
4601
4602 /* Determine NVRAM starting address. */
4603 ha->nvram_size = sizeof(*nv);
4604 ha->nvram_base = 0;
4605 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4606 if ((rd_reg_word(®->ctrl_status) >> 14) == 1)
4607 ha->nvram_base = 0x80;
4608
4609 /* Get NVRAM data and calculate checksum. */
4610 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4611 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4612 chksum += *ptr++;
4613
4614 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4615 "Contents of NVRAM.\n");
4616 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4617 nv, ha->nvram_size);
4618
4619 /* Bad NVRAM data, set defaults parameters. */
4620 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4621 nv->nvram_version < 1) {
4622 /* Reset NVRAM data. */
4623 ql_log(ql_log_warn, vha, 0x0064,
4624 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4625 chksum, nv->id, nv->nvram_version);
4626 ql_log(ql_log_warn, vha, 0x0065,
4627 "Falling back to "
4628 "functioning (yet invalid -- WWPN) defaults.\n");
4629
4630 /*
4631 * Set default initialization control block.
4632 */
4633 memset(nv, 0, ha->nvram_size);
4634 nv->parameter_block_version = ICB_VERSION;
4635
4636 if (IS_QLA23XX(ha)) {
4637 nv->firmware_options[0] = BIT_2 | BIT_1;
4638 nv->firmware_options[1] = BIT_7 | BIT_5;
4639 nv->add_firmware_options[0] = BIT_5;
4640 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4641 nv->frame_payload_size = cpu_to_le16(2048);
4642 nv->special_options[1] = BIT_7;
4643 } else if (IS_QLA2200(ha)) {
4644 nv->firmware_options[0] = BIT_2 | BIT_1;
4645 nv->firmware_options[1] = BIT_7 | BIT_5;
4646 nv->add_firmware_options[0] = BIT_5;
4647 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4648 nv->frame_payload_size = cpu_to_le16(1024);
4649 } else if (IS_QLA2100(ha)) {
4650 nv->firmware_options[0] = BIT_3 | BIT_1;
4651 nv->firmware_options[1] = BIT_5;
4652 nv->frame_payload_size = cpu_to_le16(1024);
4653 }
4654
4655 nv->max_iocb_allocation = cpu_to_le16(256);
4656 nv->execution_throttle = cpu_to_le16(16);
4657 nv->retry_count = 8;
4658 nv->retry_delay = 1;
4659
4660 nv->port_name[0] = 33;
4661 nv->port_name[3] = 224;
4662 nv->port_name[4] = 139;
4663
4664 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4665
4666 nv->login_timeout = 4;
4667
4668 /*
4669 * Set default host adapter parameters
4670 */
4671 nv->host_p[1] = BIT_2;
4672 nv->reset_delay = 5;
4673 nv->port_down_retry_count = 8;
4674 nv->max_luns_per_target = cpu_to_le16(8);
4675 nv->link_down_timeout = 60;
4676
4677 rval = 1;
4678 }
4679
4680 /* Reset Initialization control block */
4681 memset(icb, 0, ha->init_cb_size);
4682
4683 /*
4684 * Setup driver NVRAM options.
4685 */
4686 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4687 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4688 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4689 nv->firmware_options[1] &= ~BIT_4;
4690
4691 if (IS_QLA23XX(ha)) {
4692 nv->firmware_options[0] |= BIT_2;
4693 nv->firmware_options[0] &= ~BIT_3;
4694 nv->special_options[0] &= ~BIT_6;
4695 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4696
4697 if (IS_QLA2300(ha)) {
4698 if (ha->fb_rev == FPM_2310) {
4699 strcpy(ha->model_number, "QLA2310");
4700 } else {
4701 strcpy(ha->model_number, "QLA2300");
4702 }
4703 } else {
4704 qla2x00_set_model_info(vha, nv->model_number,
4705 sizeof(nv->model_number), "QLA23xx");
4706 }
4707 } else if (IS_QLA2200(ha)) {
4708 nv->firmware_options[0] |= BIT_2;
4709 /*
4710 * 'Point-to-point preferred, else loop' is not a safe
4711 * connection mode setting.
4712 */
4713 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4714 (BIT_5 | BIT_4)) {
4715 /* Force 'loop preferred, else point-to-point'. */
4716 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4717 nv->add_firmware_options[0] |= BIT_5;
4718 }
4719 strcpy(ha->model_number, "QLA22xx");
4720 } else /*if (IS_QLA2100(ha))*/ {
4721 strcpy(ha->model_number, "QLA2100");
4722 }
4723
4724 /*
4725 * Copy over NVRAM RISC parameter block to initialization control block.
4726 */
4727 dptr1 = (uint8_t *)icb;
4728 dptr2 = (uint8_t *)&nv->parameter_block_version;
4729 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4730 while (cnt--)
4731 *dptr1++ = *dptr2++;
4732
4733 /* Copy 2nd half. */
4734 dptr1 = (uint8_t *)icb->add_firmware_options;
4735 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4736 while (cnt--)
4737 *dptr1++ = *dptr2++;
4738 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4739 /* Use alternate WWN? */
4740 if (nv->host_p[1] & BIT_7) {
4741 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4742 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4743 }
4744
4745 /* Prepare nodename */
4746 if ((icb->firmware_options[1] & BIT_6) == 0) {
4747 /*
4748 * Firmware will apply the following mask if the nodename was
4749 * not provided.
4750 */
4751 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4752 icb->node_name[0] &= 0xF0;
4753 }
4754
4755 /*
4756 * Set host adapter parameters.
4757 */
4758
4759 /*
4760 * BIT_7 in the host-parameters section allows for modification to
4761 * internal driver logging.
4762 */
4763 if (nv->host_p[0] & BIT_7)
4764 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4765 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4766 /* Always load RISC code on non ISP2[12]00 chips. */
4767 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4768 ha->flags.disable_risc_code_load = 0;
4769 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4770 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4771 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4772 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4773 ha->flags.disable_serdes = 0;
4774
4775 ha->operating_mode =
4776 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4777
4778 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4779 sizeof(ha->fw_seriallink_options));
4780
4781 /* save HBA serial number */
4782 ha->serial0 = icb->port_name[5];
4783 ha->serial1 = icb->port_name[6];
4784 ha->serial2 = icb->port_name[7];
4785 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4786 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4787
4788 icb->execution_throttle = cpu_to_le16(0xFFFF);
4789
4790 ha->retry_count = nv->retry_count;
4791
4792 /* Set minimum login_timeout to 4 seconds. */
4793 if (nv->login_timeout != ql2xlogintimeout)
4794 nv->login_timeout = ql2xlogintimeout;
4795 if (nv->login_timeout < 4)
4796 nv->login_timeout = 4;
4797 ha->login_timeout = nv->login_timeout;
4798
4799 /* Set minimum RATOV to 100 tenths of a second. */
4800 ha->r_a_tov = 100;
4801
4802 ha->loop_reset_delay = nv->reset_delay;
4803
4804 /* Link Down Timeout = 0:
4805 *
4806 * When Port Down timer expires we will start returning
4807 * I/O's to OS with "DID_NO_CONNECT".
4808 *
4809 * Link Down Timeout != 0:
4810 *
4811 * The driver waits for the link to come up after link down
4812 * before returning I/Os to OS with "DID_NO_CONNECT".
4813 */
4814 if (nv->link_down_timeout == 0) {
4815 ha->loop_down_abort_time =
4816 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4817 } else {
4818 ha->link_down_timeout = nv->link_down_timeout;
4819 ha->loop_down_abort_time =
4820 (LOOP_DOWN_TIME - ha->link_down_timeout);
4821 }
4822
4823 /*
4824 * Need enough time to try and get the port back.
4825 */
4826 ha->port_down_retry_count = nv->port_down_retry_count;
4827 if (qlport_down_retry)
4828 ha->port_down_retry_count = qlport_down_retry;
4829 /* Set login_retry_count */
4830 ha->login_retry_count = nv->retry_count;
4831 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4832 ha->port_down_retry_count > 3)
4833 ha->login_retry_count = ha->port_down_retry_count;
4834 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4835 ha->login_retry_count = ha->port_down_retry_count;
4836 if (ql2xloginretrycount)
4837 ha->login_retry_count = ql2xloginretrycount;
4838
4839 icb->lun_enables = cpu_to_le16(0);
4840 icb->command_resource_count = 0;
4841 icb->immediate_notify_resource_count = 0;
4842 icb->timeout = cpu_to_le16(0);
4843
4844 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4845 /* Enable RIO */
4846 icb->firmware_options[0] &= ~BIT_3;
4847 icb->add_firmware_options[0] &=
4848 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4849 icb->add_firmware_options[0] |= BIT_2;
4850 icb->response_accumulation_timer = 3;
4851 icb->interrupt_delay_timer = 5;
4852
4853 vha->flags.process_response_queue = 1;
4854 } else {
4855 /* Enable ZIO. */
4856 if (!vha->flags.init_done) {
4857 ha->zio_mode = icb->add_firmware_options[0] &
4858 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4859 ha->zio_timer = icb->interrupt_delay_timer ?
4860 icb->interrupt_delay_timer : 2;
4861 }
4862 icb->add_firmware_options[0] &=
4863 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4864 vha->flags.process_response_queue = 0;
4865 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4866 ha->zio_mode = QLA_ZIO_MODE_6;
4867
4868 ql_log(ql_log_info, vha, 0x0068,
4869 "ZIO mode %d enabled; timer delay (%d us).\n",
4870 ha->zio_mode, ha->zio_timer * 100);
4871
4872 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4873 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4874 vha->flags.process_response_queue = 1;
4875 }
4876 }
4877
4878 if (rval) {
4879 ql_log(ql_log_warn, vha, 0x0069,
4880 "NVRAM configuration failed.\n");
4881 }
4882 return (rval);
4883 }
4884
4885 static void
qla2x00_rport_del(void * data)4886 qla2x00_rport_del(void *data)
4887 {
4888 fc_port_t *fcport = data;
4889 struct fc_rport *rport;
4890 unsigned long flags;
4891
4892 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4893 rport = fcport->drport ? fcport->drport : fcport->rport;
4894 fcport->drport = NULL;
4895 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4896 if (rport) {
4897 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4898 "%s %8phN. rport %p roles %x\n",
4899 __func__, fcport->port_name, rport,
4900 rport->roles);
4901
4902 fc_remote_port_delete(rport);
4903 }
4904 }
4905
qla2x00_set_fcport_state(fc_port_t * fcport,int state)4906 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
4907 {
4908 int old_state;
4909
4910 old_state = atomic_read(&fcport->state);
4911 atomic_set(&fcport->state, state);
4912
4913 /* Don't print state transitions during initial allocation of fcport */
4914 if (old_state && old_state != state) {
4915 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
4916 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
4917 fcport->port_name, port_state_str[old_state],
4918 port_state_str[state], fcport->d_id.b.domain,
4919 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4920 }
4921 }
4922
4923 /**
4924 * qla2x00_alloc_fcport() - Allocate a generic fcport.
4925 * @vha: HA context
4926 * @flags: allocation flags
4927 *
4928 * Returns a pointer to the allocated fcport, or NULL, if none available.
4929 */
4930 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)4931 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4932 {
4933 fc_port_t *fcport;
4934
4935 fcport = kzalloc(sizeof(fc_port_t), flags);
4936 if (!fcport)
4937 return NULL;
4938
4939 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4940 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4941 flags);
4942 if (!fcport->ct_desc.ct_sns) {
4943 ql_log(ql_log_warn, vha, 0xd049,
4944 "Failed to allocate ct_sns request.\n");
4945 kfree(fcport);
4946 return NULL;
4947 }
4948
4949 /* Setup fcport template structure. */
4950 fcport->vha = vha;
4951 fcport->port_type = FCT_UNKNOWN;
4952 fcport->loop_id = FC_NO_LOOP_ID;
4953 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4954 fcport->supported_classes = FC_COS_UNSPECIFIED;
4955 fcport->fp_speed = PORT_SPEED_UNKNOWN;
4956
4957 fcport->disc_state = DSC_DELETED;
4958 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4959 fcport->deleted = QLA_SESS_DELETED;
4960 fcport->login_retry = vha->hw->login_retry_count;
4961 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4962 fcport->logout_on_delete = 1;
4963
4964 if (!fcport->ct_desc.ct_sns) {
4965 ql_log(ql_log_warn, vha, 0xd049,
4966 "Failed to allocate ct_sns request.\n");
4967 kfree(fcport);
4968 return NULL;
4969 }
4970
4971 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4972 INIT_WORK(&fcport->free_work, qlt_free_session_done);
4973 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
4974 INIT_LIST_HEAD(&fcport->gnl_entry);
4975 INIT_LIST_HEAD(&fcport->list);
4976
4977 return fcport;
4978 }
4979
4980 void
qla2x00_free_fcport(fc_port_t * fcport)4981 qla2x00_free_fcport(fc_port_t *fcport)
4982 {
4983 if (fcport->ct_desc.ct_sns) {
4984 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4985 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4986 fcport->ct_desc.ct_sns_dma);
4987
4988 fcport->ct_desc.ct_sns = NULL;
4989 }
4990 list_del(&fcport->list);
4991 qla2x00_clear_loop_id(fcport);
4992 kfree(fcport);
4993 }
4994
qla_get_login_template(scsi_qla_host_t * vha)4995 static void qla_get_login_template(scsi_qla_host_t *vha)
4996 {
4997 struct qla_hw_data *ha = vha->hw;
4998 int rval;
4999 u32 *bp, sz;
5000 __be32 *q;
5001
5002 memset(ha->init_cb, 0, ha->init_cb_size);
5003 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5004 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5005 ha->init_cb, sz);
5006 if (rval != QLA_SUCCESS) {
5007 ql_dbg(ql_dbg_init, vha, 0x00d1,
5008 "PLOGI ELS param read fail.\n");
5009 return;
5010 }
5011 q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5012
5013 bp = (uint32_t *)ha->init_cb;
5014 cpu_to_be32_array(q, bp, sz / 4);
5015 ha->flags.plogi_template_valid = 1;
5016 }
5017
5018 /*
5019 * qla2x00_configure_loop
5020 * Updates Fibre Channel Device Database with what is actually on loop.
5021 *
5022 * Input:
5023 * ha = adapter block pointer.
5024 *
5025 * Returns:
5026 * 0 = success.
5027 * 1 = error.
5028 * 2 = database was full and device was not configured.
5029 */
5030 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)5031 qla2x00_configure_loop(scsi_qla_host_t *vha)
5032 {
5033 int rval;
5034 unsigned long flags, save_flags;
5035 struct qla_hw_data *ha = vha->hw;
5036
5037 rval = QLA_SUCCESS;
5038
5039 /* Get Initiator ID */
5040 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5041 rval = qla2x00_configure_hba(vha);
5042 if (rval != QLA_SUCCESS) {
5043 ql_dbg(ql_dbg_disc, vha, 0x2013,
5044 "Unable to configure HBA.\n");
5045 return (rval);
5046 }
5047 }
5048
5049 save_flags = flags = vha->dpc_flags;
5050 ql_dbg(ql_dbg_disc, vha, 0x2014,
5051 "Configure loop -- dpc flags = 0x%lx.\n", flags);
5052
5053 /*
5054 * If we have both an RSCN and PORT UPDATE pending then handle them
5055 * both at the same time.
5056 */
5057 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5058 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
5059
5060 qla2x00_get_data_rate(vha);
5061 qla_get_login_template(vha);
5062
5063 /* Determine what we need to do */
5064 if ((ha->current_topology == ISP_CFG_FL ||
5065 ha->current_topology == ISP_CFG_F) &&
5066 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5067
5068 set_bit(RSCN_UPDATE, &flags);
5069 clear_bit(LOCAL_LOOP_UPDATE, &flags);
5070
5071 } else if (ha->current_topology == ISP_CFG_NL ||
5072 ha->current_topology == ISP_CFG_N) {
5073 clear_bit(RSCN_UPDATE, &flags);
5074 set_bit(LOCAL_LOOP_UPDATE, &flags);
5075 } else if (!vha->flags.online ||
5076 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
5077 set_bit(RSCN_UPDATE, &flags);
5078 set_bit(LOCAL_LOOP_UPDATE, &flags);
5079 }
5080
5081 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5082 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5083 ql_dbg(ql_dbg_disc, vha, 0x2015,
5084 "Loop resync needed, failing.\n");
5085 rval = QLA_FUNCTION_FAILED;
5086 } else
5087 rval = qla2x00_configure_local_loop(vha);
5088 }
5089
5090 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5091 if (LOOP_TRANSITION(vha)) {
5092 ql_dbg(ql_dbg_disc, vha, 0x2099,
5093 "Needs RSCN update and loop transition.\n");
5094 rval = QLA_FUNCTION_FAILED;
5095 }
5096 else
5097 rval = qla2x00_configure_fabric(vha);
5098 }
5099
5100 if (rval == QLA_SUCCESS) {
5101 if (atomic_read(&vha->loop_down_timer) ||
5102 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5103 rval = QLA_FUNCTION_FAILED;
5104 } else {
5105 atomic_set(&vha->loop_state, LOOP_READY);
5106 ql_dbg(ql_dbg_disc, vha, 0x2069,
5107 "LOOP READY.\n");
5108 ha->flags.fw_init_done = 1;
5109
5110 /*
5111 * Process any ATIO queue entries that came in
5112 * while we weren't online.
5113 */
5114 if (qla_tgt_mode_enabled(vha) ||
5115 qla_dual_mode_enabled(vha)) {
5116 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5117 qlt_24xx_process_atio_queue(vha, 0);
5118 spin_unlock_irqrestore(&ha->tgt.atio_lock,
5119 flags);
5120 }
5121 }
5122 }
5123
5124 if (rval) {
5125 ql_dbg(ql_dbg_disc, vha, 0x206a,
5126 "%s *** FAILED ***.\n", __func__);
5127 } else {
5128 ql_dbg(ql_dbg_disc, vha, 0x206b,
5129 "%s: exiting normally.\n", __func__);
5130 }
5131
5132 /* Restore state if a resync event occurred during processing */
5133 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5134 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5135 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5136 if (test_bit(RSCN_UPDATE, &save_flags)) {
5137 set_bit(RSCN_UPDATE, &vha->dpc_flags);
5138 }
5139 }
5140
5141 return (rval);
5142 }
5143
qla2x00_configure_n2n_loop(scsi_qla_host_t * vha)5144 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5145 {
5146 unsigned long flags;
5147 fc_port_t *fcport;
5148
5149 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
5150 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5151
5152 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5153 if (fcport->n2n_flag) {
5154 qla24xx_fcport_handle_login(vha, fcport);
5155 return QLA_SUCCESS;
5156 }
5157 }
5158
5159 spin_lock_irqsave(&vha->work_lock, flags);
5160 vha->scan.scan_retry++;
5161 spin_unlock_irqrestore(&vha->work_lock, flags);
5162
5163 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5164 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5165 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5166 }
5167 return QLA_FUNCTION_FAILED;
5168 }
5169
5170 /*
5171 * qla2x00_configure_local_loop
5172 * Updates Fibre Channel Device Database with local loop devices.
5173 *
5174 * Input:
5175 * ha = adapter block pointer.
5176 *
5177 * Returns:
5178 * 0 = success.
5179 */
5180 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)5181 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5182 {
5183 int rval, rval2;
5184 int found_devs;
5185 int found;
5186 fc_port_t *fcport, *new_fcport;
5187 uint16_t index;
5188 uint16_t entries;
5189 struct gid_list_info *gid;
5190 uint16_t loop_id;
5191 uint8_t domain, area, al_pa;
5192 struct qla_hw_data *ha = vha->hw;
5193 unsigned long flags;
5194
5195 /* Inititae N2N login. */
5196 if (N2N_TOPO(ha))
5197 return qla2x00_configure_n2n_loop(vha);
5198
5199 found_devs = 0;
5200 new_fcport = NULL;
5201 entries = MAX_FIBRE_DEVICES_LOOP;
5202
5203 /* Get list of logged in devices. */
5204 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5205 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5206 &entries);
5207 if (rval != QLA_SUCCESS)
5208 goto err;
5209
5210 ql_dbg(ql_dbg_disc, vha, 0x2011,
5211 "Entries in ID list (%d).\n", entries);
5212 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5213 ha->gid_list, entries * sizeof(*ha->gid_list));
5214
5215 if (entries == 0) {
5216 spin_lock_irqsave(&vha->work_lock, flags);
5217 vha->scan.scan_retry++;
5218 spin_unlock_irqrestore(&vha->work_lock, flags);
5219
5220 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5221 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5222 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5223 }
5224 } else {
5225 vha->scan.scan_retry = 0;
5226 }
5227
5228 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5229 fcport->scan_state = QLA_FCPORT_SCAN;
5230 }
5231
5232 /* Allocate temporary fcport for any new fcports discovered. */
5233 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5234 if (new_fcport == NULL) {
5235 ql_log(ql_log_warn, vha, 0x2012,
5236 "Memory allocation failed for fcport.\n");
5237 rval = QLA_MEMORY_ALLOC_FAILED;
5238 goto err;
5239 }
5240 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5241
5242 /* Add devices to port list. */
5243 gid = ha->gid_list;
5244 for (index = 0; index < entries; index++) {
5245 domain = gid->domain;
5246 area = gid->area;
5247 al_pa = gid->al_pa;
5248 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5249 loop_id = gid->loop_id_2100;
5250 else
5251 loop_id = le16_to_cpu(gid->loop_id);
5252 gid = (void *)gid + ha->gid_list_info_size;
5253
5254 /* Bypass reserved domain fields. */
5255 if ((domain & 0xf0) == 0xf0)
5256 continue;
5257
5258 /* Bypass if not same domain and area of adapter. */
5259 if (area && domain && ((area != vha->d_id.b.area) ||
5260 (domain != vha->d_id.b.domain)) &&
5261 (ha->current_topology == ISP_CFG_NL))
5262 continue;
5263
5264
5265 /* Bypass invalid local loop ID. */
5266 if (loop_id > LAST_LOCAL_LOOP_ID)
5267 continue;
5268
5269 memset(new_fcport->port_name, 0, WWN_SIZE);
5270
5271 /* Fill in member data. */
5272 new_fcport->d_id.b.domain = domain;
5273 new_fcport->d_id.b.area = area;
5274 new_fcport->d_id.b.al_pa = al_pa;
5275 new_fcport->loop_id = loop_id;
5276 new_fcport->scan_state = QLA_FCPORT_FOUND;
5277
5278 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5279 if (rval2 != QLA_SUCCESS) {
5280 ql_dbg(ql_dbg_disc, vha, 0x2097,
5281 "Failed to retrieve fcport information "
5282 "-- get_port_database=%x, loop_id=0x%04x.\n",
5283 rval2, new_fcport->loop_id);
5284 /* Skip retry if N2N */
5285 if (ha->current_topology != ISP_CFG_N) {
5286 ql_dbg(ql_dbg_disc, vha, 0x2105,
5287 "Scheduling resync.\n");
5288 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5289 continue;
5290 }
5291 }
5292
5293 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5294 /* Check for matching device in port list. */
5295 found = 0;
5296 fcport = NULL;
5297 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5298 if (memcmp(new_fcport->port_name, fcport->port_name,
5299 WWN_SIZE))
5300 continue;
5301
5302 fcport->flags &= ~FCF_FABRIC_DEVICE;
5303 fcport->loop_id = new_fcport->loop_id;
5304 fcport->port_type = new_fcport->port_type;
5305 fcport->d_id.b24 = new_fcport->d_id.b24;
5306 memcpy(fcport->node_name, new_fcport->node_name,
5307 WWN_SIZE);
5308 fcport->scan_state = QLA_FCPORT_FOUND;
5309 found++;
5310 break;
5311 }
5312
5313 if (!found) {
5314 /* New device, add to fcports list. */
5315 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5316
5317 /* Allocate a new replacement fcport. */
5318 fcport = new_fcport;
5319
5320 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5321
5322 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5323
5324 if (new_fcport == NULL) {
5325 ql_log(ql_log_warn, vha, 0xd031,
5326 "Failed to allocate memory for fcport.\n");
5327 rval = QLA_MEMORY_ALLOC_FAILED;
5328 goto err;
5329 }
5330 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5331 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5332 }
5333
5334 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5335
5336 /* Base iIDMA settings on HBA port speed. */
5337 fcport->fp_speed = ha->link_data_rate;
5338
5339 found_devs++;
5340 }
5341
5342 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5343 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5344 break;
5345
5346 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5347 if ((qla_dual_mode_enabled(vha) ||
5348 qla_ini_mode_enabled(vha)) &&
5349 atomic_read(&fcport->state) == FCS_ONLINE) {
5350 qla2x00_mark_device_lost(vha, fcport,
5351 ql2xplogiabsentdevice);
5352 if (fcport->loop_id != FC_NO_LOOP_ID &&
5353 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5354 fcport->port_type != FCT_INITIATOR &&
5355 fcport->port_type != FCT_BROADCAST) {
5356 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5357 "%s %d %8phC post del sess\n",
5358 __func__, __LINE__,
5359 fcport->port_name);
5360
5361 qlt_schedule_sess_for_deletion(fcport);
5362 continue;
5363 }
5364 }
5365 }
5366
5367 if (fcport->scan_state == QLA_FCPORT_FOUND)
5368 qla24xx_fcport_handle_login(vha, fcport);
5369 }
5370
5371 qla2x00_free_fcport(new_fcport);
5372
5373 return rval;
5374
5375 err:
5376 ql_dbg(ql_dbg_disc, vha, 0x2098,
5377 "Configure local loop error exit: rval=%x.\n", rval);
5378 return rval;
5379 }
5380
5381 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5382 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5383 {
5384 int rval;
5385 uint16_t mb[MAILBOX_REGISTER_COUNT];
5386 struct qla_hw_data *ha = vha->hw;
5387
5388 if (!IS_IIDMA_CAPABLE(ha))
5389 return;
5390
5391 if (atomic_read(&fcport->state) != FCS_ONLINE)
5392 return;
5393
5394 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5395 fcport->fp_speed > ha->link_data_rate ||
5396 !ha->flags.gpsc_supported)
5397 return;
5398
5399 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5400 mb);
5401 if (rval != QLA_SUCCESS) {
5402 ql_dbg(ql_dbg_disc, vha, 0x2004,
5403 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5404 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5405 } else {
5406 ql_dbg(ql_dbg_disc, vha, 0x2005,
5407 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5408 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5409 fcport->fp_speed, fcport->port_name);
5410 }
5411 }
5412
qla_do_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5413 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5414 {
5415 qla2x00_iidma_fcport(vha, fcport);
5416 qla24xx_update_fcport_fcp_prio(vha, fcport);
5417 }
5418
qla_post_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5419 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5420 {
5421 struct qla_work_evt *e;
5422
5423 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5424 if (!e)
5425 return QLA_FUNCTION_FAILED;
5426
5427 e->u.fcport.fcport = fcport;
5428 return qla2x00_post_work(vha, e);
5429 }
5430
5431 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5432 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)5433 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5434 {
5435 struct fc_rport_identifiers rport_ids;
5436 struct fc_rport *rport;
5437 unsigned long flags;
5438
5439 if (atomic_read(&fcport->state) == FCS_ONLINE)
5440 return;
5441
5442 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5443 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5444 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5445 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5446 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5447 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5448 if (!rport) {
5449 ql_log(ql_log_warn, vha, 0x2006,
5450 "Unable to allocate fc remote port.\n");
5451 return;
5452 }
5453
5454 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5455 *((fc_port_t **)rport->dd_data) = fcport;
5456 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5457
5458 rport->supported_classes = fcport->supported_classes;
5459
5460 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5461 if (fcport->port_type == FCT_INITIATOR)
5462 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5463 if (fcport->port_type == FCT_TARGET)
5464 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5465 if (fcport->port_type & FCT_NVME_INITIATOR)
5466 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5467 if (fcport->port_type & FCT_NVME_TARGET)
5468 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5469 if (fcport->port_type & FCT_NVME_DISCOVERY)
5470 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5471
5472 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5473 "%s %8phN. rport %p is %s mode\n",
5474 __func__, fcport->port_name, rport,
5475 (fcport->port_type == FCT_TARGET) ? "tgt" :
5476 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5477
5478 fc_remote_port_rolechg(rport, rport_ids.roles);
5479 }
5480
5481 /*
5482 * qla2x00_update_fcport
5483 * Updates device on list.
5484 *
5485 * Input:
5486 * ha = adapter block pointer.
5487 * fcport = port structure pointer.
5488 *
5489 * Return:
5490 * 0 - Success
5491 * BIT_0 - error
5492 *
5493 * Context:
5494 * Kernel context.
5495 */
5496 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5497 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5498 {
5499 if (IS_SW_RESV_ADDR(fcport->d_id))
5500 return;
5501
5502 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5503 __func__, fcport->port_name);
5504
5505 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5506 fcport->login_retry = vha->hw->login_retry_count;
5507 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5508 fcport->deleted = 0;
5509 if (vha->hw->current_topology == ISP_CFG_NL)
5510 fcport->logout_on_delete = 0;
5511 else
5512 fcport->logout_on_delete = 1;
5513 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5514
5515 switch (vha->hw->current_topology) {
5516 case ISP_CFG_N:
5517 case ISP_CFG_NL:
5518 fcport->keep_nport_handle = 1;
5519 break;
5520 default:
5521 break;
5522 }
5523
5524 qla2x00_iidma_fcport(vha, fcport);
5525
5526 qla2x00_dfs_create_rport(vha, fcport);
5527
5528 if (NVME_TARGET(vha->hw, fcport)) {
5529 qla_nvme_register_remote(vha, fcport);
5530 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5531 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5532 return;
5533 }
5534
5535 qla24xx_update_fcport_fcp_prio(vha, fcport);
5536
5537 switch (vha->host->active_mode) {
5538 case MODE_INITIATOR:
5539 qla2x00_reg_remote_port(vha, fcport);
5540 break;
5541 case MODE_TARGET:
5542 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5543 !vha->vha_tgt.qla_tgt->tgt_stopped)
5544 qlt_fc_port_added(vha, fcport);
5545 break;
5546 case MODE_DUAL:
5547 qla2x00_reg_remote_port(vha, fcport);
5548 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5549 !vha->vha_tgt.qla_tgt->tgt_stopped)
5550 qlt_fc_port_added(vha, fcport);
5551 break;
5552 default:
5553 break;
5554 }
5555
5556 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5557
5558 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5559 if (fcport->id_changed) {
5560 fcport->id_changed = 0;
5561 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5562 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5563 __func__, __LINE__, fcport->port_name,
5564 vha->fcport_count);
5565 qla24xx_post_gfpnid_work(vha, fcport);
5566 } else {
5567 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5568 "%s %d %8phC post gpsc fcp_cnt %d\n",
5569 __func__, __LINE__, fcport->port_name,
5570 vha->fcport_count);
5571 qla24xx_post_gpsc_work(vha, fcport);
5572 }
5573 }
5574
5575 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5576 }
5577
qla_register_fcport_fn(struct work_struct * work)5578 void qla_register_fcport_fn(struct work_struct *work)
5579 {
5580 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5581 u32 rscn_gen = fcport->rscn_gen;
5582 u16 data[2];
5583
5584 if (IS_SW_RESV_ADDR(fcport->d_id))
5585 return;
5586
5587 qla2x00_update_fcport(fcport->vha, fcport);
5588
5589 if (rscn_gen != fcport->rscn_gen) {
5590 /* RSCN(s) came in while registration */
5591 switch (fcport->next_disc_state) {
5592 case DSC_DELETE_PEND:
5593 qlt_schedule_sess_for_deletion(fcport);
5594 break;
5595 case DSC_ADISC:
5596 data[0] = data[1] = 0;
5597 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5598 data);
5599 break;
5600 default:
5601 break;
5602 }
5603 }
5604 }
5605
5606 /*
5607 * qla2x00_configure_fabric
5608 * Setup SNS devices with loop ID's.
5609 *
5610 * Input:
5611 * ha = adapter block pointer.
5612 *
5613 * Returns:
5614 * 0 = success.
5615 * BIT_0 = error
5616 */
5617 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)5618 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5619 {
5620 int rval;
5621 fc_port_t *fcport;
5622 uint16_t mb[MAILBOX_REGISTER_COUNT];
5623 uint16_t loop_id;
5624 LIST_HEAD(new_fcports);
5625 struct qla_hw_data *ha = vha->hw;
5626 int discovery_gen;
5627
5628 /* If FL port exists, then SNS is present */
5629 if (IS_FWI2_CAPABLE(ha))
5630 loop_id = NPH_F_PORT;
5631 else
5632 loop_id = SNS_FL_PORT;
5633 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5634 if (rval != QLA_SUCCESS) {
5635 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5636 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5637
5638 vha->device_flags &= ~SWITCH_FOUND;
5639 return (QLA_SUCCESS);
5640 }
5641 vha->device_flags |= SWITCH_FOUND;
5642
5643 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
5644 if (rval != QLA_SUCCESS)
5645 ql_dbg(ql_dbg_disc, vha, 0x20ff,
5646 "Failed to get Fabric Port Name\n");
5647
5648 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5649 rval = qla2x00_send_change_request(vha, 0x3, 0);
5650 if (rval != QLA_SUCCESS)
5651 ql_log(ql_log_warn, vha, 0x121,
5652 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5653 rval);
5654 }
5655
5656 do {
5657 qla2x00_mgmt_svr_login(vha);
5658
5659 /* Ensure we are logged into the SNS. */
5660 loop_id = NPH_SNS_LID(ha);
5661 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5662 0xfc, mb, BIT_1|BIT_0);
5663 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5664 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5665 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5666 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5667 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5668 return rval;
5669 }
5670
5671 /* FDMI support. */
5672 if (ql2xfdmienable &&
5673 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5674 qla2x00_fdmi_register(vha);
5675
5676 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5677 if (qla2x00_rft_id(vha)) {
5678 /* EMPTY */
5679 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5680 "Register FC-4 TYPE failed.\n");
5681 if (test_bit(LOOP_RESYNC_NEEDED,
5682 &vha->dpc_flags))
5683 break;
5684 }
5685 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5686 /* EMPTY */
5687 ql_dbg(ql_dbg_disc, vha, 0x209a,
5688 "Register FC-4 Features failed.\n");
5689 if (test_bit(LOOP_RESYNC_NEEDED,
5690 &vha->dpc_flags))
5691 break;
5692 }
5693 if (vha->flags.nvme_enabled) {
5694 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5695 ql_dbg(ql_dbg_disc, vha, 0x2049,
5696 "Register NVME FC Type Features failed.\n");
5697 }
5698 }
5699 if (qla2x00_rnn_id(vha)) {
5700 /* EMPTY */
5701 ql_dbg(ql_dbg_disc, vha, 0x2104,
5702 "Register Node Name failed.\n");
5703 if (test_bit(LOOP_RESYNC_NEEDED,
5704 &vha->dpc_flags))
5705 break;
5706 } else if (qla2x00_rsnn_nn(vha)) {
5707 /* EMPTY */
5708 ql_dbg(ql_dbg_disc, vha, 0x209b,
5709 "Register Symbolic Node Name failed.\n");
5710 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5711 break;
5712 }
5713 }
5714
5715
5716 /* Mark the time right before querying FW for connected ports.
5717 * This process is long, asynchronous and by the time it's done,
5718 * collected information might not be accurate anymore. E.g.
5719 * disconnected port might have re-connected and a brand new
5720 * session has been created. In this case session's generation
5721 * will be newer than discovery_gen. */
5722 qlt_do_generation_tick(vha, &discovery_gen);
5723
5724 if (USE_ASYNC_SCAN(ha)) {
5725 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5726 NULL);
5727 if (rval)
5728 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5729 } else {
5730 list_for_each_entry(fcport, &vha->vp_fcports, list)
5731 fcport->scan_state = QLA_FCPORT_SCAN;
5732
5733 rval = qla2x00_find_all_fabric_devs(vha);
5734 }
5735 if (rval != QLA_SUCCESS)
5736 break;
5737 } while (0);
5738
5739 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5740 qla_nvme_register_hba(vha);
5741
5742 if (rval)
5743 ql_dbg(ql_dbg_disc, vha, 0x2068,
5744 "Configure fabric error exit rval=%d.\n", rval);
5745
5746 return (rval);
5747 }
5748
5749 /*
5750 * qla2x00_find_all_fabric_devs
5751 *
5752 * Input:
5753 * ha = adapter block pointer.
5754 * dev = database device entry pointer.
5755 *
5756 * Returns:
5757 * 0 = success.
5758 *
5759 * Context:
5760 * Kernel context.
5761 */
5762 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha)5763 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5764 {
5765 int rval;
5766 uint16_t loop_id;
5767 fc_port_t *fcport, *new_fcport;
5768 int found;
5769
5770 sw_info_t *swl;
5771 int swl_idx;
5772 int first_dev, last_dev;
5773 port_id_t wrap = {}, nxt_d_id;
5774 struct qla_hw_data *ha = vha->hw;
5775 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5776 unsigned long flags;
5777
5778 rval = QLA_SUCCESS;
5779
5780 /* Try GID_PT to get device list, else GAN. */
5781 if (!ha->swl)
5782 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5783 GFP_KERNEL);
5784 swl = ha->swl;
5785 if (!swl) {
5786 /*EMPTY*/
5787 ql_dbg(ql_dbg_disc, vha, 0x209c,
5788 "GID_PT allocations failed, fallback on GA_NXT.\n");
5789 } else {
5790 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5791 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5792 swl = NULL;
5793 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5794 return rval;
5795 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5796 swl = NULL;
5797 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5798 return rval;
5799 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5800 swl = NULL;
5801 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5802 return rval;
5803 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5804 swl = NULL;
5805 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5806 return rval;
5807 }
5808
5809 /* If other queries succeeded probe for FC-4 type */
5810 if (swl) {
5811 qla2x00_gff_id(vha, swl);
5812 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5813 return rval;
5814 }
5815 }
5816 swl_idx = 0;
5817
5818 /* Allocate temporary fcport for any new fcports discovered. */
5819 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5820 if (new_fcport == NULL) {
5821 ql_log(ql_log_warn, vha, 0x209d,
5822 "Failed to allocate memory for fcport.\n");
5823 return (QLA_MEMORY_ALLOC_FAILED);
5824 }
5825 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5826 /* Set start port ID scan at adapter ID. */
5827 first_dev = 1;
5828 last_dev = 0;
5829
5830 /* Starting free loop ID. */
5831 loop_id = ha->min_external_loopid;
5832 for (; loop_id <= ha->max_loop_id; loop_id++) {
5833 if (qla2x00_is_reserved_id(vha, loop_id))
5834 continue;
5835
5836 if (ha->current_topology == ISP_CFG_FL &&
5837 (atomic_read(&vha->loop_down_timer) ||
5838 LOOP_TRANSITION(vha))) {
5839 atomic_set(&vha->loop_down_timer, 0);
5840 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5841 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5842 break;
5843 }
5844
5845 if (swl != NULL) {
5846 if (last_dev) {
5847 wrap.b24 = new_fcport->d_id.b24;
5848 } else {
5849 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5850 memcpy(new_fcport->node_name,
5851 swl[swl_idx].node_name, WWN_SIZE);
5852 memcpy(new_fcport->port_name,
5853 swl[swl_idx].port_name, WWN_SIZE);
5854 memcpy(new_fcport->fabric_port_name,
5855 swl[swl_idx].fabric_port_name, WWN_SIZE);
5856 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5857 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5858
5859 new_fcport->nvme_flag = 0;
5860 if (vha->flags.nvme_enabled &&
5861 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
5862 ql_log(ql_log_info, vha, 0x2131,
5863 "FOUND: NVME port %8phC as FC Type 28h\n",
5864 new_fcport->port_name);
5865 }
5866
5867 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5868 last_dev = 1;
5869 }
5870 swl_idx++;
5871 }
5872 } else {
5873 /* Send GA_NXT to the switch */
5874 rval = qla2x00_ga_nxt(vha, new_fcport);
5875 if (rval != QLA_SUCCESS) {
5876 ql_log(ql_log_warn, vha, 0x209e,
5877 "SNS scan failed -- assuming "
5878 "zero-entry result.\n");
5879 rval = QLA_SUCCESS;
5880 break;
5881 }
5882 }
5883
5884 /* If wrap on switch device list, exit. */
5885 if (first_dev) {
5886 wrap.b24 = new_fcport->d_id.b24;
5887 first_dev = 0;
5888 } else if (new_fcport->d_id.b24 == wrap.b24) {
5889 ql_dbg(ql_dbg_disc, vha, 0x209f,
5890 "Device wrap (%02x%02x%02x).\n",
5891 new_fcport->d_id.b.domain,
5892 new_fcport->d_id.b.area,
5893 new_fcport->d_id.b.al_pa);
5894 break;
5895 }
5896
5897 /* Bypass if same physical adapter. */
5898 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5899 continue;
5900
5901 /* Bypass virtual ports of the same host. */
5902 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5903 continue;
5904
5905 /* Bypass if same domain and area of adapter. */
5906 if (((new_fcport->d_id.b24 & 0xffff00) ==
5907 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5908 ISP_CFG_FL)
5909 continue;
5910
5911 /* Bypass reserved domain fields. */
5912 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5913 continue;
5914
5915 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
5916 if (ql2xgffidenable &&
5917 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
5918 new_fcport->fc4_type != 0))
5919 continue;
5920
5921 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5922
5923 /* Locate matching device in database. */
5924 found = 0;
5925 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5926 if (memcmp(new_fcport->port_name, fcport->port_name,
5927 WWN_SIZE))
5928 continue;
5929
5930 fcport->scan_state = QLA_FCPORT_FOUND;
5931
5932 found++;
5933
5934 /* Update port state. */
5935 memcpy(fcport->fabric_port_name,
5936 new_fcport->fabric_port_name, WWN_SIZE);
5937 fcport->fp_speed = new_fcport->fp_speed;
5938
5939 /*
5940 * If address the same and state FCS_ONLINE
5941 * (or in target mode), nothing changed.
5942 */
5943 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5944 (atomic_read(&fcport->state) == FCS_ONLINE ||
5945 (vha->host->active_mode == MODE_TARGET))) {
5946 break;
5947 }
5948
5949 /*
5950 * If device was not a fabric device before.
5951 */
5952 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5953 fcport->d_id.b24 = new_fcport->d_id.b24;
5954 qla2x00_clear_loop_id(fcport);
5955 fcport->flags |= (FCF_FABRIC_DEVICE |
5956 FCF_LOGIN_NEEDED);
5957 break;
5958 }
5959
5960 /*
5961 * Port ID changed or device was marked to be updated;
5962 * Log it out if still logged in and mark it for
5963 * relogin later.
5964 */
5965 if (qla_tgt_mode_enabled(base_vha)) {
5966 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5967 "port changed FC ID, %8phC"
5968 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5969 fcport->port_name,
5970 fcport->d_id.b.domain,
5971 fcport->d_id.b.area,
5972 fcport->d_id.b.al_pa,
5973 fcport->loop_id,
5974 new_fcport->d_id.b.domain,
5975 new_fcport->d_id.b.area,
5976 new_fcport->d_id.b.al_pa);
5977 fcport->d_id.b24 = new_fcport->d_id.b24;
5978 break;
5979 }
5980
5981 fcport->d_id.b24 = new_fcport->d_id.b24;
5982 fcport->flags |= FCF_LOGIN_NEEDED;
5983 break;
5984 }
5985
5986 if (found && NVME_TARGET(vha->hw, fcport)) {
5987 if (fcport->disc_state == DSC_DELETE_PEND) {
5988 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
5989 vha->fcport_count--;
5990 fcport->login_succ = 0;
5991 }
5992 }
5993
5994 if (found) {
5995 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5996 continue;
5997 }
5998 /* If device was not in our fcports list, then add it. */
5999 new_fcport->scan_state = QLA_FCPORT_FOUND;
6000 list_add_tail(&new_fcport->list, &vha->vp_fcports);
6001
6002 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6003
6004
6005 /* Allocate a new replacement fcport. */
6006 nxt_d_id.b24 = new_fcport->d_id.b24;
6007 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6008 if (new_fcport == NULL) {
6009 ql_log(ql_log_warn, vha, 0xd032,
6010 "Memory allocation failed for fcport.\n");
6011 return (QLA_MEMORY_ALLOC_FAILED);
6012 }
6013 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6014 new_fcport->d_id.b24 = nxt_d_id.b24;
6015 }
6016
6017 qla2x00_free_fcport(new_fcport);
6018
6019 /*
6020 * Logout all previous fabric dev marked lost, except FCP2 devices.
6021 */
6022 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6023 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6024 break;
6025
6026 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6027 continue;
6028
6029 if (fcport->scan_state == QLA_FCPORT_SCAN) {
6030 if ((qla_dual_mode_enabled(vha) ||
6031 qla_ini_mode_enabled(vha)) &&
6032 atomic_read(&fcport->state) == FCS_ONLINE) {
6033 qla2x00_mark_device_lost(vha, fcport,
6034 ql2xplogiabsentdevice);
6035 if (fcport->loop_id != FC_NO_LOOP_ID &&
6036 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6037 fcport->port_type != FCT_INITIATOR &&
6038 fcport->port_type != FCT_BROADCAST) {
6039 ql_dbg(ql_dbg_disc, vha, 0x20f0,
6040 "%s %d %8phC post del sess\n",
6041 __func__, __LINE__,
6042 fcport->port_name);
6043 qlt_schedule_sess_for_deletion(fcport);
6044 continue;
6045 }
6046 }
6047 }
6048
6049 if (fcport->scan_state == QLA_FCPORT_FOUND &&
6050 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
6051 qla24xx_fcport_handle_login(vha, fcport);
6052 }
6053 return (rval);
6054 }
6055
6056 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6057 int
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t * vha)6058 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6059 {
6060 int loop_id = FC_NO_LOOP_ID;
6061 int lid = NPH_MGMT_SERVER - vha->vp_idx;
6062 unsigned long flags;
6063 struct qla_hw_data *ha = vha->hw;
6064
6065 if (vha->vp_idx == 0) {
6066 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
6067 return NPH_MGMT_SERVER;
6068 }
6069
6070 /* pick id from high and work down to low */
6071 spin_lock_irqsave(&ha->vport_slock, flags);
6072 for (; lid > 0; lid--) {
6073 if (!test_bit(lid, vha->hw->loop_id_map)) {
6074 set_bit(lid, vha->hw->loop_id_map);
6075 loop_id = lid;
6076 break;
6077 }
6078 }
6079 spin_unlock_irqrestore(&ha->vport_slock, flags);
6080
6081 return loop_id;
6082 }
6083
6084 /*
6085 * qla2x00_fabric_login
6086 * Issue fabric login command.
6087 *
6088 * Input:
6089 * ha = adapter block pointer.
6090 * device = pointer to FC device type structure.
6091 *
6092 * Returns:
6093 * 0 - Login successfully
6094 * 1 - Login failed
6095 * 2 - Initiator device
6096 * 3 - Fatal error
6097 */
6098 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)6099 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6100 uint16_t *next_loopid)
6101 {
6102 int rval;
6103 int retry;
6104 uint16_t tmp_loopid;
6105 uint16_t mb[MAILBOX_REGISTER_COUNT];
6106 struct qla_hw_data *ha = vha->hw;
6107
6108 retry = 0;
6109 tmp_loopid = 0;
6110
6111 for (;;) {
6112 ql_dbg(ql_dbg_disc, vha, 0x2000,
6113 "Trying Fabric Login w/loop id 0x%04x for port "
6114 "%02x%02x%02x.\n",
6115 fcport->loop_id, fcport->d_id.b.domain,
6116 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6117
6118 /* Login fcport on switch. */
6119 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6120 fcport->d_id.b.domain, fcport->d_id.b.area,
6121 fcport->d_id.b.al_pa, mb, BIT_0);
6122 if (rval != QLA_SUCCESS) {
6123 return rval;
6124 }
6125 if (mb[0] == MBS_PORT_ID_USED) {
6126 /*
6127 * Device has another loop ID. The firmware team
6128 * recommends the driver perform an implicit login with
6129 * the specified ID again. The ID we just used is save
6130 * here so we return with an ID that can be tried by
6131 * the next login.
6132 */
6133 retry++;
6134 tmp_loopid = fcport->loop_id;
6135 fcport->loop_id = mb[1];
6136
6137 ql_dbg(ql_dbg_disc, vha, 0x2001,
6138 "Fabric Login: port in use - next loop "
6139 "id=0x%04x, port id= %02x%02x%02x.\n",
6140 fcport->loop_id, fcport->d_id.b.domain,
6141 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6142
6143 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6144 /*
6145 * Login succeeded.
6146 */
6147 if (retry) {
6148 /* A retry occurred before. */
6149 *next_loopid = tmp_loopid;
6150 } else {
6151 /*
6152 * No retry occurred before. Just increment the
6153 * ID value for next login.
6154 */
6155 *next_loopid = (fcport->loop_id + 1);
6156 }
6157
6158 if (mb[1] & BIT_0) {
6159 fcport->port_type = FCT_INITIATOR;
6160 } else {
6161 fcport->port_type = FCT_TARGET;
6162 if (mb[1] & BIT_1) {
6163 fcport->flags |= FCF_FCP2_DEVICE;
6164 }
6165 }
6166
6167 if (mb[10] & BIT_0)
6168 fcport->supported_classes |= FC_COS_CLASS2;
6169 if (mb[10] & BIT_1)
6170 fcport->supported_classes |= FC_COS_CLASS3;
6171
6172 if (IS_FWI2_CAPABLE(ha)) {
6173 if (mb[10] & BIT_7)
6174 fcport->flags |=
6175 FCF_CONF_COMP_SUPPORTED;
6176 }
6177
6178 rval = QLA_SUCCESS;
6179 break;
6180 } else if (mb[0] == MBS_LOOP_ID_USED) {
6181 /*
6182 * Loop ID already used, try next loop ID.
6183 */
6184 fcport->loop_id++;
6185 rval = qla2x00_find_new_loop_id(vha, fcport);
6186 if (rval != QLA_SUCCESS) {
6187 /* Ran out of loop IDs to use */
6188 break;
6189 }
6190 } else if (mb[0] == MBS_COMMAND_ERROR) {
6191 /*
6192 * Firmware possibly timed out during login. If NO
6193 * retries are left to do then the device is declared
6194 * dead.
6195 */
6196 *next_loopid = fcport->loop_id;
6197 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6198 fcport->d_id.b.domain, fcport->d_id.b.area,
6199 fcport->d_id.b.al_pa);
6200 qla2x00_mark_device_lost(vha, fcport, 1);
6201
6202 rval = 1;
6203 break;
6204 } else {
6205 /*
6206 * unrecoverable / not handled error
6207 */
6208 ql_dbg(ql_dbg_disc, vha, 0x2002,
6209 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6210 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6211 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6212 fcport->loop_id, jiffies);
6213
6214 *next_loopid = fcport->loop_id;
6215 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6216 fcport->d_id.b.domain, fcport->d_id.b.area,
6217 fcport->d_id.b.al_pa);
6218 qla2x00_clear_loop_id(fcport);
6219 fcport->login_retry = 0;
6220
6221 rval = 3;
6222 break;
6223 }
6224 }
6225
6226 return (rval);
6227 }
6228
6229 /*
6230 * qla2x00_local_device_login
6231 * Issue local device login command.
6232 *
6233 * Input:
6234 * ha = adapter block pointer.
6235 * loop_id = loop id of device to login to.
6236 *
6237 * Returns (Where's the #define!!!!):
6238 * 0 - Login successfully
6239 * 1 - Login failed
6240 * 3 - Fatal error
6241 */
6242 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)6243 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6244 {
6245 int rval;
6246 uint16_t mb[MAILBOX_REGISTER_COUNT];
6247
6248 memset(mb, 0, sizeof(mb));
6249 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6250 if (rval == QLA_SUCCESS) {
6251 /* Interrogate mailbox registers for any errors */
6252 if (mb[0] == MBS_COMMAND_ERROR)
6253 rval = 1;
6254 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6255 /* device not in PCB table */
6256 rval = 3;
6257 }
6258
6259 return (rval);
6260 }
6261
6262 /*
6263 * qla2x00_loop_resync
6264 * Resync with fibre channel devices.
6265 *
6266 * Input:
6267 * ha = adapter block pointer.
6268 *
6269 * Returns:
6270 * 0 = success
6271 */
6272 int
qla2x00_loop_resync(scsi_qla_host_t * vha)6273 qla2x00_loop_resync(scsi_qla_host_t *vha)
6274 {
6275 int rval = QLA_SUCCESS;
6276 uint32_t wait_time;
6277
6278 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6279 if (vha->flags.online) {
6280 if (!(rval = qla2x00_fw_ready(vha))) {
6281 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6282 wait_time = 256;
6283 do {
6284 if (!IS_QLAFX00(vha->hw)) {
6285 /*
6286 * Issue a marker after FW becomes
6287 * ready.
6288 */
6289 qla2x00_marker(vha, vha->hw->base_qpair,
6290 0, 0, MK_SYNC_ALL);
6291 vha->marker_needed = 0;
6292 }
6293
6294 /* Remap devices on Loop. */
6295 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6296
6297 if (IS_QLAFX00(vha->hw))
6298 qlafx00_configure_devices(vha);
6299 else
6300 qla2x00_configure_loop(vha);
6301
6302 wait_time--;
6303 } while (!atomic_read(&vha->loop_down_timer) &&
6304 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6305 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6306 &vha->dpc_flags)));
6307 }
6308 }
6309
6310 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6311 return (QLA_FUNCTION_FAILED);
6312
6313 if (rval)
6314 ql_dbg(ql_dbg_disc, vha, 0x206c,
6315 "%s *** FAILED ***.\n", __func__);
6316
6317 return (rval);
6318 }
6319
6320 /*
6321 * qla2x00_perform_loop_resync
6322 * Description: This function will set the appropriate flags and call
6323 * qla2x00_loop_resync. If successful loop will be resynced
6324 * Arguments : scsi_qla_host_t pointer
6325 * returm : Success or Failure
6326 */
6327
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)6328 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6329 {
6330 int32_t rval = 0;
6331
6332 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6333 /*Configure the flags so that resync happens properly*/
6334 atomic_set(&ha->loop_down_timer, 0);
6335 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6336 atomic_set(&ha->loop_state, LOOP_UP);
6337 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6338 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6339 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6340
6341 rval = qla2x00_loop_resync(ha);
6342 } else
6343 atomic_set(&ha->loop_state, LOOP_DEAD);
6344
6345 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6346 }
6347
6348 return rval;
6349 }
6350
6351 void
qla2x00_update_fcports(scsi_qla_host_t * base_vha)6352 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6353 {
6354 fc_port_t *fcport;
6355 struct scsi_qla_host *vha;
6356 struct qla_hw_data *ha = base_vha->hw;
6357 unsigned long flags;
6358
6359 spin_lock_irqsave(&ha->vport_slock, flags);
6360 /* Go with deferred removal of rport references. */
6361 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6362 atomic_inc(&vha->vref_count);
6363 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6364 if (fcport->drport &&
6365 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6366 spin_unlock_irqrestore(&ha->vport_slock, flags);
6367 qla2x00_rport_del(fcport);
6368
6369 spin_lock_irqsave(&ha->vport_slock, flags);
6370 }
6371 }
6372 atomic_dec(&vha->vref_count);
6373 wake_up(&vha->vref_waitq);
6374 }
6375 spin_unlock_irqrestore(&ha->vport_slock, flags);
6376 }
6377
6378 /* Assumes idc_lock always held on entry */
6379 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)6380 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6381 {
6382 struct qla_hw_data *ha = vha->hw;
6383 uint32_t drv_presence, drv_presence_mask;
6384 uint32_t dev_part_info1, dev_part_info2, class_type;
6385 uint32_t class_type_mask = 0x3;
6386 uint16_t fcoe_other_function = 0xffff, i;
6387
6388 if (IS_QLA8044(ha)) {
6389 drv_presence = qla8044_rd_direct(vha,
6390 QLA8044_CRB_DRV_ACTIVE_INDEX);
6391 dev_part_info1 = qla8044_rd_direct(vha,
6392 QLA8044_CRB_DEV_PART_INFO_INDEX);
6393 dev_part_info2 = qla8044_rd_direct(vha,
6394 QLA8044_CRB_DEV_PART_INFO2);
6395 } else {
6396 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6397 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6398 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6399 }
6400 for (i = 0; i < 8; i++) {
6401 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6402 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6403 (i != ha->portnum)) {
6404 fcoe_other_function = i;
6405 break;
6406 }
6407 }
6408 if (fcoe_other_function == 0xffff) {
6409 for (i = 0; i < 8; i++) {
6410 class_type = ((dev_part_info2 >> (i * 4)) &
6411 class_type_mask);
6412 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6413 ((i + 8) != ha->portnum)) {
6414 fcoe_other_function = i + 8;
6415 break;
6416 }
6417 }
6418 }
6419 /*
6420 * Prepare drv-presence mask based on fcoe functions present.
6421 * However consider only valid physical fcoe function numbers (0-15).
6422 */
6423 drv_presence_mask = ~((1 << (ha->portnum)) |
6424 ((fcoe_other_function == 0xffff) ?
6425 0 : (1 << (fcoe_other_function))));
6426
6427 /* We are the reset owner iff:
6428 * - No other protocol drivers present.
6429 * - This is the lowest among fcoe functions. */
6430 if (!(drv_presence & drv_presence_mask) &&
6431 (ha->portnum < fcoe_other_function)) {
6432 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6433 "This host is Reset owner.\n");
6434 ha->flags.nic_core_reset_owner = 1;
6435 }
6436 }
6437
6438 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)6439 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6440 {
6441 int rval = QLA_SUCCESS;
6442 struct qla_hw_data *ha = vha->hw;
6443 uint32_t drv_ack;
6444
6445 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6446 if (rval == QLA_SUCCESS) {
6447 drv_ack |= (1 << ha->portnum);
6448 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6449 }
6450
6451 return rval;
6452 }
6453
6454 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)6455 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6456 {
6457 int rval = QLA_SUCCESS;
6458 struct qla_hw_data *ha = vha->hw;
6459 uint32_t drv_ack;
6460
6461 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6462 if (rval == QLA_SUCCESS) {
6463 drv_ack &= ~(1 << ha->portnum);
6464 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6465 }
6466
6467 return rval;
6468 }
6469
6470 static const char *
qla83xx_dev_state_to_string(uint32_t dev_state)6471 qla83xx_dev_state_to_string(uint32_t dev_state)
6472 {
6473 switch (dev_state) {
6474 case QLA8XXX_DEV_COLD:
6475 return "COLD/RE-INIT";
6476 case QLA8XXX_DEV_INITIALIZING:
6477 return "INITIALIZING";
6478 case QLA8XXX_DEV_READY:
6479 return "READY";
6480 case QLA8XXX_DEV_NEED_RESET:
6481 return "NEED RESET";
6482 case QLA8XXX_DEV_NEED_QUIESCENT:
6483 return "NEED QUIESCENT";
6484 case QLA8XXX_DEV_FAILED:
6485 return "FAILED";
6486 case QLA8XXX_DEV_QUIESCENT:
6487 return "QUIESCENT";
6488 default:
6489 return "Unknown";
6490 }
6491 }
6492
6493 /* Assumes idc-lock always held on entry */
6494 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)6495 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6496 {
6497 struct qla_hw_data *ha = vha->hw;
6498 uint32_t idc_audit_reg = 0, duration_secs = 0;
6499
6500 switch (audit_type) {
6501 case IDC_AUDIT_TIMESTAMP:
6502 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6503 idc_audit_reg = (ha->portnum) |
6504 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6505 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6506 break;
6507
6508 case IDC_AUDIT_COMPLETION:
6509 duration_secs = ((jiffies_to_msecs(jiffies) -
6510 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6511 idc_audit_reg = (ha->portnum) |
6512 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6513 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6514 break;
6515
6516 default:
6517 ql_log(ql_log_warn, vha, 0xb078,
6518 "Invalid audit type specified.\n");
6519 break;
6520 }
6521 }
6522
6523 /* Assumes idc_lock always held on entry */
6524 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)6525 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6526 {
6527 struct qla_hw_data *ha = vha->hw;
6528 uint32_t idc_control, dev_state;
6529
6530 __qla83xx_get_idc_control(vha, &idc_control);
6531 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6532 ql_log(ql_log_info, vha, 0xb080,
6533 "NIC Core reset has been disabled. idc-control=0x%x\n",
6534 idc_control);
6535 return QLA_FUNCTION_FAILED;
6536 }
6537
6538 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6539 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6540 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6541 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6542 QLA8XXX_DEV_NEED_RESET);
6543 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6544 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6545 } else {
6546 const char *state = qla83xx_dev_state_to_string(dev_state);
6547
6548 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6549
6550 /* SV: XXX: Is timeout required here? */
6551 /* Wait for IDC state change READY -> NEED_RESET */
6552 while (dev_state == QLA8XXX_DEV_READY) {
6553 qla83xx_idc_unlock(vha, 0);
6554 msleep(200);
6555 qla83xx_idc_lock(vha, 0);
6556 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6557 }
6558 }
6559
6560 /* Send IDC ack by writing to drv-ack register */
6561 __qla83xx_set_drv_ack(vha);
6562
6563 return QLA_SUCCESS;
6564 }
6565
6566 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)6567 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6568 {
6569 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6570 }
6571
6572 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)6573 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6574 {
6575 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6576 }
6577
6578 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)6579 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6580 {
6581 uint32_t drv_presence = 0;
6582 struct qla_hw_data *ha = vha->hw;
6583
6584 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6585 if (drv_presence & (1 << ha->portnum))
6586 return QLA_SUCCESS;
6587 else
6588 return QLA_TEST_FAILED;
6589 }
6590
6591 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)6592 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6593 {
6594 int rval = QLA_SUCCESS;
6595 struct qla_hw_data *ha = vha->hw;
6596
6597 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6598 "Entered %s().\n", __func__);
6599
6600 if (vha->device_flags & DFLG_DEV_FAILED) {
6601 ql_log(ql_log_warn, vha, 0xb059,
6602 "Device in unrecoverable FAILED state.\n");
6603 return QLA_FUNCTION_FAILED;
6604 }
6605
6606 qla83xx_idc_lock(vha, 0);
6607
6608 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6609 ql_log(ql_log_warn, vha, 0xb05a,
6610 "Function=0x%x has been removed from IDC participation.\n",
6611 ha->portnum);
6612 rval = QLA_FUNCTION_FAILED;
6613 goto exit;
6614 }
6615
6616 qla83xx_reset_ownership(vha);
6617
6618 rval = qla83xx_initiating_reset(vha);
6619
6620 /*
6621 * Perform reset if we are the reset-owner,
6622 * else wait till IDC state changes to READY/FAILED.
6623 */
6624 if (rval == QLA_SUCCESS) {
6625 rval = qla83xx_idc_state_handler(vha);
6626
6627 if (rval == QLA_SUCCESS)
6628 ha->flags.nic_core_hung = 0;
6629 __qla83xx_clear_drv_ack(vha);
6630 }
6631
6632 exit:
6633 qla83xx_idc_unlock(vha, 0);
6634
6635 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6636
6637 return rval;
6638 }
6639
6640 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)6641 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6642 {
6643 struct qla_hw_data *ha = vha->hw;
6644 int rval = QLA_FUNCTION_FAILED;
6645
6646 if (!IS_MCTP_CAPABLE(ha)) {
6647 /* This message can be removed from the final version */
6648 ql_log(ql_log_info, vha, 0x506d,
6649 "This board is not MCTP capable\n");
6650 return rval;
6651 }
6652
6653 if (!ha->mctp_dump) {
6654 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6655 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6656
6657 if (!ha->mctp_dump) {
6658 ql_log(ql_log_warn, vha, 0x506e,
6659 "Failed to allocate memory for mctp dump\n");
6660 return rval;
6661 }
6662 }
6663
6664 #define MCTP_DUMP_STR_ADDR 0x00000000
6665 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6666 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6667 if (rval != QLA_SUCCESS) {
6668 ql_log(ql_log_warn, vha, 0x506f,
6669 "Failed to capture mctp dump\n");
6670 } else {
6671 ql_log(ql_log_info, vha, 0x5070,
6672 "Mctp dump capture for host (%ld/%p).\n",
6673 vha->host_no, ha->mctp_dump);
6674 ha->mctp_dumped = 1;
6675 }
6676
6677 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6678 ha->flags.nic_core_reset_hdlr_active = 1;
6679 rval = qla83xx_restart_nic_firmware(vha);
6680 if (rval)
6681 /* NIC Core reset failed. */
6682 ql_log(ql_log_warn, vha, 0x5071,
6683 "Failed to restart nic firmware\n");
6684 else
6685 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6686 "Restarted NIC firmware successfully.\n");
6687 ha->flags.nic_core_reset_hdlr_active = 0;
6688 }
6689
6690 return rval;
6691
6692 }
6693
6694 /*
6695 * qla2x00_quiesce_io
6696 * Description: This function will block the new I/Os
6697 * Its not aborting any I/Os as context
6698 * is not destroyed during quiescence
6699 * Arguments: scsi_qla_host_t
6700 * return : void
6701 */
6702 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)6703 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6704 {
6705 struct qla_hw_data *ha = vha->hw;
6706 struct scsi_qla_host *vp;
6707
6708 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6709 "Quiescing I/O - ha=%p.\n", ha);
6710
6711 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6712 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6713 atomic_set(&vha->loop_state, LOOP_DOWN);
6714 qla2x00_mark_all_devices_lost(vha);
6715 list_for_each_entry(vp, &ha->vp_list, list)
6716 qla2x00_mark_all_devices_lost(vp);
6717 } else {
6718 if (!atomic_read(&vha->loop_down_timer))
6719 atomic_set(&vha->loop_down_timer,
6720 LOOP_DOWN_TIME);
6721 }
6722 /* Wait for pending cmds to complete */
6723 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
6724 != QLA_SUCCESS);
6725 }
6726
6727 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)6728 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6729 {
6730 struct qla_hw_data *ha = vha->hw;
6731 struct scsi_qla_host *vp;
6732 unsigned long flags;
6733 fc_port_t *fcport;
6734 u16 i;
6735
6736 /* For ISP82XX, driver waits for completion of the commands.
6737 * online flag should be set.
6738 */
6739 if (!(IS_P3P_TYPE(ha)))
6740 vha->flags.online = 0;
6741 ha->flags.chip_reset_done = 0;
6742 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6743 vha->qla_stats.total_isp_aborts++;
6744
6745 ql_log(ql_log_info, vha, 0x00af,
6746 "Performing ISP error recovery - ha=%p.\n", ha);
6747
6748 ha->flags.purge_mbox = 1;
6749 /* For ISP82XX, reset_chip is just disabling interrupts.
6750 * Driver waits for the completion of the commands.
6751 * the interrupts need to be enabled.
6752 */
6753 if (!(IS_P3P_TYPE(ha)))
6754 ha->isp_ops->reset_chip(vha);
6755
6756 ha->link_data_rate = PORT_SPEED_UNKNOWN;
6757 SAVE_TOPO(ha);
6758 ha->flags.rida_fmt2 = 0;
6759 ha->flags.n2n_ae = 0;
6760 ha->flags.lip_ae = 0;
6761 ha->current_topology = 0;
6762 QLA_FW_STOPPED(ha);
6763 ha->flags.fw_init_done = 0;
6764 ha->chip_reset++;
6765 ha->base_qpair->chip_reset = ha->chip_reset;
6766 for (i = 0; i < ha->max_qpairs; i++) {
6767 if (ha->queue_pair_map[i])
6768 ha->queue_pair_map[i]->chip_reset =
6769 ha->base_qpair->chip_reset;
6770 }
6771
6772 /* purge MBox commands */
6773 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6774 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6775 complete(&ha->mbx_intr_comp);
6776 }
6777
6778 i = 0;
6779 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6780 atomic_read(&ha->num_pend_mbx_stage2) ||
6781 atomic_read(&ha->num_pend_mbx_stage1)) {
6782 msleep(20);
6783 i++;
6784 if (i > 50)
6785 break;
6786 }
6787 ha->flags.purge_mbox = 0;
6788
6789 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6790 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6791 atomic_set(&vha->loop_state, LOOP_DOWN);
6792 qla2x00_mark_all_devices_lost(vha);
6793
6794 spin_lock_irqsave(&ha->vport_slock, flags);
6795 list_for_each_entry(vp, &ha->vp_list, list) {
6796 atomic_inc(&vp->vref_count);
6797 spin_unlock_irqrestore(&ha->vport_slock, flags);
6798
6799 qla2x00_mark_all_devices_lost(vp);
6800
6801 spin_lock_irqsave(&ha->vport_slock, flags);
6802 atomic_dec(&vp->vref_count);
6803 }
6804 spin_unlock_irqrestore(&ha->vport_slock, flags);
6805 } else {
6806 if (!atomic_read(&vha->loop_down_timer))
6807 atomic_set(&vha->loop_down_timer,
6808 LOOP_DOWN_TIME);
6809 }
6810
6811 /* Clear all async request states across all VPs. */
6812 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6813 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6814 fcport->scan_state = 0;
6815 }
6816 spin_lock_irqsave(&ha->vport_slock, flags);
6817 list_for_each_entry(vp, &ha->vp_list, list) {
6818 atomic_inc(&vp->vref_count);
6819 spin_unlock_irqrestore(&ha->vport_slock, flags);
6820
6821 list_for_each_entry(fcport, &vp->vp_fcports, list)
6822 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6823
6824 spin_lock_irqsave(&ha->vport_slock, flags);
6825 atomic_dec(&vp->vref_count);
6826 }
6827 spin_unlock_irqrestore(&ha->vport_slock, flags);
6828
6829 if (!ha->flags.eeh_busy) {
6830 /* Make sure for ISP 82XX IO DMA is complete */
6831 if (IS_P3P_TYPE(ha)) {
6832 qla82xx_chip_reset_cleanup(vha);
6833 ql_log(ql_log_info, vha, 0x00b4,
6834 "Done chip reset cleanup.\n");
6835
6836 /* Done waiting for pending commands.
6837 * Reset the online flag.
6838 */
6839 vha->flags.online = 0;
6840 }
6841
6842 /* Requeue all commands in outstanding command list. */
6843 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6844 }
6845 /* memory barrier */
6846 wmb();
6847 }
6848
6849 /*
6850 * qla2x00_abort_isp
6851 * Resets ISP and aborts all outstanding commands.
6852 *
6853 * Input:
6854 * ha = adapter block pointer.
6855 *
6856 * Returns:
6857 * 0 = success
6858 */
6859 int
qla2x00_abort_isp(scsi_qla_host_t * vha)6860 qla2x00_abort_isp(scsi_qla_host_t *vha)
6861 {
6862 int rval;
6863 uint8_t status = 0;
6864 struct qla_hw_data *ha = vha->hw;
6865 struct scsi_qla_host *vp;
6866 struct req_que *req = ha->req_q_map[0];
6867 unsigned long flags;
6868
6869 if (vha->flags.online) {
6870 qla2x00_abort_isp_cleanup(vha);
6871
6872 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
6873 ha->flags.chip_reset_done = 1;
6874 vha->flags.online = 1;
6875 status = 0;
6876 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6877 return status;
6878 }
6879
6880 if (IS_QLA8031(ha)) {
6881 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6882 "Clearing fcoe driver presence.\n");
6883 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6884 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6885 "Error while clearing DRV-Presence.\n");
6886 }
6887
6888 if (unlikely(pci_channel_offline(ha->pdev) &&
6889 ha->flags.pci_channel_io_perm_failure)) {
6890 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6891 status = 0;
6892 return status;
6893 }
6894
6895 switch (vha->qlini_mode) {
6896 case QLA2XXX_INI_MODE_DISABLED:
6897 if (!qla_tgt_mode_enabled(vha))
6898 return 0;
6899 break;
6900 case QLA2XXX_INI_MODE_DUAL:
6901 if (!qla_dual_mode_enabled(vha))
6902 return 0;
6903 break;
6904 case QLA2XXX_INI_MODE_ENABLED:
6905 default:
6906 break;
6907 }
6908
6909 ha->isp_ops->get_flash_version(vha, req->ring);
6910
6911 ha->isp_ops->nvram_config(vha);
6912
6913 if (!qla2x00_restart_isp(vha)) {
6914 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6915
6916 if (!atomic_read(&vha->loop_down_timer)) {
6917 /*
6918 * Issue marker command only when we are going
6919 * to start the I/O .
6920 */
6921 vha->marker_needed = 1;
6922 }
6923
6924 vha->flags.online = 1;
6925
6926 ha->isp_ops->enable_intrs(ha);
6927
6928 ha->isp_abort_cnt = 0;
6929 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6930
6931 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6932 qla2x00_get_fw_version(vha);
6933 if (ha->fce) {
6934 ha->flags.fce_enabled = 1;
6935 memset(ha->fce, 0,
6936 fce_calc_size(ha->fce_bufs));
6937 rval = qla2x00_enable_fce_trace(vha,
6938 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6939 &ha->fce_bufs);
6940 if (rval) {
6941 ql_log(ql_log_warn, vha, 0x8033,
6942 "Unable to reinitialize FCE "
6943 "(%d).\n", rval);
6944 ha->flags.fce_enabled = 0;
6945 }
6946 }
6947
6948 if (ha->eft) {
6949 memset(ha->eft, 0, EFT_SIZE);
6950 rval = qla2x00_enable_eft_trace(vha,
6951 ha->eft_dma, EFT_NUM_BUFFERS);
6952 if (rval) {
6953 ql_log(ql_log_warn, vha, 0x8034,
6954 "Unable to reinitialize EFT "
6955 "(%d).\n", rval);
6956 }
6957 }
6958 } else { /* failed the ISP abort */
6959 vha->flags.online = 1;
6960 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6961 if (ha->isp_abort_cnt == 0) {
6962 ql_log(ql_log_fatal, vha, 0x8035,
6963 "ISP error recover failed - "
6964 "board disabled.\n");
6965 /*
6966 * The next call disables the board
6967 * completely.
6968 */
6969 qla2x00_abort_isp_cleanup(vha);
6970 vha->flags.online = 0;
6971 clear_bit(ISP_ABORT_RETRY,
6972 &vha->dpc_flags);
6973 status = 0;
6974 } else { /* schedule another ISP abort */
6975 ha->isp_abort_cnt--;
6976 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6977 "ISP abort - retry remaining %d.\n",
6978 ha->isp_abort_cnt);
6979 status = 1;
6980 }
6981 } else {
6982 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6983 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6984 "ISP error recovery - retrying (%d) "
6985 "more times.\n", ha->isp_abort_cnt);
6986 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6987 status = 1;
6988 }
6989 }
6990
6991 }
6992
6993 if (!status) {
6994 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6995 qla2x00_configure_hba(vha);
6996 spin_lock_irqsave(&ha->vport_slock, flags);
6997 list_for_each_entry(vp, &ha->vp_list, list) {
6998 if (vp->vp_idx) {
6999 atomic_inc(&vp->vref_count);
7000 spin_unlock_irqrestore(&ha->vport_slock, flags);
7001
7002 qla2x00_vp_abort_isp(vp);
7003
7004 spin_lock_irqsave(&ha->vport_slock, flags);
7005 atomic_dec(&vp->vref_count);
7006 }
7007 }
7008 spin_unlock_irqrestore(&ha->vport_slock, flags);
7009
7010 if (IS_QLA8031(ha)) {
7011 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7012 "Setting back fcoe driver presence.\n");
7013 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7014 ql_dbg(ql_dbg_p3p, vha, 0xb074,
7015 "Error while setting DRV-Presence.\n");
7016 }
7017 } else {
7018 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
7019 __func__);
7020 }
7021
7022 return(status);
7023 }
7024
7025 /*
7026 * qla2x00_restart_isp
7027 * restarts the ISP after a reset
7028 *
7029 * Input:
7030 * ha = adapter block pointer.
7031 *
7032 * Returns:
7033 * 0 = success
7034 */
7035 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)7036 qla2x00_restart_isp(scsi_qla_host_t *vha)
7037 {
7038 int status;
7039 struct qla_hw_data *ha = vha->hw;
7040
7041 /* If firmware needs to be loaded */
7042 if (qla2x00_isp_firmware(vha)) {
7043 vha->flags.online = 0;
7044 status = ha->isp_ops->chip_diag(vha);
7045 if (status)
7046 return status;
7047 status = qla2x00_setup_chip(vha);
7048 if (status)
7049 return status;
7050 }
7051
7052 status = qla2x00_init_rings(vha);
7053 if (status)
7054 return status;
7055
7056 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7057 ha->flags.chip_reset_done = 1;
7058
7059 /* Initialize the queues in use */
7060 qla25xx_init_queues(ha);
7061
7062 status = qla2x00_fw_ready(vha);
7063 if (status) {
7064 /* if no cable then assume it's good */
7065 return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7066 }
7067
7068 /* Issue a marker after FW becomes ready. */
7069 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7070 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7071
7072 return 0;
7073 }
7074
7075 static int
qla25xx_init_queues(struct qla_hw_data * ha)7076 qla25xx_init_queues(struct qla_hw_data *ha)
7077 {
7078 struct rsp_que *rsp = NULL;
7079 struct req_que *req = NULL;
7080 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7081 int ret = -1;
7082 int i;
7083
7084 for (i = 1; i < ha->max_rsp_queues; i++) {
7085 rsp = ha->rsp_q_map[i];
7086 if (rsp && test_bit(i, ha->rsp_qid_map)) {
7087 rsp->options &= ~BIT_0;
7088 ret = qla25xx_init_rsp_que(base_vha, rsp);
7089 if (ret != QLA_SUCCESS)
7090 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
7091 "%s Rsp que: %d init failed.\n",
7092 __func__, rsp->id);
7093 else
7094 ql_dbg(ql_dbg_init, base_vha, 0x0100,
7095 "%s Rsp que: %d inited.\n",
7096 __func__, rsp->id);
7097 }
7098 }
7099 for (i = 1; i < ha->max_req_queues; i++) {
7100 req = ha->req_q_map[i];
7101 if (req && test_bit(i, ha->req_qid_map)) {
7102 /* Clear outstanding commands array. */
7103 req->options &= ~BIT_0;
7104 ret = qla25xx_init_req_que(base_vha, req);
7105 if (ret != QLA_SUCCESS)
7106 ql_dbg(ql_dbg_init, base_vha, 0x0101,
7107 "%s Req que: %d init failed.\n",
7108 __func__, req->id);
7109 else
7110 ql_dbg(ql_dbg_init, base_vha, 0x0102,
7111 "%s Req que: %d inited.\n",
7112 __func__, req->id);
7113 }
7114 }
7115 return ret;
7116 }
7117
7118 /*
7119 * qla2x00_reset_adapter
7120 * Reset adapter.
7121 *
7122 * Input:
7123 * ha = adapter block pointer.
7124 */
7125 int
qla2x00_reset_adapter(scsi_qla_host_t * vha)7126 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7127 {
7128 unsigned long flags = 0;
7129 struct qla_hw_data *ha = vha->hw;
7130 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7131
7132 vha->flags.online = 0;
7133 ha->isp_ops->disable_intrs(ha);
7134
7135 spin_lock_irqsave(&ha->hardware_lock, flags);
7136 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
7137 rd_reg_word(®->hccr); /* PCI Posting. */
7138 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
7139 rd_reg_word(®->hccr); /* PCI Posting. */
7140 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7141
7142 return QLA_SUCCESS;
7143 }
7144
7145 int
qla24xx_reset_adapter(scsi_qla_host_t * vha)7146 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7147 {
7148 unsigned long flags = 0;
7149 struct qla_hw_data *ha = vha->hw;
7150 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7151
7152 if (IS_P3P_TYPE(ha))
7153 return QLA_SUCCESS;
7154
7155 vha->flags.online = 0;
7156 ha->isp_ops->disable_intrs(ha);
7157
7158 spin_lock_irqsave(&ha->hardware_lock, flags);
7159 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
7160 rd_reg_dword(®->hccr);
7161 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
7162 rd_reg_dword(®->hccr);
7163 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7164
7165 if (IS_NOPOLLING_TYPE(ha))
7166 ha->isp_ops->enable_intrs(ha);
7167
7168 return QLA_SUCCESS;
7169 }
7170
7171 /* On sparc systems, obtain port and node WWN from firmware
7172 * properties.
7173 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)7174 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7175 struct nvram_24xx *nv)
7176 {
7177 #ifdef CONFIG_SPARC
7178 struct qla_hw_data *ha = vha->hw;
7179 struct pci_dev *pdev = ha->pdev;
7180 struct device_node *dp = pci_device_to_OF_node(pdev);
7181 const u8 *val;
7182 int len;
7183
7184 val = of_get_property(dp, "port-wwn", &len);
7185 if (val && len >= WWN_SIZE)
7186 memcpy(nv->port_name, val, WWN_SIZE);
7187
7188 val = of_get_property(dp, "node-wwn", &len);
7189 if (val && len >= WWN_SIZE)
7190 memcpy(nv->node_name, val, WWN_SIZE);
7191 #endif
7192 }
7193
7194 int
qla24xx_nvram_config(scsi_qla_host_t * vha)7195 qla24xx_nvram_config(scsi_qla_host_t *vha)
7196 {
7197 int rval;
7198 struct init_cb_24xx *icb;
7199 struct nvram_24xx *nv;
7200 __le32 *dptr;
7201 uint8_t *dptr1, *dptr2;
7202 uint32_t chksum;
7203 uint16_t cnt;
7204 struct qla_hw_data *ha = vha->hw;
7205
7206 rval = QLA_SUCCESS;
7207 icb = (struct init_cb_24xx *)ha->init_cb;
7208 nv = ha->nvram;
7209
7210 /* Determine NVRAM starting address. */
7211 if (ha->port_no == 0) {
7212 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7213 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7214 } else {
7215 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7216 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7217 }
7218
7219 ha->nvram_size = sizeof(*nv);
7220 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7221
7222 /* Get VPD data into cache */
7223 ha->vpd = ha->nvram + VPD_OFFSET;
7224 ha->isp_ops->read_nvram(vha, ha->vpd,
7225 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7226
7227 /* Get NVRAM data into cache and calculate checksum. */
7228 dptr = (__force __le32 *)nv;
7229 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7230 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7231 chksum += le32_to_cpu(*dptr);
7232
7233 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7234 "Contents of NVRAM\n");
7235 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7236 nv, ha->nvram_size);
7237
7238 /* Bad NVRAM data, set defaults parameters. */
7239 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7240 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7241 /* Reset NVRAM data. */
7242 ql_log(ql_log_warn, vha, 0x006b,
7243 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7244 chksum, nv->id, nv->nvram_version);
7245 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7246 ql_log(ql_log_warn, vha, 0x006c,
7247 "Falling back to functioning (yet invalid -- WWPN) "
7248 "defaults.\n");
7249
7250 /*
7251 * Set default initialization control block.
7252 */
7253 memset(nv, 0, ha->nvram_size);
7254 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7255 nv->version = cpu_to_le16(ICB_VERSION);
7256 nv->frame_payload_size = cpu_to_le16(2048);
7257 nv->execution_throttle = cpu_to_le16(0xFFFF);
7258 nv->exchange_count = cpu_to_le16(0);
7259 nv->hard_address = cpu_to_le16(124);
7260 nv->port_name[0] = 0x21;
7261 nv->port_name[1] = 0x00 + ha->port_no + 1;
7262 nv->port_name[2] = 0x00;
7263 nv->port_name[3] = 0xe0;
7264 nv->port_name[4] = 0x8b;
7265 nv->port_name[5] = 0x1c;
7266 nv->port_name[6] = 0x55;
7267 nv->port_name[7] = 0x86;
7268 nv->node_name[0] = 0x20;
7269 nv->node_name[1] = 0x00;
7270 nv->node_name[2] = 0x00;
7271 nv->node_name[3] = 0xe0;
7272 nv->node_name[4] = 0x8b;
7273 nv->node_name[5] = 0x1c;
7274 nv->node_name[6] = 0x55;
7275 nv->node_name[7] = 0x86;
7276 qla24xx_nvram_wwn_from_ofw(vha, nv);
7277 nv->login_retry_count = cpu_to_le16(8);
7278 nv->interrupt_delay_timer = cpu_to_le16(0);
7279 nv->login_timeout = cpu_to_le16(0);
7280 nv->firmware_options_1 =
7281 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7282 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7283 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7284 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7285 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7286 nv->efi_parameters = cpu_to_le32(0);
7287 nv->reset_delay = 5;
7288 nv->max_luns_per_target = cpu_to_le16(128);
7289 nv->port_down_retry_count = cpu_to_le16(30);
7290 nv->link_down_timeout = cpu_to_le16(30);
7291
7292 rval = 1;
7293 }
7294
7295 if (qla_tgt_mode_enabled(vha)) {
7296 /* Don't enable full login after initial LIP */
7297 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7298 /* Don't enable LIP full login for initiator */
7299 nv->host_p &= cpu_to_le32(~BIT_10);
7300 }
7301
7302 qlt_24xx_config_nvram_stage1(vha, nv);
7303
7304 /* Reset Initialization control block */
7305 memset(icb, 0, ha->init_cb_size);
7306
7307 /* Copy 1st segment. */
7308 dptr1 = (uint8_t *)icb;
7309 dptr2 = (uint8_t *)&nv->version;
7310 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7311 while (cnt--)
7312 *dptr1++ = *dptr2++;
7313
7314 icb->login_retry_count = nv->login_retry_count;
7315 icb->link_down_on_nos = nv->link_down_on_nos;
7316
7317 /* Copy 2nd segment. */
7318 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7319 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7320 cnt = (uint8_t *)&icb->reserved_3 -
7321 (uint8_t *)&icb->interrupt_delay_timer;
7322 while (cnt--)
7323 *dptr1++ = *dptr2++;
7324 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7325 /*
7326 * Setup driver NVRAM options.
7327 */
7328 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7329 "QLA2462");
7330
7331 qlt_24xx_config_nvram_stage2(vha, icb);
7332
7333 if (nv->host_p & cpu_to_le32(BIT_15)) {
7334 /* Use alternate WWN? */
7335 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7336 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7337 }
7338
7339 /* Prepare nodename */
7340 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7341 /*
7342 * Firmware will apply the following mask if the nodename was
7343 * not provided.
7344 */
7345 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7346 icb->node_name[0] &= 0xF0;
7347 }
7348
7349 /* Set host adapter parameters. */
7350 ha->flags.disable_risc_code_load = 0;
7351 ha->flags.enable_lip_reset = 0;
7352 ha->flags.enable_lip_full_login =
7353 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7354 ha->flags.enable_target_reset =
7355 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7356 ha->flags.enable_led_scheme = 0;
7357 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7358
7359 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7360 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7361
7362 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7363 sizeof(ha->fw_seriallink_options24));
7364
7365 /* save HBA serial number */
7366 ha->serial0 = icb->port_name[5];
7367 ha->serial1 = icb->port_name[6];
7368 ha->serial2 = icb->port_name[7];
7369 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7370 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7371
7372 icb->execution_throttle = cpu_to_le16(0xFFFF);
7373
7374 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7375
7376 /* Set minimum login_timeout to 4 seconds. */
7377 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7378 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7379 if (le16_to_cpu(nv->login_timeout) < 4)
7380 nv->login_timeout = cpu_to_le16(4);
7381 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7382
7383 /* Set minimum RATOV to 100 tenths of a second. */
7384 ha->r_a_tov = 100;
7385
7386 ha->loop_reset_delay = nv->reset_delay;
7387
7388 /* Link Down Timeout = 0:
7389 *
7390 * When Port Down timer expires we will start returning
7391 * I/O's to OS with "DID_NO_CONNECT".
7392 *
7393 * Link Down Timeout != 0:
7394 *
7395 * The driver waits for the link to come up after link down
7396 * before returning I/Os to OS with "DID_NO_CONNECT".
7397 */
7398 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7399 ha->loop_down_abort_time =
7400 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7401 } else {
7402 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7403 ha->loop_down_abort_time =
7404 (LOOP_DOWN_TIME - ha->link_down_timeout);
7405 }
7406
7407 /* Need enough time to try and get the port back. */
7408 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7409 if (qlport_down_retry)
7410 ha->port_down_retry_count = qlport_down_retry;
7411
7412 /* Set login_retry_count */
7413 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7414 if (ha->port_down_retry_count ==
7415 le16_to_cpu(nv->port_down_retry_count) &&
7416 ha->port_down_retry_count > 3)
7417 ha->login_retry_count = ha->port_down_retry_count;
7418 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7419 ha->login_retry_count = ha->port_down_retry_count;
7420 if (ql2xloginretrycount)
7421 ha->login_retry_count = ql2xloginretrycount;
7422
7423 /* N2N: driver will initiate Login instead of FW */
7424 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
7425
7426 /* Enable ZIO. */
7427 if (!vha->flags.init_done) {
7428 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7429 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7430 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7431 le16_to_cpu(icb->interrupt_delay_timer) : 2;
7432 }
7433 icb->firmware_options_2 &= cpu_to_le32(
7434 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7435 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7436 ha->zio_mode = QLA_ZIO_MODE_6;
7437
7438 ql_log(ql_log_info, vha, 0x006f,
7439 "ZIO mode %d enabled; timer delay (%d us).\n",
7440 ha->zio_mode, ha->zio_timer * 100);
7441
7442 icb->firmware_options_2 |= cpu_to_le32(
7443 (uint32_t)ha->zio_mode);
7444 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7445 }
7446
7447 if (rval) {
7448 ql_log(ql_log_warn, vha, 0x0070,
7449 "NVRAM configuration failed.\n");
7450 }
7451 return (rval);
7452 }
7453
7454 static void
qla27xx_print_image(struct scsi_qla_host * vha,char * name,struct qla27xx_image_status * image_status)7455 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7456 struct qla27xx_image_status *image_status)
7457 {
7458 ql_dbg(ql_dbg_init, vha, 0x018b,
7459 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7460 name, "status",
7461 image_status->image_status_mask,
7462 le16_to_cpu(image_status->generation),
7463 image_status->ver_major,
7464 image_status->ver_minor,
7465 image_status->bitmap,
7466 le32_to_cpu(image_status->checksum),
7467 le32_to_cpu(image_status->signature));
7468 }
7469
7470 static bool
qla28xx_check_aux_image_status_signature(struct qla27xx_image_status * image_status)7471 qla28xx_check_aux_image_status_signature(
7472 struct qla27xx_image_status *image_status)
7473 {
7474 ulong signature = le32_to_cpu(image_status->signature);
7475
7476 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7477 }
7478
7479 static bool
qla27xx_check_image_status_signature(struct qla27xx_image_status * image_status)7480 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7481 {
7482 ulong signature = le32_to_cpu(image_status->signature);
7483
7484 return
7485 signature != QLA27XX_IMG_STATUS_SIGN &&
7486 signature != QLA28XX_IMG_STATUS_SIGN;
7487 }
7488
7489 static ulong
qla27xx_image_status_checksum(struct qla27xx_image_status * image_status)7490 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7491 {
7492 __le32 *p = (__force __le32 *)image_status;
7493 uint n = sizeof(*image_status) / sizeof(*p);
7494 uint32_t sum = 0;
7495
7496 for ( ; n--; p++)
7497 sum += le32_to_cpup(p);
7498
7499 return sum;
7500 }
7501
7502 static inline uint
qla28xx_component_bitmask(struct qla27xx_image_status * aux,uint bitmask)7503 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7504 {
7505 return aux->bitmap & bitmask ?
7506 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7507 }
7508
7509 static void
qla28xx_component_status(struct active_regions * active_regions,struct qla27xx_image_status * aux)7510 qla28xx_component_status(
7511 struct active_regions *active_regions, struct qla27xx_image_status *aux)
7512 {
7513 active_regions->aux.board_config =
7514 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7515
7516 active_regions->aux.vpd_nvram =
7517 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7518
7519 active_regions->aux.npiv_config_0_1 =
7520 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7521
7522 active_regions->aux.npiv_config_2_3 =
7523 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7524 }
7525
7526 static int
qla27xx_compare_image_generation(struct qla27xx_image_status * pri_image_status,struct qla27xx_image_status * sec_image_status)7527 qla27xx_compare_image_generation(
7528 struct qla27xx_image_status *pri_image_status,
7529 struct qla27xx_image_status *sec_image_status)
7530 {
7531 /* calculate generation delta as uint16 (this accounts for wrap) */
7532 int16_t delta =
7533 le16_to_cpu(pri_image_status->generation) -
7534 le16_to_cpu(sec_image_status->generation);
7535
7536 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7537
7538 return delta;
7539 }
7540
7541 void
qla28xx_get_aux_images(struct scsi_qla_host * vha,struct active_regions * active_regions)7542 qla28xx_get_aux_images(
7543 struct scsi_qla_host *vha, struct active_regions *active_regions)
7544 {
7545 struct qla_hw_data *ha = vha->hw;
7546 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7547 bool valid_pri_image = false, valid_sec_image = false;
7548 bool active_pri_image = false, active_sec_image = false;
7549
7550 if (!ha->flt_region_aux_img_status_pri) {
7551 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7552 goto check_sec_image;
7553 }
7554
7555 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
7556 ha->flt_region_aux_img_status_pri,
7557 sizeof(pri_aux_image_status) >> 2);
7558 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7559
7560 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7561 ql_dbg(ql_dbg_init, vha, 0x018b,
7562 "Primary aux image signature (%#x) not valid\n",
7563 le32_to_cpu(pri_aux_image_status.signature));
7564 goto check_sec_image;
7565 }
7566
7567 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7568 ql_dbg(ql_dbg_init, vha, 0x018c,
7569 "Primary aux image checksum failed\n");
7570 goto check_sec_image;
7571 }
7572
7573 valid_pri_image = true;
7574
7575 if (pri_aux_image_status.image_status_mask & 1) {
7576 ql_dbg(ql_dbg_init, vha, 0x018d,
7577 "Primary aux image is active\n");
7578 active_pri_image = true;
7579 }
7580
7581 check_sec_image:
7582 if (!ha->flt_region_aux_img_status_sec) {
7583 ql_dbg(ql_dbg_init, vha, 0x018a,
7584 "Secondary aux image not addressed\n");
7585 goto check_valid_image;
7586 }
7587
7588 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
7589 ha->flt_region_aux_img_status_sec,
7590 sizeof(sec_aux_image_status) >> 2);
7591 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
7592
7593 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
7594 ql_dbg(ql_dbg_init, vha, 0x018b,
7595 "Secondary aux image signature (%#x) not valid\n",
7596 le32_to_cpu(sec_aux_image_status.signature));
7597 goto check_valid_image;
7598 }
7599
7600 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
7601 ql_dbg(ql_dbg_init, vha, 0x018c,
7602 "Secondary aux image checksum failed\n");
7603 goto check_valid_image;
7604 }
7605
7606 valid_sec_image = true;
7607
7608 if (sec_aux_image_status.image_status_mask & 1) {
7609 ql_dbg(ql_dbg_init, vha, 0x018d,
7610 "Secondary aux image is active\n");
7611 active_sec_image = true;
7612 }
7613
7614 check_valid_image:
7615 if (valid_pri_image && active_pri_image &&
7616 valid_sec_image && active_sec_image) {
7617 if (qla27xx_compare_image_generation(&pri_aux_image_status,
7618 &sec_aux_image_status) >= 0) {
7619 qla28xx_component_status(active_regions,
7620 &pri_aux_image_status);
7621 } else {
7622 qla28xx_component_status(active_regions,
7623 &sec_aux_image_status);
7624 }
7625 } else if (valid_pri_image && active_pri_image) {
7626 qla28xx_component_status(active_regions, &pri_aux_image_status);
7627 } else if (valid_sec_image && active_sec_image) {
7628 qla28xx_component_status(active_regions, &sec_aux_image_status);
7629 }
7630
7631 ql_dbg(ql_dbg_init, vha, 0x018f,
7632 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
7633 active_regions->aux.board_config,
7634 active_regions->aux.vpd_nvram,
7635 active_regions->aux.npiv_config_0_1,
7636 active_regions->aux.npiv_config_2_3);
7637 }
7638
7639 void
qla27xx_get_active_image(struct scsi_qla_host * vha,struct active_regions * active_regions)7640 qla27xx_get_active_image(struct scsi_qla_host *vha,
7641 struct active_regions *active_regions)
7642 {
7643 struct qla_hw_data *ha = vha->hw;
7644 struct qla27xx_image_status pri_image_status, sec_image_status;
7645 bool valid_pri_image = false, valid_sec_image = false;
7646 bool active_pri_image = false, active_sec_image = false;
7647
7648 if (!ha->flt_region_img_status_pri) {
7649 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7650 goto check_sec_image;
7651 }
7652
7653 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
7654 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
7655 QLA_SUCCESS) {
7656 WARN_ON_ONCE(true);
7657 goto check_sec_image;
7658 }
7659 qla27xx_print_image(vha, "Primary image", &pri_image_status);
7660
7661 if (qla27xx_check_image_status_signature(&pri_image_status)) {
7662 ql_dbg(ql_dbg_init, vha, 0x018b,
7663 "Primary image signature (%#x) not valid\n",
7664 le32_to_cpu(pri_image_status.signature));
7665 goto check_sec_image;
7666 }
7667
7668 if (qla27xx_image_status_checksum(&pri_image_status)) {
7669 ql_dbg(ql_dbg_init, vha, 0x018c,
7670 "Primary image checksum failed\n");
7671 goto check_sec_image;
7672 }
7673
7674 valid_pri_image = true;
7675
7676 if (pri_image_status.image_status_mask & 1) {
7677 ql_dbg(ql_dbg_init, vha, 0x018d,
7678 "Primary image is active\n");
7679 active_pri_image = true;
7680 }
7681
7682 check_sec_image:
7683 if (!ha->flt_region_img_status_sec) {
7684 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7685 goto check_valid_image;
7686 }
7687
7688 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7689 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
7690 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7691
7692 if (qla27xx_check_image_status_signature(&sec_image_status)) {
7693 ql_dbg(ql_dbg_init, vha, 0x018b,
7694 "Secondary image signature (%#x) not valid\n",
7695 le32_to_cpu(sec_image_status.signature));
7696 goto check_valid_image;
7697 }
7698
7699 if (qla27xx_image_status_checksum(&sec_image_status)) {
7700 ql_dbg(ql_dbg_init, vha, 0x018c,
7701 "Secondary image checksum failed\n");
7702 goto check_valid_image;
7703 }
7704
7705 valid_sec_image = true;
7706
7707 if (sec_image_status.image_status_mask & 1) {
7708 ql_dbg(ql_dbg_init, vha, 0x018d,
7709 "Secondary image is active\n");
7710 active_sec_image = true;
7711 }
7712
7713 check_valid_image:
7714 if (valid_pri_image && active_pri_image)
7715 active_regions->global = QLA27XX_PRIMARY_IMAGE;
7716
7717 if (valid_sec_image && active_sec_image) {
7718 if (!active_regions->global ||
7719 qla27xx_compare_image_generation(
7720 &pri_image_status, &sec_image_status) < 0) {
7721 active_regions->global = QLA27XX_SECONDARY_IMAGE;
7722 }
7723 }
7724
7725 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
7726 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
7727 "default (boot/fw)" :
7728 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
7729 "primary" :
7730 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
7731 "secondary" : "invalid",
7732 active_regions->global);
7733 }
7734
qla24xx_risc_firmware_invalid(uint32_t * dword)7735 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
7736 {
7737 return
7738 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
7739 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
7740 }
7741
7742 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)7743 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7744 uint32_t faddr)
7745 {
7746 int rval;
7747 uint templates, segments, fragment;
7748 ulong i;
7749 uint j;
7750 ulong dlen;
7751 uint32_t *dcode;
7752 uint32_t risc_addr, risc_size, risc_attr = 0;
7753 struct qla_hw_data *ha = vha->hw;
7754 struct req_que *req = ha->req_q_map[0];
7755 struct fwdt *fwdt = ha->fwdt;
7756
7757 ql_dbg(ql_dbg_init, vha, 0x008b,
7758 "FW: Loading firmware from flash (%x).\n", faddr);
7759
7760 dcode = (uint32_t *)req->ring;
7761 qla24xx_read_flash_data(vha, dcode, faddr, 8);
7762 if (qla24xx_risc_firmware_invalid(dcode)) {
7763 ql_log(ql_log_fatal, vha, 0x008c,
7764 "Unable to verify the integrity of flash firmware "
7765 "image.\n");
7766 ql_log(ql_log_fatal, vha, 0x008d,
7767 "Firmware data: %08x %08x %08x %08x.\n",
7768 dcode[0], dcode[1], dcode[2], dcode[3]);
7769
7770 return QLA_FUNCTION_FAILED;
7771 }
7772
7773 dcode = (uint32_t *)req->ring;
7774 *srisc_addr = 0;
7775 segments = FA_RISC_CODE_SEGMENTS;
7776 for (j = 0; j < segments; j++) {
7777 ql_dbg(ql_dbg_init, vha, 0x008d,
7778 "-> Loading segment %u...\n", j);
7779 qla24xx_read_flash_data(vha, dcode, faddr, 10);
7780 risc_addr = be32_to_cpu((__force __be32)dcode[2]);
7781 risc_size = be32_to_cpu((__force __be32)dcode[3]);
7782 if (!*srisc_addr) {
7783 *srisc_addr = risc_addr;
7784 risc_attr = be32_to_cpu((__force __be32)dcode[9]);
7785 }
7786
7787 dlen = ha->fw_transfer_size >> 2;
7788 for (fragment = 0; risc_size; fragment++) {
7789 if (dlen > risc_size)
7790 dlen = risc_size;
7791
7792 ql_dbg(ql_dbg_init, vha, 0x008e,
7793 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
7794 fragment, risc_addr, faddr, dlen);
7795 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7796 for (i = 0; i < dlen; i++)
7797 dcode[i] = swab32(dcode[i]);
7798
7799 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7800 if (rval) {
7801 ql_log(ql_log_fatal, vha, 0x008f,
7802 "-> Failed load firmware fragment %u.\n",
7803 fragment);
7804 return QLA_FUNCTION_FAILED;
7805 }
7806
7807 faddr += dlen;
7808 risc_addr += dlen;
7809 risc_size -= dlen;
7810 }
7811 }
7812
7813 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7814 return QLA_SUCCESS;
7815
7816 templates = (risc_attr & BIT_9) ? 2 : 1;
7817 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
7818 for (j = 0; j < templates; j++, fwdt++) {
7819 if (fwdt->template)
7820 vfree(fwdt->template);
7821 fwdt->template = NULL;
7822 fwdt->length = 0;
7823
7824 dcode = (uint32_t *)req->ring;
7825 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7826 risc_size = be32_to_cpu((__force __be32)dcode[2]);
7827 ql_dbg(ql_dbg_init, vha, 0x0161,
7828 "-> fwdt%u template array at %#x (%#x dwords)\n",
7829 j, faddr, risc_size);
7830 if (!risc_size || !~risc_size) {
7831 ql_dbg(ql_dbg_init, vha, 0x0162,
7832 "-> fwdt%u failed to read array\n", j);
7833 goto failed;
7834 }
7835
7836 /* skip header and ignore checksum */
7837 faddr += 7;
7838 risc_size -= 8;
7839
7840 ql_dbg(ql_dbg_init, vha, 0x0163,
7841 "-> fwdt%u template allocate template %#x words...\n",
7842 j, risc_size);
7843 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7844 if (!fwdt->template) {
7845 ql_log(ql_log_warn, vha, 0x0164,
7846 "-> fwdt%u failed allocate template.\n", j);
7847 goto failed;
7848 }
7849
7850 dcode = fwdt->template;
7851 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7852
7853 if (!qla27xx_fwdt_template_valid(dcode)) {
7854 ql_log(ql_log_warn, vha, 0x0165,
7855 "-> fwdt%u failed template validate\n", j);
7856 goto failed;
7857 }
7858
7859 dlen = qla27xx_fwdt_template_size(dcode);
7860 ql_dbg(ql_dbg_init, vha, 0x0166,
7861 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
7862 j, dlen, dlen / sizeof(*dcode));
7863 if (dlen > risc_size * sizeof(*dcode)) {
7864 ql_log(ql_log_warn, vha, 0x0167,
7865 "-> fwdt%u template exceeds array (%-lu bytes)\n",
7866 j, dlen - risc_size * sizeof(*dcode));
7867 goto failed;
7868 }
7869
7870 fwdt->length = dlen;
7871 ql_dbg(ql_dbg_init, vha, 0x0168,
7872 "-> fwdt%u loaded template ok\n", j);
7873
7874 faddr += risc_size + 1;
7875 }
7876
7877 return QLA_SUCCESS;
7878
7879 failed:
7880 if (fwdt->template)
7881 vfree(fwdt->template);
7882 fwdt->template = NULL;
7883 fwdt->length = 0;
7884
7885 return QLA_SUCCESS;
7886 }
7887
7888 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7889
7890 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)7891 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7892 {
7893 int rval;
7894 int i, fragment;
7895 uint16_t *wcode;
7896 __be16 *fwcode;
7897 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7898 struct fw_blob *blob;
7899 struct qla_hw_data *ha = vha->hw;
7900 struct req_que *req = ha->req_q_map[0];
7901
7902 /* Load firmware blob. */
7903 blob = qla2x00_request_firmware(vha);
7904 if (!blob) {
7905 ql_log(ql_log_info, vha, 0x0083,
7906 "Firmware image unavailable.\n");
7907 ql_log(ql_log_info, vha, 0x0084,
7908 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7909 return QLA_FUNCTION_FAILED;
7910 }
7911
7912 rval = QLA_SUCCESS;
7913
7914 wcode = (uint16_t *)req->ring;
7915 *srisc_addr = 0;
7916 fwcode = (__force __be16 *)blob->fw->data;
7917 fwclen = 0;
7918
7919 /* Validate firmware image by checking version. */
7920 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7921 ql_log(ql_log_fatal, vha, 0x0085,
7922 "Unable to verify integrity of firmware image (%zd).\n",
7923 blob->fw->size);
7924 goto fail_fw_integrity;
7925 }
7926 for (i = 0; i < 4; i++)
7927 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7928 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7929 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7930 wcode[2] == 0 && wcode[3] == 0)) {
7931 ql_log(ql_log_fatal, vha, 0x0086,
7932 "Unable to verify integrity of firmware image.\n");
7933 ql_log(ql_log_fatal, vha, 0x0087,
7934 "Firmware data: %04x %04x %04x %04x.\n",
7935 wcode[0], wcode[1], wcode[2], wcode[3]);
7936 goto fail_fw_integrity;
7937 }
7938
7939 seg = blob->segs;
7940 while (*seg && rval == QLA_SUCCESS) {
7941 risc_addr = *seg;
7942 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7943 risc_size = be16_to_cpu(fwcode[3]);
7944
7945 /* Validate firmware image size. */
7946 fwclen += risc_size * sizeof(uint16_t);
7947 if (blob->fw->size < fwclen) {
7948 ql_log(ql_log_fatal, vha, 0x0088,
7949 "Unable to verify integrity of firmware image "
7950 "(%zd).\n", blob->fw->size);
7951 goto fail_fw_integrity;
7952 }
7953
7954 fragment = 0;
7955 while (risc_size > 0 && rval == QLA_SUCCESS) {
7956 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7957 if (wlen > risc_size)
7958 wlen = risc_size;
7959 ql_dbg(ql_dbg_init, vha, 0x0089,
7960 "Loading risc segment@ risc addr %x number of "
7961 "words 0x%x.\n", risc_addr, wlen);
7962
7963 for (i = 0; i < wlen; i++)
7964 wcode[i] = swab16((__force u32)fwcode[i]);
7965
7966 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7967 wlen);
7968 if (rval) {
7969 ql_log(ql_log_fatal, vha, 0x008a,
7970 "Failed to load segment %d of firmware.\n",
7971 fragment);
7972 break;
7973 }
7974
7975 fwcode += wlen;
7976 risc_addr += wlen;
7977 risc_size -= wlen;
7978 fragment++;
7979 }
7980
7981 /* Next segment. */
7982 seg++;
7983 }
7984 return rval;
7985
7986 fail_fw_integrity:
7987 return QLA_FUNCTION_FAILED;
7988 }
7989
7990 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)7991 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7992 {
7993 int rval;
7994 uint templates, segments, fragment;
7995 uint32_t *dcode;
7996 ulong dlen;
7997 uint32_t risc_addr, risc_size, risc_attr = 0;
7998 ulong i;
7999 uint j;
8000 struct fw_blob *blob;
8001 __be32 *fwcode;
8002 struct qla_hw_data *ha = vha->hw;
8003 struct req_que *req = ha->req_q_map[0];
8004 struct fwdt *fwdt = ha->fwdt;
8005
8006 ql_dbg(ql_dbg_init, vha, 0x0090,
8007 "-> FW: Loading via request-firmware.\n");
8008
8009 blob = qla2x00_request_firmware(vha);
8010 if (!blob) {
8011 ql_log(ql_log_warn, vha, 0x0092,
8012 "-> Firmware file not found.\n");
8013
8014 return QLA_FUNCTION_FAILED;
8015 }
8016
8017 fwcode = (__force __be32 *)blob->fw->data;
8018 dcode = (__force uint32_t *)fwcode;
8019 if (qla24xx_risc_firmware_invalid(dcode)) {
8020 ql_log(ql_log_fatal, vha, 0x0093,
8021 "Unable to verify integrity of firmware image (%zd).\n",
8022 blob->fw->size);
8023 ql_log(ql_log_fatal, vha, 0x0095,
8024 "Firmware data: %08x %08x %08x %08x.\n",
8025 dcode[0], dcode[1], dcode[2], dcode[3]);
8026 return QLA_FUNCTION_FAILED;
8027 }
8028
8029 dcode = (uint32_t *)req->ring;
8030 *srisc_addr = 0;
8031 segments = FA_RISC_CODE_SEGMENTS;
8032 for (j = 0; j < segments; j++) {
8033 ql_dbg(ql_dbg_init, vha, 0x0096,
8034 "-> Loading segment %u...\n", j);
8035 risc_addr = be32_to_cpu(fwcode[2]);
8036 risc_size = be32_to_cpu(fwcode[3]);
8037
8038 if (!*srisc_addr) {
8039 *srisc_addr = risc_addr;
8040 risc_attr = be32_to_cpu(fwcode[9]);
8041 }
8042
8043 dlen = ha->fw_transfer_size >> 2;
8044 for (fragment = 0; risc_size; fragment++) {
8045 if (dlen > risc_size)
8046 dlen = risc_size;
8047
8048 ql_dbg(ql_dbg_init, vha, 0x0097,
8049 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8050 fragment, risc_addr,
8051 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8052 dlen);
8053
8054 for (i = 0; i < dlen; i++)
8055 dcode[i] = swab32((__force u32)fwcode[i]);
8056
8057 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8058 if (rval) {
8059 ql_log(ql_log_fatal, vha, 0x0098,
8060 "-> Failed load firmware fragment %u.\n",
8061 fragment);
8062 return QLA_FUNCTION_FAILED;
8063 }
8064
8065 fwcode += dlen;
8066 risc_addr += dlen;
8067 risc_size -= dlen;
8068 }
8069 }
8070
8071 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8072 return QLA_SUCCESS;
8073
8074 templates = (risc_attr & BIT_9) ? 2 : 1;
8075 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
8076 for (j = 0; j < templates; j++, fwdt++) {
8077 if (fwdt->template)
8078 vfree(fwdt->template);
8079 fwdt->template = NULL;
8080 fwdt->length = 0;
8081
8082 risc_size = be32_to_cpu(fwcode[2]);
8083 ql_dbg(ql_dbg_init, vha, 0x0171,
8084 "-> fwdt%u template array at %#x (%#x dwords)\n",
8085 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8086 risc_size);
8087 if (!risc_size || !~risc_size) {
8088 ql_dbg(ql_dbg_init, vha, 0x0172,
8089 "-> fwdt%u failed to read array\n", j);
8090 goto failed;
8091 }
8092
8093 /* skip header and ignore checksum */
8094 fwcode += 7;
8095 risc_size -= 8;
8096
8097 ql_dbg(ql_dbg_init, vha, 0x0173,
8098 "-> fwdt%u template allocate template %#x words...\n",
8099 j, risc_size);
8100 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8101 if (!fwdt->template) {
8102 ql_log(ql_log_warn, vha, 0x0174,
8103 "-> fwdt%u failed allocate template.\n", j);
8104 goto failed;
8105 }
8106
8107 dcode = fwdt->template;
8108 for (i = 0; i < risc_size; i++)
8109 dcode[i] = (__force u32)fwcode[i];
8110
8111 if (!qla27xx_fwdt_template_valid(dcode)) {
8112 ql_log(ql_log_warn, vha, 0x0175,
8113 "-> fwdt%u failed template validate\n", j);
8114 goto failed;
8115 }
8116
8117 dlen = qla27xx_fwdt_template_size(dcode);
8118 ql_dbg(ql_dbg_init, vha, 0x0176,
8119 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8120 j, dlen, dlen / sizeof(*dcode));
8121 if (dlen > risc_size * sizeof(*dcode)) {
8122 ql_log(ql_log_warn, vha, 0x0177,
8123 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8124 j, dlen - risc_size * sizeof(*dcode));
8125 goto failed;
8126 }
8127
8128 fwdt->length = dlen;
8129 ql_dbg(ql_dbg_init, vha, 0x0178,
8130 "-> fwdt%u loaded template ok\n", j);
8131
8132 fwcode += risc_size + 1;
8133 }
8134
8135 return QLA_SUCCESS;
8136
8137 failed:
8138 if (fwdt->template)
8139 vfree(fwdt->template);
8140 fwdt->template = NULL;
8141 fwdt->length = 0;
8142
8143 return QLA_SUCCESS;
8144 }
8145
8146 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8147 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8148 {
8149 int rval;
8150
8151 if (ql2xfwloadbin == 1)
8152 return qla81xx_load_risc(vha, srisc_addr);
8153
8154 /*
8155 * FW Load priority:
8156 * 1) Firmware via request-firmware interface (.bin file).
8157 * 2) Firmware residing in flash.
8158 */
8159 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8160 if (rval == QLA_SUCCESS)
8161 return rval;
8162
8163 return qla24xx_load_risc_flash(vha, srisc_addr,
8164 vha->hw->flt_region_fw);
8165 }
8166
8167 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8168 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8169 {
8170 int rval;
8171 struct qla_hw_data *ha = vha->hw;
8172 struct active_regions active_regions = { };
8173
8174 if (ql2xfwloadbin == 2)
8175 goto try_blob_fw;
8176
8177 /* FW Load priority:
8178 * 1) Firmware residing in flash.
8179 * 2) Firmware via request-firmware interface (.bin file).
8180 * 3) Golden-Firmware residing in flash -- (limited operation).
8181 */
8182
8183 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8184 goto try_primary_fw;
8185
8186 qla27xx_get_active_image(vha, &active_regions);
8187
8188 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8189 goto try_primary_fw;
8190
8191 ql_dbg(ql_dbg_init, vha, 0x008b,
8192 "Loading secondary firmware image.\n");
8193 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8194 if (!rval)
8195 return rval;
8196
8197 try_primary_fw:
8198 ql_dbg(ql_dbg_init, vha, 0x008b,
8199 "Loading primary firmware image.\n");
8200 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8201 if (!rval)
8202 return rval;
8203
8204 try_blob_fw:
8205 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8206 if (!rval || !ha->flt_region_gold_fw)
8207 return rval;
8208
8209 ql_log(ql_log_info, vha, 0x0099,
8210 "Attempting to fallback to golden firmware.\n");
8211 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8212 if (rval)
8213 return rval;
8214
8215 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8216 ha->flags.running_gold_fw = 1;
8217 return rval;
8218 }
8219
8220 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)8221 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8222 {
8223 int ret, retries;
8224 struct qla_hw_data *ha = vha->hw;
8225
8226 if (ha->flags.pci_channel_io_perm_failure)
8227 return;
8228 if (!IS_FWI2_CAPABLE(ha))
8229 return;
8230 if (!ha->fw_major_version)
8231 return;
8232 if (!ha->flags.fw_started)
8233 return;
8234
8235 ret = qla2x00_stop_firmware(vha);
8236 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8237 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8238 ha->isp_ops->reset_chip(vha);
8239 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8240 continue;
8241 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8242 continue;
8243 ql_log(ql_log_info, vha, 0x8015,
8244 "Attempting retry of stop-firmware command.\n");
8245 ret = qla2x00_stop_firmware(vha);
8246 }
8247
8248 QLA_FW_STOPPED(ha);
8249 ha->flags.fw_init_done = 0;
8250 }
8251
8252 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)8253 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8254 {
8255 int rval = QLA_SUCCESS;
8256 int rval2;
8257 uint16_t mb[MAILBOX_REGISTER_COUNT];
8258 struct qla_hw_data *ha = vha->hw;
8259 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8260
8261 if (!vha->vp_idx)
8262 return -EINVAL;
8263
8264 rval = qla2x00_fw_ready(base_vha);
8265
8266 if (rval == QLA_SUCCESS) {
8267 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8268 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8269 }
8270
8271 vha->flags.management_server_logged_in = 0;
8272
8273 /* Login to SNS first */
8274 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8275 BIT_1);
8276 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8277 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8278 ql_dbg(ql_dbg_init, vha, 0x0120,
8279 "Failed SNS login: loop_id=%x, rval2=%d\n",
8280 NPH_SNS, rval2);
8281 else
8282 ql_dbg(ql_dbg_init, vha, 0x0103,
8283 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8284 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8285 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8286 return (QLA_FUNCTION_FAILED);
8287 }
8288
8289 atomic_set(&vha->loop_down_timer, 0);
8290 atomic_set(&vha->loop_state, LOOP_UP);
8291 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8292 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8293 rval = qla2x00_loop_resync(base_vha);
8294
8295 return rval;
8296 }
8297
8298 /* 84XX Support **************************************************************/
8299
8300 static LIST_HEAD(qla_cs84xx_list);
8301 static DEFINE_MUTEX(qla_cs84xx_mutex);
8302
8303 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)8304 qla84xx_get_chip(struct scsi_qla_host *vha)
8305 {
8306 struct qla_chip_state_84xx *cs84xx;
8307 struct qla_hw_data *ha = vha->hw;
8308
8309 mutex_lock(&qla_cs84xx_mutex);
8310
8311 /* Find any shared 84xx chip. */
8312 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8313 if (cs84xx->bus == ha->pdev->bus) {
8314 kref_get(&cs84xx->kref);
8315 goto done;
8316 }
8317 }
8318
8319 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8320 if (!cs84xx)
8321 goto done;
8322
8323 kref_init(&cs84xx->kref);
8324 spin_lock_init(&cs84xx->access_lock);
8325 mutex_init(&cs84xx->fw_update_mutex);
8326 cs84xx->bus = ha->pdev->bus;
8327
8328 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8329 done:
8330 mutex_unlock(&qla_cs84xx_mutex);
8331 return cs84xx;
8332 }
8333
8334 static void
__qla84xx_chip_release(struct kref * kref)8335 __qla84xx_chip_release(struct kref *kref)
8336 {
8337 struct qla_chip_state_84xx *cs84xx =
8338 container_of(kref, struct qla_chip_state_84xx, kref);
8339
8340 mutex_lock(&qla_cs84xx_mutex);
8341 list_del(&cs84xx->list);
8342 mutex_unlock(&qla_cs84xx_mutex);
8343 kfree(cs84xx);
8344 }
8345
8346 void
qla84xx_put_chip(struct scsi_qla_host * vha)8347 qla84xx_put_chip(struct scsi_qla_host *vha)
8348 {
8349 struct qla_hw_data *ha = vha->hw;
8350
8351 if (ha->cs84xx)
8352 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8353 }
8354
8355 static int
qla84xx_init_chip(scsi_qla_host_t * vha)8356 qla84xx_init_chip(scsi_qla_host_t *vha)
8357 {
8358 int rval;
8359 uint16_t status[2];
8360 struct qla_hw_data *ha = vha->hw;
8361
8362 mutex_lock(&ha->cs84xx->fw_update_mutex);
8363
8364 rval = qla84xx_verify_chip(vha, status);
8365
8366 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8367
8368 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8369 QLA_SUCCESS;
8370 }
8371
8372 /* 81XX Support **************************************************************/
8373
8374 int
qla81xx_nvram_config(scsi_qla_host_t * vha)8375 qla81xx_nvram_config(scsi_qla_host_t *vha)
8376 {
8377 int rval;
8378 struct init_cb_81xx *icb;
8379 struct nvram_81xx *nv;
8380 __le32 *dptr;
8381 uint8_t *dptr1, *dptr2;
8382 uint32_t chksum;
8383 uint16_t cnt;
8384 struct qla_hw_data *ha = vha->hw;
8385 uint32_t faddr;
8386 struct active_regions active_regions = { };
8387
8388 rval = QLA_SUCCESS;
8389 icb = (struct init_cb_81xx *)ha->init_cb;
8390 nv = ha->nvram;
8391
8392 /* Determine NVRAM starting address. */
8393 ha->nvram_size = sizeof(*nv);
8394 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8395 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8396 ha->vpd_size = FA_VPD_SIZE_82XX;
8397
8398 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8399 qla28xx_get_aux_images(vha, &active_regions);
8400
8401 /* Get VPD data into cache */
8402 ha->vpd = ha->nvram + VPD_OFFSET;
8403
8404 faddr = ha->flt_region_vpd;
8405 if (IS_QLA28XX(ha)) {
8406 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8407 faddr = ha->flt_region_vpd_sec;
8408 ql_dbg(ql_dbg_init, vha, 0x0110,
8409 "Loading %s nvram image.\n",
8410 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8411 "primary" : "secondary");
8412 }
8413 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8414
8415 /* Get NVRAM data into cache and calculate checksum. */
8416 faddr = ha->flt_region_nvram;
8417 if (IS_QLA28XX(ha)) {
8418 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8419 faddr = ha->flt_region_nvram_sec;
8420 }
8421 ql_dbg(ql_dbg_init, vha, 0x0110,
8422 "Loading %s nvram image.\n",
8423 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8424 "primary" : "secondary");
8425 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
8426
8427 dptr = (__force __le32 *)nv;
8428 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8429 chksum += le32_to_cpu(*dptr);
8430
8431 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8432 "Contents of NVRAM:\n");
8433 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8434 nv, ha->nvram_size);
8435
8436 /* Bad NVRAM data, set defaults parameters. */
8437 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8438 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8439 /* Reset NVRAM data. */
8440 ql_log(ql_log_info, vha, 0x0073,
8441 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8442 chksum, nv->id, le16_to_cpu(nv->nvram_version));
8443 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8444 ql_log(ql_log_info, vha, 0x0074,
8445 "Falling back to functioning (yet invalid -- WWPN) "
8446 "defaults.\n");
8447
8448 /*
8449 * Set default initialization control block.
8450 */
8451 memset(nv, 0, ha->nvram_size);
8452 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8453 nv->version = cpu_to_le16(ICB_VERSION);
8454 nv->frame_payload_size = cpu_to_le16(2048);
8455 nv->execution_throttle = cpu_to_le16(0xFFFF);
8456 nv->exchange_count = cpu_to_le16(0);
8457 nv->port_name[0] = 0x21;
8458 nv->port_name[1] = 0x00 + ha->port_no + 1;
8459 nv->port_name[2] = 0x00;
8460 nv->port_name[3] = 0xe0;
8461 nv->port_name[4] = 0x8b;
8462 nv->port_name[5] = 0x1c;
8463 nv->port_name[6] = 0x55;
8464 nv->port_name[7] = 0x86;
8465 nv->node_name[0] = 0x20;
8466 nv->node_name[1] = 0x00;
8467 nv->node_name[2] = 0x00;
8468 nv->node_name[3] = 0xe0;
8469 nv->node_name[4] = 0x8b;
8470 nv->node_name[5] = 0x1c;
8471 nv->node_name[6] = 0x55;
8472 nv->node_name[7] = 0x86;
8473 nv->login_retry_count = cpu_to_le16(8);
8474 nv->interrupt_delay_timer = cpu_to_le16(0);
8475 nv->login_timeout = cpu_to_le16(0);
8476 nv->firmware_options_1 =
8477 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8478 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8479 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8480 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8481 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8482 nv->efi_parameters = cpu_to_le32(0);
8483 nv->reset_delay = 5;
8484 nv->max_luns_per_target = cpu_to_le16(128);
8485 nv->port_down_retry_count = cpu_to_le16(30);
8486 nv->link_down_timeout = cpu_to_le16(180);
8487 nv->enode_mac[0] = 0x00;
8488 nv->enode_mac[1] = 0xC0;
8489 nv->enode_mac[2] = 0xDD;
8490 nv->enode_mac[3] = 0x04;
8491 nv->enode_mac[4] = 0x05;
8492 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8493
8494 rval = 1;
8495 }
8496
8497 if (IS_T10_PI_CAPABLE(ha))
8498 nv->frame_payload_size &= cpu_to_le16(~7);
8499
8500 qlt_81xx_config_nvram_stage1(vha, nv);
8501
8502 /* Reset Initialization control block */
8503 memset(icb, 0, ha->init_cb_size);
8504
8505 /* Copy 1st segment. */
8506 dptr1 = (uint8_t *)icb;
8507 dptr2 = (uint8_t *)&nv->version;
8508 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8509 while (cnt--)
8510 *dptr1++ = *dptr2++;
8511
8512 icb->login_retry_count = nv->login_retry_count;
8513
8514 /* Copy 2nd segment. */
8515 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8516 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8517 cnt = (uint8_t *)&icb->reserved_5 -
8518 (uint8_t *)&icb->interrupt_delay_timer;
8519 while (cnt--)
8520 *dptr1++ = *dptr2++;
8521
8522 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8523 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8524 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8525 icb->enode_mac[0] = 0x00;
8526 icb->enode_mac[1] = 0xC0;
8527 icb->enode_mac[2] = 0xDD;
8528 icb->enode_mac[3] = 0x04;
8529 icb->enode_mac[4] = 0x05;
8530 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8531 }
8532
8533 /* Use extended-initialization control block. */
8534 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8535 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8536 /*
8537 * Setup driver NVRAM options.
8538 */
8539 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8540 "QLE8XXX");
8541
8542 qlt_81xx_config_nvram_stage2(vha, icb);
8543
8544 /* Use alternate WWN? */
8545 if (nv->host_p & cpu_to_le32(BIT_15)) {
8546 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8547 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8548 }
8549
8550 /* Prepare nodename */
8551 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8552 /*
8553 * Firmware will apply the following mask if the nodename was
8554 * not provided.
8555 */
8556 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8557 icb->node_name[0] &= 0xF0;
8558 }
8559
8560 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
8561 if ((nv->enhanced_features & BIT_7) == 0)
8562 ha->flags.scm_supported_a = 1;
8563 }
8564
8565 /* Set host adapter parameters. */
8566 ha->flags.disable_risc_code_load = 0;
8567 ha->flags.enable_lip_reset = 0;
8568 ha->flags.enable_lip_full_login =
8569 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8570 ha->flags.enable_target_reset =
8571 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8572 ha->flags.enable_led_scheme = 0;
8573 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8574
8575 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8576 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8577
8578 /* save HBA serial number */
8579 ha->serial0 = icb->port_name[5];
8580 ha->serial1 = icb->port_name[6];
8581 ha->serial2 = icb->port_name[7];
8582 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8583 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8584
8585 icb->execution_throttle = cpu_to_le16(0xFFFF);
8586
8587 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8588
8589 /* Set minimum login_timeout to 4 seconds. */
8590 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8591 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8592 if (le16_to_cpu(nv->login_timeout) < 4)
8593 nv->login_timeout = cpu_to_le16(4);
8594 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8595
8596 /* Set minimum RATOV to 100 tenths of a second. */
8597 ha->r_a_tov = 100;
8598
8599 ha->loop_reset_delay = nv->reset_delay;
8600
8601 /* Link Down Timeout = 0:
8602 *
8603 * When Port Down timer expires we will start returning
8604 * I/O's to OS with "DID_NO_CONNECT".
8605 *
8606 * Link Down Timeout != 0:
8607 *
8608 * The driver waits for the link to come up after link down
8609 * before returning I/Os to OS with "DID_NO_CONNECT".
8610 */
8611 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8612 ha->loop_down_abort_time =
8613 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8614 } else {
8615 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8616 ha->loop_down_abort_time =
8617 (LOOP_DOWN_TIME - ha->link_down_timeout);
8618 }
8619
8620 /* Need enough time to try and get the port back. */
8621 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8622 if (qlport_down_retry)
8623 ha->port_down_retry_count = qlport_down_retry;
8624
8625 /* Set login_retry_count */
8626 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8627 if (ha->port_down_retry_count ==
8628 le16_to_cpu(nv->port_down_retry_count) &&
8629 ha->port_down_retry_count > 3)
8630 ha->login_retry_count = ha->port_down_retry_count;
8631 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8632 ha->login_retry_count = ha->port_down_retry_count;
8633 if (ql2xloginretrycount)
8634 ha->login_retry_count = ql2xloginretrycount;
8635
8636 /* if not running MSI-X we need handshaking on interrupts */
8637 if (!vha->hw->flags.msix_enabled &&
8638 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
8639 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8640
8641 /* Enable ZIO. */
8642 if (!vha->flags.init_done) {
8643 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8644 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8645 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8646 le16_to_cpu(icb->interrupt_delay_timer) : 2;
8647 }
8648 icb->firmware_options_2 &= cpu_to_le32(
8649 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8650 vha->flags.process_response_queue = 0;
8651 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8652 ha->zio_mode = QLA_ZIO_MODE_6;
8653
8654 ql_log(ql_log_info, vha, 0x0075,
8655 "ZIO mode %d enabled; timer delay (%d us).\n",
8656 ha->zio_mode,
8657 ha->zio_timer * 100);
8658
8659 icb->firmware_options_2 |= cpu_to_le32(
8660 (uint32_t)ha->zio_mode);
8661 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8662 vha->flags.process_response_queue = 1;
8663 }
8664
8665 /* enable RIDA Format2 */
8666 icb->firmware_options_3 |= cpu_to_le32(BIT_0);
8667
8668 /* N2N: driver will initiate Login instead of FW */
8669 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
8670
8671 /* Determine NVMe/FCP priority for target ports */
8672 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
8673
8674 if (rval) {
8675 ql_log(ql_log_warn, vha, 0x0076,
8676 "NVRAM configuration failed.\n");
8677 }
8678 return (rval);
8679 }
8680
8681 int
qla82xx_restart_isp(scsi_qla_host_t * vha)8682 qla82xx_restart_isp(scsi_qla_host_t *vha)
8683 {
8684 int status, rval;
8685 struct qla_hw_data *ha = vha->hw;
8686 struct scsi_qla_host *vp;
8687 unsigned long flags;
8688
8689 status = qla2x00_init_rings(vha);
8690 if (!status) {
8691 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8692 ha->flags.chip_reset_done = 1;
8693
8694 status = qla2x00_fw_ready(vha);
8695 if (!status) {
8696 /* Issue a marker after FW becomes ready. */
8697 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8698 vha->flags.online = 1;
8699 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8700 }
8701
8702 /* if no cable then assume it's good */
8703 if ((vha->device_flags & DFLG_NO_CABLE))
8704 status = 0;
8705 }
8706
8707 if (!status) {
8708 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8709
8710 if (!atomic_read(&vha->loop_down_timer)) {
8711 /*
8712 * Issue marker command only when we are going
8713 * to start the I/O .
8714 */
8715 vha->marker_needed = 1;
8716 }
8717
8718 ha->isp_ops->enable_intrs(ha);
8719
8720 ha->isp_abort_cnt = 0;
8721 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8722
8723 /* Update the firmware version */
8724 status = qla82xx_check_md_needed(vha);
8725
8726 if (ha->fce) {
8727 ha->flags.fce_enabled = 1;
8728 memset(ha->fce, 0,
8729 fce_calc_size(ha->fce_bufs));
8730 rval = qla2x00_enable_fce_trace(vha,
8731 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8732 &ha->fce_bufs);
8733 if (rval) {
8734 ql_log(ql_log_warn, vha, 0x8001,
8735 "Unable to reinitialize FCE (%d).\n",
8736 rval);
8737 ha->flags.fce_enabled = 0;
8738 }
8739 }
8740
8741 if (ha->eft) {
8742 memset(ha->eft, 0, EFT_SIZE);
8743 rval = qla2x00_enable_eft_trace(vha,
8744 ha->eft_dma, EFT_NUM_BUFFERS);
8745 if (rval) {
8746 ql_log(ql_log_warn, vha, 0x8010,
8747 "Unable to reinitialize EFT (%d).\n",
8748 rval);
8749 }
8750 }
8751 }
8752
8753 if (!status) {
8754 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8755 "qla82xx_restart_isp succeeded.\n");
8756
8757 spin_lock_irqsave(&ha->vport_slock, flags);
8758 list_for_each_entry(vp, &ha->vp_list, list) {
8759 if (vp->vp_idx) {
8760 atomic_inc(&vp->vref_count);
8761 spin_unlock_irqrestore(&ha->vport_slock, flags);
8762
8763 qla2x00_vp_abort_isp(vp);
8764
8765 spin_lock_irqsave(&ha->vport_slock, flags);
8766 atomic_dec(&vp->vref_count);
8767 }
8768 }
8769 spin_unlock_irqrestore(&ha->vport_slock, flags);
8770
8771 } else {
8772 ql_log(ql_log_warn, vha, 0x8016,
8773 "qla82xx_restart_isp **** FAILED ****.\n");
8774 }
8775
8776 return status;
8777 }
8778
8779 /*
8780 * qla24xx_get_fcp_prio
8781 * Gets the fcp cmd priority value for the logged in port.
8782 * Looks for a match of the port descriptors within
8783 * each of the fcp prio config entries. If a match is found,
8784 * the tag (priority) value is returned.
8785 *
8786 * Input:
8787 * vha = scsi host structure pointer.
8788 * fcport = port structure pointer.
8789 *
8790 * Return:
8791 * non-zero (if found)
8792 * -1 (if not found)
8793 *
8794 * Context:
8795 * Kernel context
8796 */
8797 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8798 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8799 {
8800 int i, entries;
8801 uint8_t pid_match, wwn_match;
8802 int priority;
8803 uint32_t pid1, pid2;
8804 uint64_t wwn1, wwn2;
8805 struct qla_fcp_prio_entry *pri_entry;
8806 struct qla_hw_data *ha = vha->hw;
8807
8808 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8809 return -1;
8810
8811 priority = -1;
8812 entries = ha->fcp_prio_cfg->num_entries;
8813 pri_entry = &ha->fcp_prio_cfg->entry[0];
8814
8815 for (i = 0; i < entries; i++) {
8816 pid_match = wwn_match = 0;
8817
8818 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8819 pri_entry++;
8820 continue;
8821 }
8822
8823 /* check source pid for a match */
8824 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8825 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8826 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8827 if (pid1 == INVALID_PORT_ID)
8828 pid_match++;
8829 else if (pid1 == pid2)
8830 pid_match++;
8831 }
8832
8833 /* check destination pid for a match */
8834 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8835 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8836 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8837 if (pid1 == INVALID_PORT_ID)
8838 pid_match++;
8839 else if (pid1 == pid2)
8840 pid_match++;
8841 }
8842
8843 /* check source WWN for a match */
8844 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8845 wwn1 = wwn_to_u64(vha->port_name);
8846 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8847 if (wwn2 == (uint64_t)-1)
8848 wwn_match++;
8849 else if (wwn1 == wwn2)
8850 wwn_match++;
8851 }
8852
8853 /* check destination WWN for a match */
8854 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8855 wwn1 = wwn_to_u64(fcport->port_name);
8856 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8857 if (wwn2 == (uint64_t)-1)
8858 wwn_match++;
8859 else if (wwn1 == wwn2)
8860 wwn_match++;
8861 }
8862
8863 if (pid_match == 2 || wwn_match == 2) {
8864 /* Found a matching entry */
8865 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8866 priority = pri_entry->tag;
8867 break;
8868 }
8869
8870 pri_entry++;
8871 }
8872
8873 return priority;
8874 }
8875
8876 /*
8877 * qla24xx_update_fcport_fcp_prio
8878 * Activates fcp priority for the logged in fc port
8879 *
8880 * Input:
8881 * vha = scsi host structure pointer.
8882 * fcp = port structure pointer.
8883 *
8884 * Return:
8885 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8886 *
8887 * Context:
8888 * Kernel context.
8889 */
8890 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8891 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8892 {
8893 int ret;
8894 int priority;
8895 uint16_t mb[5];
8896
8897 if (fcport->port_type != FCT_TARGET ||
8898 fcport->loop_id == FC_NO_LOOP_ID)
8899 return QLA_FUNCTION_FAILED;
8900
8901 priority = qla24xx_get_fcp_prio(vha, fcport);
8902 if (priority < 0)
8903 return QLA_FUNCTION_FAILED;
8904
8905 if (IS_P3P_TYPE(vha->hw)) {
8906 fcport->fcp_prio = priority & 0xf;
8907 return QLA_SUCCESS;
8908 }
8909
8910 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8911 if (ret == QLA_SUCCESS) {
8912 if (fcport->fcp_prio != priority)
8913 ql_dbg(ql_dbg_user, vha, 0x709e,
8914 "Updated FCP_CMND priority - value=%d loop_id=%d "
8915 "port_id=%02x%02x%02x.\n", priority,
8916 fcport->loop_id, fcport->d_id.b.domain,
8917 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8918 fcport->fcp_prio = priority & 0xf;
8919 } else
8920 ql_dbg(ql_dbg_user, vha, 0x704f,
8921 "Unable to update FCP_CMND priority - ret=0x%x for "
8922 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8923 fcport->d_id.b.domain, fcport->d_id.b.area,
8924 fcport->d_id.b.al_pa);
8925 return ret;
8926 }
8927
8928 /*
8929 * qla24xx_update_all_fcp_prio
8930 * Activates fcp priority for all the logged in ports
8931 *
8932 * Input:
8933 * ha = adapter block pointer.
8934 *
8935 * Return:
8936 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8937 *
8938 * Context:
8939 * Kernel context.
8940 */
8941 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)8942 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8943 {
8944 int ret;
8945 fc_port_t *fcport;
8946
8947 ret = QLA_FUNCTION_FAILED;
8948 /* We need to set priority for all logged in ports */
8949 list_for_each_entry(fcport, &vha->vp_fcports, list)
8950 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8951
8952 return ret;
8953 }
8954
qla2xxx_create_qpair(struct scsi_qla_host * vha,int qos,int vp_idx,bool startqp)8955 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8956 int vp_idx, bool startqp)
8957 {
8958 int rsp_id = 0;
8959 int req_id = 0;
8960 int i;
8961 struct qla_hw_data *ha = vha->hw;
8962 uint16_t qpair_id = 0;
8963 struct qla_qpair *qpair = NULL;
8964 struct qla_msix_entry *msix;
8965
8966 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8967 ql_log(ql_log_warn, vha, 0x00181,
8968 "FW/Driver is not multi-queue capable.\n");
8969 return NULL;
8970 }
8971
8972 if (ql2xmqsupport || ql2xnvmeenable) {
8973 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8974 if (qpair == NULL) {
8975 ql_log(ql_log_warn, vha, 0x0182,
8976 "Failed to allocate memory for queue pair.\n");
8977 return NULL;
8978 }
8979
8980 qpair->hw = vha->hw;
8981 qpair->vha = vha;
8982 qpair->qp_lock_ptr = &qpair->qp_lock;
8983 spin_lock_init(&qpair->qp_lock);
8984 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8985
8986 /* Assign available que pair id */
8987 mutex_lock(&ha->mq_lock);
8988 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
8989 if (ha->num_qpairs >= ha->max_qpairs) {
8990 mutex_unlock(&ha->mq_lock);
8991 ql_log(ql_log_warn, vha, 0x0183,
8992 "No resources to create additional q pair.\n");
8993 goto fail_qid_map;
8994 }
8995 ha->num_qpairs++;
8996 set_bit(qpair_id, ha->qpair_qid_map);
8997 ha->queue_pair_map[qpair_id] = qpair;
8998 qpair->id = qpair_id;
8999 qpair->vp_idx = vp_idx;
9000 qpair->fw_started = ha->flags.fw_started;
9001 INIT_LIST_HEAD(&qpair->hints_list);
9002 qpair->chip_reset = ha->base_qpair->chip_reset;
9003 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9004 qpair->enable_explicit_conf =
9005 ha->base_qpair->enable_explicit_conf;
9006
9007 for (i = 0; i < ha->msix_count; i++) {
9008 msix = &ha->msix_entries[i];
9009 if (msix->in_use)
9010 continue;
9011 qpair->msix = msix;
9012 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9013 "Vector %x selected for qpair\n", msix->vector);
9014 break;
9015 }
9016 if (!qpair->msix) {
9017 ql_log(ql_log_warn, vha, 0x0184,
9018 "Out of MSI-X vectors!.\n");
9019 goto fail_msix;
9020 }
9021
9022 qpair->msix->in_use = 1;
9023 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
9024 qpair->pdev = ha->pdev;
9025 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9026 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9027
9028 mutex_unlock(&ha->mq_lock);
9029
9030 /* Create response queue first */
9031 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9032 if (!rsp_id) {
9033 ql_log(ql_log_warn, vha, 0x0185,
9034 "Failed to create response queue.\n");
9035 goto fail_rsp;
9036 }
9037
9038 qpair->rsp = ha->rsp_q_map[rsp_id];
9039
9040 /* Create request queue */
9041 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9042 startqp);
9043 if (!req_id) {
9044 ql_log(ql_log_warn, vha, 0x0186,
9045 "Failed to create request queue.\n");
9046 goto fail_req;
9047 }
9048
9049 qpair->req = ha->req_q_map[req_id];
9050 qpair->rsp->req = qpair->req;
9051 qpair->rsp->qpair = qpair;
9052 /* init qpair to this cpu. Will adjust at run time. */
9053 qla_cpu_update(qpair, smp_processor_id());
9054
9055 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9056 if (ha->fw_attributes & BIT_4)
9057 qpair->difdix_supported = 1;
9058 }
9059
9060 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9061 if (!qpair->srb_mempool) {
9062 ql_log(ql_log_warn, vha, 0xd036,
9063 "Failed to create srb mempool for qpair %d\n",
9064 qpair->id);
9065 goto fail_mempool;
9066 }
9067
9068 /* Mark as online */
9069 qpair->online = 1;
9070
9071 if (!vha->flags.qpairs_available)
9072 vha->flags.qpairs_available = 1;
9073
9074 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9075 "Request/Response queue pair created, id %d\n",
9076 qpair->id);
9077 ql_dbg(ql_dbg_init, vha, 0x0187,
9078 "Request/Response queue pair created, id %d\n",
9079 qpair->id);
9080 }
9081 return qpair;
9082
9083 fail_mempool:
9084 fail_req:
9085 qla25xx_delete_rsp_que(vha, qpair->rsp);
9086 fail_rsp:
9087 mutex_lock(&ha->mq_lock);
9088 qpair->msix->in_use = 0;
9089 list_del(&qpair->qp_list_elem);
9090 if (list_empty(&vha->qp_list))
9091 vha->flags.qpairs_available = 0;
9092 fail_msix:
9093 ha->queue_pair_map[qpair_id] = NULL;
9094 clear_bit(qpair_id, ha->qpair_qid_map);
9095 ha->num_qpairs--;
9096 mutex_unlock(&ha->mq_lock);
9097 fail_qid_map:
9098 kfree(qpair);
9099 return NULL;
9100 }
9101
qla2xxx_delete_qpair(struct scsi_qla_host * vha,struct qla_qpair * qpair)9102 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9103 {
9104 int ret = QLA_FUNCTION_FAILED;
9105 struct qla_hw_data *ha = qpair->hw;
9106
9107 qpair->delete_in_progress = 1;
9108
9109 ret = qla25xx_delete_req_que(vha, qpair->req);
9110 if (ret != QLA_SUCCESS)
9111 goto fail;
9112
9113 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9114 if (ret != QLA_SUCCESS)
9115 goto fail;
9116
9117 mutex_lock(&ha->mq_lock);
9118 ha->queue_pair_map[qpair->id] = NULL;
9119 clear_bit(qpair->id, ha->qpair_qid_map);
9120 ha->num_qpairs--;
9121 list_del(&qpair->qp_list_elem);
9122 if (list_empty(&vha->qp_list)) {
9123 vha->flags.qpairs_available = 0;
9124 vha->flags.qpairs_req_created = 0;
9125 vha->flags.qpairs_rsp_created = 0;
9126 }
9127 mempool_destroy(qpair->srb_mempool);
9128 kfree(qpair);
9129 mutex_unlock(&ha->mq_lock);
9130
9131 return QLA_SUCCESS;
9132 fail:
9133 return ret;
9134 }
9135