1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2018 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8 /************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13 #ifndef ASIC_REG_PSOC_HBM_PLL_REGS_H_ 14 #define ASIC_REG_PSOC_HBM_PLL_REGS_H_ 15 16 /* 17 ***************************************** 18 * PSOC_HBM_PLL (Prototype: PLL) 19 ***************************************** 20 */ 21 22 #define mmPSOC_HBM_PLL_NR 0xC74100 23 24 #define mmPSOC_HBM_PLL_NF 0xC74104 25 26 #define mmPSOC_HBM_PLL_OD 0xC74108 27 28 #define mmPSOC_HBM_PLL_NB 0xC7410C 29 30 #define mmPSOC_HBM_PLL_CFG 0xC74110 31 32 #define mmPSOC_HBM_PLL_LOSE_MASK 0xC74120 33 34 #define mmPSOC_HBM_PLL_LOCK_INTR 0xC74128 35 36 #define mmPSOC_HBM_PLL_LOCK_BYPASS 0xC7412C 37 38 #define mmPSOC_HBM_PLL_DATA_CHNG 0xC74130 39 40 #define mmPSOC_HBM_PLL_RST 0xC74134 41 42 #define mmPSOC_HBM_PLL_SLIP_WD_CNTR 0xC74150 43 44 #define mmPSOC_HBM_PLL_DIV_FACTOR_0 0xC74200 45 46 #define mmPSOC_HBM_PLL_DIV_FACTOR_1 0xC74204 47 48 #define mmPSOC_HBM_PLL_DIV_FACTOR_2 0xC74208 49 50 #define mmPSOC_HBM_PLL_DIV_FACTOR_3 0xC7420C 51 52 #define mmPSOC_HBM_PLL_DIV_FACTOR_CMD_0 0xC74220 53 54 #define mmPSOC_HBM_PLL_DIV_FACTOR_CMD_1 0xC74224 55 56 #define mmPSOC_HBM_PLL_DIV_FACTOR_CMD_2 0xC74228 57 58 #define mmPSOC_HBM_PLL_DIV_FACTOR_CMD_3 0xC7422C 59 60 #define mmPSOC_HBM_PLL_DIV_SEL_0 0xC74280 61 62 #define mmPSOC_HBM_PLL_DIV_SEL_1 0xC74284 63 64 #define mmPSOC_HBM_PLL_DIV_SEL_2 0xC74288 65 66 #define mmPSOC_HBM_PLL_DIV_SEL_3 0xC7428C 67 68 #define mmPSOC_HBM_PLL_DIV_EN_0 0xC742A0 69 70 #define mmPSOC_HBM_PLL_DIV_EN_1 0xC742A4 71 72 #define mmPSOC_HBM_PLL_DIV_EN_2 0xC742A8 73 74 #define mmPSOC_HBM_PLL_DIV_EN_3 0xC742AC 75 76 #define mmPSOC_HBM_PLL_DIV_FACTOR_BUSY_0 0xC742C0 77 78 #define mmPSOC_HBM_PLL_DIV_FACTOR_BUSY_1 0xC742C4 79 80 #define mmPSOC_HBM_PLL_DIV_FACTOR_BUSY_2 0xC742C8 81 82 #define mmPSOC_HBM_PLL_DIV_FACTOR_BUSY_3 0xC742CC 83 84 #define mmPSOC_HBM_PLL_CLK_GATER 0xC74300 85 86 #define mmPSOC_HBM_PLL_CLK_RLX_0 0xC74310 87 88 #define mmPSOC_HBM_PLL_CLK_RLX_1 0xC74314 89 90 #define mmPSOC_HBM_PLL_CLK_RLX_2 0xC74318 91 92 #define mmPSOC_HBM_PLL_CLK_RLX_3 0xC7431C 93 94 #define mmPSOC_HBM_PLL_REF_CNTR_PERIOD 0xC74400 95 96 #define mmPSOC_HBM_PLL_REF_LOW_THRESHOLD 0xC74410 97 98 #define mmPSOC_HBM_PLL_REF_HIGH_THRESHOLD 0xC74420 99 100 #define mmPSOC_HBM_PLL_PLL_NOT_STABLE 0xC74430 101 102 #define mmPSOC_HBM_PLL_FREQ_CALC_EN 0xC74440 103 104 #define mmPSOC_HBM_PLL_RLX_BITMAP_CFG 0xC74500 105 106 #define mmPSOC_HBM_PLL_RLX_BITMAP_0 0xC74510 107 108 #define mmPSOC_HBM_PLL_RLX_BITMAP_1 0xC74514 109 110 #define mmPSOC_HBM_PLL_RLX_BITMAP_2 0xC74518 111 112 #define mmPSOC_HBM_PLL_RLX_BITMAP_3 0xC7451C 113 114 #endif /* ASIC_REG_PSOC_HBM_PLL_REGS_H_ */ 115