xref: /linux/arch/x86/kvm/vmx/pmu_intel.h (revision cb5573868ea85ddbc74dd9a917acd1e434d21390)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_VMX_PMU_INTEL_H
3 #define  __KVM_X86_VMX_PMU_INTEL_H
4 
5 #include <linux/kvm_host.h>
6 
7 #include "cpuid.h"
8 
vcpu_get_perf_capabilities(struct kvm_vcpu * vcpu)9 static inline u64 vcpu_get_perf_capabilities(struct kvm_vcpu *vcpu)
10 {
11 	if (!guest_cpu_cap_has(vcpu, X86_FEATURE_PDCM))
12 		return 0;
13 
14 	return vcpu->arch.perf_capabilities;
15 }
16 
fw_writes_is_enabled(struct kvm_vcpu * vcpu)17 static inline bool fw_writes_is_enabled(struct kvm_vcpu *vcpu)
18 {
19 	return (vcpu_get_perf_capabilities(vcpu) & PERF_CAP_FW_WRITES) != 0;
20 }
21 
22 bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu);
23 int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu);
24 
25 struct lbr_desc {
26 	/* Basic info about guest LBR records. */
27 	struct x86_pmu_lbr records;
28 
29 	/*
30 	 * Emulate LBR feature via passthrough LBR registers when the
31 	 * per-vcpu guest LBR event is scheduled on the current pcpu.
32 	 *
33 	 * The records may be inaccurate if the host reclaims the LBR.
34 	 */
35 	struct perf_event *event;
36 
37 	/* True if LBRs are marked as not intercepted in the MSR bitmap */
38 	bool msr_passthrough;
39 };
40 
41 extern struct x86_pmu_lbr vmx_lbr_caps;
42 
43 #endif /* __KVM_X86_VMX_PMU_INTEL_H */
44