1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_VMX_NESTED_H
3 #define __KVM_X86_VMX_NESTED_H
4 
5 #include "kvm_cache_regs.h"
6 #include "hyperv.h"
7 #include "vmcs12.h"
8 #include "vmx.h"
9 
10 /*
11  * Status returned by nested_vmx_enter_non_root_mode():
12  */
13 enum nvmx_vmentry_status {
14 	NVMX_VMENTRY_SUCCESS,		/* Entered VMX non-root mode */
15 	NVMX_VMENTRY_VMFAIL,		/* Consistency check VMFail */
16 	NVMX_VMENTRY_VMEXIT,		/* Consistency check VMExit */
17 	NVMX_VMENTRY_KVM_INTERNAL_ERROR,/* KVM internal error */
18 };
19 
20 void vmx_leave_nested(struct kvm_vcpu *vcpu);
21 void nested_vmx_setup_ctls_msrs(struct vmcs_config *vmcs_conf, u32 ept_caps);
22 void nested_vmx_hardware_unsetup(void);
23 __init int nested_vmx_hardware_setup(int (*exit_handlers[])(struct kvm_vcpu *));
24 void nested_vmx_set_vmcs_shadowing_bitmap(void);
25 void nested_vmx_free_vcpu(struct kvm_vcpu *vcpu);
26 enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu,
27 						     bool from_vmentry);
28 bool nested_vmx_reflect_vmexit(struct kvm_vcpu *vcpu);
29 void __nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_exit_reason,
30 			 u32 exit_intr_info, unsigned long exit_qualification,
31 			 u32 exit_insn_len);
32 
nested_vmx_vmexit(struct kvm_vcpu * vcpu,u32 vm_exit_reason,u32 exit_intr_info,unsigned long exit_qualification)33 static inline void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 vm_exit_reason,
34 				     u32 exit_intr_info,
35 				     unsigned long exit_qualification)
36 {
37 	u32 exit_insn_len;
38 
39 	if (to_vmx(vcpu)->fail || vm_exit_reason == -1 ||
40 	    (vm_exit_reason & VMX_EXIT_REASONS_FAILED_VMENTRY))
41 		exit_insn_len = 0;
42 	else
43 		exit_insn_len = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
44 
45 	__nested_vmx_vmexit(vcpu, vm_exit_reason, exit_intr_info,
46 			    exit_qualification, exit_insn_len);
47 }
48 
49 void nested_sync_vmcs12_to_shadow(struct kvm_vcpu *vcpu);
50 int vmx_set_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
51 int vmx_get_vmx_msr(struct nested_vmx_msrs *msrs, u32 msr_index, u64 *pdata);
52 int get_vmx_mem_address(struct kvm_vcpu *vcpu, unsigned long exit_qualification,
53 			u32 vmx_instruction_info, bool wr, int len, gva_t *ret);
54 void nested_mark_vmcs12_pages_dirty(struct kvm_vcpu *vcpu);
55 bool nested_vmx_check_io_bitmaps(struct kvm_vcpu *vcpu, unsigned int port,
56 				 int size);
57 
get_vmcs12(struct kvm_vcpu * vcpu)58 static inline struct vmcs12 *get_vmcs12(struct kvm_vcpu *vcpu)
59 {
60 	lockdep_assert_once(lockdep_is_held(&vcpu->mutex) ||
61 			    !refcount_read(&vcpu->kvm->users_count));
62 
63 	return to_vmx(vcpu)->nested.cached_vmcs12;
64 }
65 
get_shadow_vmcs12(struct kvm_vcpu * vcpu)66 static inline struct vmcs12 *get_shadow_vmcs12(struct kvm_vcpu *vcpu)
67 {
68 	lockdep_assert_once(lockdep_is_held(&vcpu->mutex) ||
69 			    !refcount_read(&vcpu->kvm->users_count));
70 
71 	return to_vmx(vcpu)->nested.cached_shadow_vmcs12;
72 }
73 
74 /*
75  * Note: the same condition is checked against the state provided by userspace
76  * in vmx_set_nested_state; if it is satisfied, the nested state must include
77  * the VMCS12.
78  */
vmx_has_valid_vmcs12(struct kvm_vcpu * vcpu)79 static inline int vmx_has_valid_vmcs12(struct kvm_vcpu *vcpu)
80 {
81 	struct vcpu_vmx *vmx = to_vmx(vcpu);
82 
83 	/* 'hv_evmcs_vmptr' can also be EVMPTR_MAP_PENDING here */
84 	return vmx->nested.current_vmptr != -1ull ||
85 		nested_vmx_is_evmptr12_set(vmx);
86 }
87 
nested_get_vpid02(struct kvm_vcpu * vcpu)88 static inline u16 nested_get_vpid02(struct kvm_vcpu *vcpu)
89 {
90 	struct vcpu_vmx *vmx = to_vmx(vcpu);
91 
92 	return vmx->nested.vpid02 ? vmx->nested.vpid02 : vmx->vpid;
93 }
94 
nested_ept_get_eptp(struct kvm_vcpu * vcpu)95 static inline unsigned long nested_ept_get_eptp(struct kvm_vcpu *vcpu)
96 {
97 	/* return the page table to be shadowed - in our case, EPT12 */
98 	return get_vmcs12(vcpu)->ept_pointer;
99 }
100 
nested_ept_ad_enabled(struct kvm_vcpu * vcpu)101 static inline bool nested_ept_ad_enabled(struct kvm_vcpu *vcpu)
102 {
103 	return nested_ept_get_eptp(vcpu) & VMX_EPTP_AD_ENABLE_BIT;
104 }
105 
106 /*
107  * Return the cr0/4 value that a nested guest would read. This is a combination
108  * of L1's "real" cr0 used to run the guest (guest_cr0), and the bits shadowed
109  * by the L1 hypervisor (cr0_read_shadow).  KVM must emulate CPU behavior as
110  * the value+mask loaded into vmcs02 may not match the vmcs12 fields.
111  */
nested_read_cr0(struct vmcs12 * fields)112 static inline unsigned long nested_read_cr0(struct vmcs12 *fields)
113 {
114 	return (fields->guest_cr0 & ~fields->cr0_guest_host_mask) |
115 		(fields->cr0_read_shadow & fields->cr0_guest_host_mask);
116 }
nested_read_cr4(struct vmcs12 * fields)117 static inline unsigned long nested_read_cr4(struct vmcs12 *fields)
118 {
119 	return (fields->guest_cr4 & ~fields->cr4_guest_host_mask) |
120 		(fields->cr4_read_shadow & fields->cr4_guest_host_mask);
121 }
122 
nested_cpu_vmx_misc_cr3_count(struct kvm_vcpu * vcpu)123 static inline unsigned nested_cpu_vmx_misc_cr3_count(struct kvm_vcpu *vcpu)
124 {
125 	return vmx_misc_cr3_count(to_vmx(vcpu)->nested.msrs.misc_low);
126 }
127 
128 /*
129  * Do the virtual VMX capability MSRs specify that L1 can use VMWRITE
130  * to modify any valid field of the VMCS, or are the VM-exit
131  * information fields read-only?
132  */
nested_cpu_has_vmwrite_any_field(struct kvm_vcpu * vcpu)133 static inline bool nested_cpu_has_vmwrite_any_field(struct kvm_vcpu *vcpu)
134 {
135 	return to_vmx(vcpu)->nested.msrs.misc_low &
136 		VMX_MISC_VMWRITE_SHADOW_RO_FIELDS;
137 }
138 
nested_cpu_has_zero_length_injection(struct kvm_vcpu * vcpu)139 static inline bool nested_cpu_has_zero_length_injection(struct kvm_vcpu *vcpu)
140 {
141 	return to_vmx(vcpu)->nested.msrs.misc_low & VMX_MISC_ZERO_LEN_INS;
142 }
143 
nested_cpu_supports_monitor_trap_flag(struct kvm_vcpu * vcpu)144 static inline bool nested_cpu_supports_monitor_trap_flag(struct kvm_vcpu *vcpu)
145 {
146 	return to_vmx(vcpu)->nested.msrs.procbased_ctls_high &
147 			CPU_BASED_MONITOR_TRAP_FLAG;
148 }
149 
nested_cpu_has_vmx_shadow_vmcs(struct kvm_vcpu * vcpu)150 static inline bool nested_cpu_has_vmx_shadow_vmcs(struct kvm_vcpu *vcpu)
151 {
152 	return to_vmx(vcpu)->nested.msrs.secondary_ctls_high &
153 		SECONDARY_EXEC_SHADOW_VMCS;
154 }
155 
nested_cpu_has(struct vmcs12 * vmcs12,u32 bit)156 static inline bool nested_cpu_has(struct vmcs12 *vmcs12, u32 bit)
157 {
158 	return vmcs12->cpu_based_vm_exec_control & bit;
159 }
160 
nested_cpu_has2(struct vmcs12 * vmcs12,u32 bit)161 static inline bool nested_cpu_has2(struct vmcs12 *vmcs12, u32 bit)
162 {
163 	return (vmcs12->cpu_based_vm_exec_control &
164 			CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) &&
165 		(vmcs12->secondary_vm_exec_control & bit);
166 }
167 
nested_cpu_has_preemption_timer(struct vmcs12 * vmcs12)168 static inline bool nested_cpu_has_preemption_timer(struct vmcs12 *vmcs12)
169 {
170 	return vmcs12->pin_based_vm_exec_control &
171 		PIN_BASED_VMX_PREEMPTION_TIMER;
172 }
173 
nested_cpu_has_nmi_exiting(struct vmcs12 * vmcs12)174 static inline bool nested_cpu_has_nmi_exiting(struct vmcs12 *vmcs12)
175 {
176 	return vmcs12->pin_based_vm_exec_control & PIN_BASED_NMI_EXITING;
177 }
178 
nested_cpu_has_virtual_nmis(struct vmcs12 * vmcs12)179 static inline bool nested_cpu_has_virtual_nmis(struct vmcs12 *vmcs12)
180 {
181 	return vmcs12->pin_based_vm_exec_control & PIN_BASED_VIRTUAL_NMIS;
182 }
183 
nested_cpu_has_mtf(struct vmcs12 * vmcs12)184 static inline int nested_cpu_has_mtf(struct vmcs12 *vmcs12)
185 {
186 	return nested_cpu_has(vmcs12, CPU_BASED_MONITOR_TRAP_FLAG);
187 }
188 
nested_cpu_has_ept(struct vmcs12 * vmcs12)189 static inline int nested_cpu_has_ept(struct vmcs12 *vmcs12)
190 {
191 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_ENABLE_EPT);
192 }
193 
nested_cpu_has_xsaves(struct vmcs12 * vmcs12)194 static inline bool nested_cpu_has_xsaves(struct vmcs12 *vmcs12)
195 {
196 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_ENABLE_XSAVES);
197 }
198 
nested_cpu_has_pml(struct vmcs12 * vmcs12)199 static inline bool nested_cpu_has_pml(struct vmcs12 *vmcs12)
200 {
201 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_ENABLE_PML);
202 }
203 
nested_cpu_has_virt_x2apic_mode(struct vmcs12 * vmcs12)204 static inline bool nested_cpu_has_virt_x2apic_mode(struct vmcs12 *vmcs12)
205 {
206 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE);
207 }
208 
nested_cpu_has_vpid(struct vmcs12 * vmcs12)209 static inline bool nested_cpu_has_vpid(struct vmcs12 *vmcs12)
210 {
211 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_ENABLE_VPID);
212 }
213 
nested_cpu_has_apic_reg_virt(struct vmcs12 * vmcs12)214 static inline bool nested_cpu_has_apic_reg_virt(struct vmcs12 *vmcs12)
215 {
216 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_APIC_REGISTER_VIRT);
217 }
218 
nested_cpu_has_vid(struct vmcs12 * vmcs12)219 static inline bool nested_cpu_has_vid(struct vmcs12 *vmcs12)
220 {
221 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY);
222 }
223 
nested_cpu_has_posted_intr(struct vmcs12 * vmcs12)224 static inline bool nested_cpu_has_posted_intr(struct vmcs12 *vmcs12)
225 {
226 	return vmcs12->pin_based_vm_exec_control & PIN_BASED_POSTED_INTR;
227 }
228 
nested_cpu_has_vmfunc(struct vmcs12 * vmcs12)229 static inline bool nested_cpu_has_vmfunc(struct vmcs12 *vmcs12)
230 {
231 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_ENABLE_VMFUNC);
232 }
233 
nested_cpu_has_eptp_switching(struct vmcs12 * vmcs12)234 static inline bool nested_cpu_has_eptp_switching(struct vmcs12 *vmcs12)
235 {
236 	return nested_cpu_has_vmfunc(vmcs12) &&
237 		(vmcs12->vm_function_control &
238 		 VMX_VMFUNC_EPTP_SWITCHING);
239 }
240 
nested_cpu_has_shadow_vmcs(struct vmcs12 * vmcs12)241 static inline bool nested_cpu_has_shadow_vmcs(struct vmcs12 *vmcs12)
242 {
243 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_SHADOW_VMCS);
244 }
245 
nested_cpu_has_save_preemption_timer(struct vmcs12 * vmcs12)246 static inline bool nested_cpu_has_save_preemption_timer(struct vmcs12 *vmcs12)
247 {
248 	return vmcs12->vm_exit_controls &
249 	    VM_EXIT_SAVE_VMX_PREEMPTION_TIMER;
250 }
251 
nested_exit_on_nmi(struct kvm_vcpu * vcpu)252 static inline bool nested_exit_on_nmi(struct kvm_vcpu *vcpu)
253 {
254 	return nested_cpu_has_nmi_exiting(get_vmcs12(vcpu));
255 }
256 
257 /*
258  * In nested virtualization, check if L1 asked to exit on external interrupts.
259  * For most existing hypervisors, this will always return true.
260  */
nested_exit_on_intr(struct kvm_vcpu * vcpu)261 static inline bool nested_exit_on_intr(struct kvm_vcpu *vcpu)
262 {
263 	return get_vmcs12(vcpu)->pin_based_vm_exec_control &
264 		PIN_BASED_EXT_INTR_MASK;
265 }
266 
nested_cpu_has_encls_exit(struct vmcs12 * vmcs12)267 static inline bool nested_cpu_has_encls_exit(struct vmcs12 *vmcs12)
268 {
269 	return nested_cpu_has2(vmcs12, SECONDARY_EXEC_ENCLS_EXITING);
270 }
271 
272 /*
273  * if fixed0[i] == 1: val[i] must be 1
274  * if fixed1[i] == 0: val[i] must be 0
275  */
fixed_bits_valid(u64 val,u64 fixed0,u64 fixed1)276 static inline bool fixed_bits_valid(u64 val, u64 fixed0, u64 fixed1)
277 {
278 	return ((val & fixed1) | fixed0) == val;
279 }
280 
nested_guest_cr0_valid(struct kvm_vcpu * vcpu,unsigned long val)281 static inline bool nested_guest_cr0_valid(struct kvm_vcpu *vcpu, unsigned long val)
282 {
283 	u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr0_fixed0;
284 	u64 fixed1 = to_vmx(vcpu)->nested.msrs.cr0_fixed1;
285 	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
286 
287 	if (to_vmx(vcpu)->nested.msrs.secondary_ctls_high &
288 		SECONDARY_EXEC_UNRESTRICTED_GUEST &&
289 	    nested_cpu_has2(vmcs12, SECONDARY_EXEC_UNRESTRICTED_GUEST))
290 		fixed0 &= ~(X86_CR0_PE | X86_CR0_PG);
291 
292 	return fixed_bits_valid(val, fixed0, fixed1);
293 }
294 
nested_host_cr0_valid(struct kvm_vcpu * vcpu,unsigned long val)295 static inline bool nested_host_cr0_valid(struct kvm_vcpu *vcpu, unsigned long val)
296 {
297 	u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr0_fixed0;
298 	u64 fixed1 = to_vmx(vcpu)->nested.msrs.cr0_fixed1;
299 
300 	return fixed_bits_valid(val, fixed0, fixed1);
301 }
302 
nested_cr4_valid(struct kvm_vcpu * vcpu,unsigned long val)303 static inline bool nested_cr4_valid(struct kvm_vcpu *vcpu, unsigned long val)
304 {
305 	u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr4_fixed0;
306 	u64 fixed1 = to_vmx(vcpu)->nested.msrs.cr4_fixed1;
307 
308 	return fixed_bits_valid(val, fixed0, fixed1) &&
309 	       __kvm_is_valid_cr4(vcpu, val);
310 }
311 
312 /* No difference in the restrictions on guest and host CR4 in VMX operation. */
313 #define nested_guest_cr4_valid	nested_cr4_valid
314 #define nested_host_cr4_valid	nested_cr4_valid
315 
316 extern struct kvm_x86_nested_ops vmx_nested_ops;
317 
318 #endif /* __KVM_X86_VMX_NESTED_H */
319