1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2015-2017 Google, Inc
4  *
5  * USB Type-C Port Controller Interface.
6  */
7 
8 #ifndef __LINUX_USB_TCPCI_H
9 #define __LINUX_USB_TCPCI_H
10 
11 #include <linux/usb/typec.h>
12 #include <linux/usb/tcpm.h>
13 
14 #define TCPC_VENDOR_ID			0x0
15 #define TCPC_PRODUCT_ID			0x2
16 #define TCPC_BCD_DEV			0x4
17 #define TCPC_TC_REV			0x6
18 #define TCPC_PD_REV			0x8
19 #define TCPC_PD_INT_REV			0xa
20 
21 #define TCPC_ALERT			0x10
22 #define TCPC_ALERT_EXTND		BIT(14)
23 #define TCPC_ALERT_EXTENDED_STATUS	BIT(13)
24 #define TCPC_ALERT_VBUS_DISCNCT		BIT(11)
25 #define TCPC_ALERT_RX_BUF_OVF		BIT(10)
26 #define TCPC_ALERT_FAULT		BIT(9)
27 #define TCPC_ALERT_V_ALARM_LO		BIT(8)
28 #define TCPC_ALERT_V_ALARM_HI		BIT(7)
29 #define TCPC_ALERT_TX_SUCCESS		BIT(6)
30 #define TCPC_ALERT_TX_DISCARDED		BIT(5)
31 #define TCPC_ALERT_TX_FAILED		BIT(4)
32 #define TCPC_ALERT_RX_HARD_RST		BIT(3)
33 #define TCPC_ALERT_RX_STATUS		BIT(2)
34 #define TCPC_ALERT_POWER_STATUS		BIT(1)
35 #define TCPC_ALERT_CC_STATUS		BIT(0)
36 
37 #define TCPC_ALERT_MASK			0x12
38 #define TCPC_POWER_STATUS_MASK		0x14
39 
40 #define TCPC_FAULT_STATUS_MASK			0x15
41 #define TCPC_FAULT_STATUS_MASK_VCONN_OC		BIT(1)
42 
43 #define TCPC_EXTENDED_STATUS_MASK		0x16
44 #define TCPC_EXTENDED_STATUS_MASK_VSAFE0V	BIT(0)
45 
46 #define TCPC_ALERT_EXTENDED_MASK	0x17
47 #define TCPC_SINK_FAST_ROLE_SWAP	BIT(0)
48 
49 #define TCPC_CONFIG_STD_OUTPUT		0x18
50 
51 #define TCPC_TCPC_CTRL			0x19
52 #define TCPC_TCPC_CTRL_ORIENTATION	BIT(0)
53 #define PLUG_ORNT_CC1			0
54 #define PLUG_ORNT_CC2			1
55 #define TCPC_TCPC_CTRL_BIST_TM		BIT(1)
56 #define TCPC_TCPC_CTRL_EN_LK4CONN_ALRT	BIT(6)
57 
58 #define TCPC_EXTENDED_STATUS		0x20
59 #define TCPC_EXTENDED_STATUS_VSAFE0V	BIT(0)
60 
61 #define TCPC_ROLE_CTRL			0x1a
62 #define TCPC_ROLE_CTRL_DRP		BIT(6)
63 #define TCPC_ROLE_CTRL_RP_VAL_SHIFT	4
64 #define TCPC_ROLE_CTRL_RP_VAL_MASK	0x3
65 #define TCPC_ROLE_CTRL_RP_VAL_DEF	0x0
66 #define TCPC_ROLE_CTRL_RP_VAL_1_5	0x1
67 #define TCPC_ROLE_CTRL_RP_VAL_3_0	0x2
68 #define TCPC_ROLE_CTRL_CC2_SHIFT	2
69 #define TCPC_ROLE_CTRL_CC2_MASK		0x3
70 #define TCPC_ROLE_CTRL_CC1_SHIFT	0
71 #define TCPC_ROLE_CTRL_CC1_MASK		0x3
72 #define TCPC_ROLE_CTRL_CC_RA		0x0
73 #define TCPC_ROLE_CTRL_CC_RP		0x1
74 #define TCPC_ROLE_CTRL_CC_RD		0x2
75 #define TCPC_ROLE_CTRL_CC_OPEN		0x3
76 
77 #define TCPC_FAULT_CTRL			0x1b
78 
79 #define TCPC_POWER_CTRL			0x1c
80 #define TCPC_POWER_CTRL_VCONN_ENABLE	BIT(0)
81 #define TCPC_POWER_CTRL_BLEED_DISCHARGE	BIT(3)
82 #define TCPC_POWER_CTRL_AUTO_DISCHARGE	BIT(4)
83 #define TCPC_DIS_VOLT_ALRM		BIT(5)
84 #define TCPC_POWER_CTRL_VBUS_VOLT_MON	BIT(6)
85 #define TCPC_FAST_ROLE_SWAP_EN		BIT(7)
86 
87 #define TCPC_CC_STATUS			0x1d
88 #define TCPC_CC_STATUS_TOGGLING		BIT(5)
89 #define TCPC_CC_STATUS_TERM		BIT(4)
90 #define TCPC_CC_STATUS_TERM_RP		0
91 #define TCPC_CC_STATUS_TERM_RD		1
92 #define TCPC_CC_STATE_SRC_OPEN		0
93 #define TCPC_CC_STATUS_CC2_SHIFT	2
94 #define TCPC_CC_STATUS_CC2_MASK		0x3
95 #define TCPC_CC_STATUS_CC1_SHIFT	0
96 #define TCPC_CC_STATUS_CC1_MASK		0x3
97 
98 #define TCPC_POWER_STATUS		0x1e
99 #define TCPC_POWER_STATUS_DBG_ACC_CON	BIT(7)
100 #define TCPC_POWER_STATUS_UNINIT	BIT(6)
101 #define TCPC_POWER_STATUS_SOURCING_VBUS	BIT(4)
102 #define TCPC_POWER_STATUS_VBUS_DET	BIT(3)
103 #define TCPC_POWER_STATUS_VBUS_PRES	BIT(2)
104 #define TCPC_POWER_STATUS_VCONN_PRES	BIT(1)
105 #define TCPC_POWER_STATUS_SINKING_VBUS	BIT(0)
106 
107 #define TCPC_FAULT_STATUS		0x1f
108 #define TCPC_FAULT_STATUS_ALL_REG_RST_TO_DEFAULT BIT(7)
109 #define TCPC_FAULT_STATUS_VCONN_OC	BIT(1)
110 
111 #define TCPC_ALERT_EXTENDED		0x21
112 
113 #define TCPC_COMMAND			0x23
114 #define TCPC_CMD_WAKE_I2C		0x11
115 #define TCPC_CMD_DISABLE_VBUS_DETECT	0x22
116 #define TCPC_CMD_ENABLE_VBUS_DETECT	0x33
117 #define TCPC_CMD_DISABLE_SINK_VBUS	0x44
118 #define TCPC_CMD_SINK_VBUS		0x55
119 #define TCPC_CMD_DISABLE_SRC_VBUS	0x66
120 #define TCPC_CMD_SRC_VBUS_DEFAULT	0x77
121 #define TCPC_CMD_SRC_VBUS_HIGH		0x88
122 #define TCPC_CMD_LOOK4CONNECTION	0x99
123 #define TCPC_CMD_RXONEMORE		0xAA
124 #define TCPC_CMD_I2C_IDLE		0xFF
125 
126 #define TCPC_DEV_CAP_1			0x24
127 #define TCPC_DEV_CAP_2			0x26
128 #define TCPC_STD_INPUT_CAP		0x28
129 #define TCPC_STD_OUTPUT_CAP		0x29
130 
131 #define TCPC_MSG_HDR_INFO		0x2e
132 #define TCPC_MSG_HDR_INFO_DATA_ROLE	BIT(3)
133 #define TCPC_MSG_HDR_INFO_PWR_ROLE	BIT(0)
134 #define TCPC_MSG_HDR_INFO_REV_SHIFT	1
135 #define TCPC_MSG_HDR_INFO_REV_MASK	0x3
136 
137 #define TCPC_RX_DETECT			0x2f
138 #define TCPC_RX_DETECT_HARD_RESET	BIT(5)
139 #define TCPC_RX_DETECT_SOP		BIT(0)
140 #define TCPC_RX_DETECT_SOP1		BIT(1)
141 #define TCPC_RX_DETECT_SOP2		BIT(2)
142 #define TCPC_RX_DETECT_DBG1		BIT(3)
143 #define TCPC_RX_DETECT_DBG2		BIT(4)
144 
145 #define TCPC_RX_BYTE_CNT		0x30
146 #define TCPC_RX_BUF_FRAME_TYPE		0x31
147 #define TCPC_RX_BUF_FRAME_TYPE_SOP	0
148 #define TCPC_RX_HDR			0x32
149 #define TCPC_RX_DATA			0x34 /* through 0x4f */
150 
151 #define TCPC_TRANSMIT			0x50
152 #define TCPC_TRANSMIT_RETRY_SHIFT	4
153 #define TCPC_TRANSMIT_RETRY_MASK	0x3
154 #define TCPC_TRANSMIT_TYPE_SHIFT	0
155 #define TCPC_TRANSMIT_TYPE_MASK		0x7
156 
157 #define TCPC_TX_BYTE_CNT		0x51
158 #define TCPC_TX_HDR			0x52
159 #define TCPC_TX_DATA			0x54 /* through 0x6f */
160 
161 #define TCPC_VBUS_VOLTAGE			0x70
162 #define TCPC_VBUS_VOLTAGE_MASK			0x3ff
163 #define TCPC_VBUS_VOLTAGE_LSB_MV		25
164 #define TCPC_VBUS_SINK_DISCONNECT_THRESH	0x72
165 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV	25
166 #define TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX	0x3ff
167 #define TCPC_VBUS_STOP_DISCHARGE_THRESH		0x74
168 #define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG		0x76
169 #define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG		0x78
170 
171 /* I2C_WRITE_BYTE_COUNT + 1 when TX_BUF_BYTE_x is only accessible I2C_WRITE_BYTE_COUNT */
172 #define TCPC_TRANSMIT_BUFFER_MAX_LEN		31
173 
174 #define tcpc_presenting_rd(reg, cc) \
175 	(!(TCPC_ROLE_CTRL_DRP & (reg)) && \
176 	 (((reg) & (TCPC_ROLE_CTRL_## cc ##_MASK << TCPC_ROLE_CTRL_## cc ##_SHIFT)) == \
177 	  (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_## cc ##_SHIFT)))
178 
179 struct tcpci;
180 
181 /*
182  * @TX_BUF_BYTE_x_hidden:
183  *		optional; Set when TX_BUF_BYTE_x can only be accessed through I2C_WRITE_BYTE_COUNT.
184  * @frs_sourcing_vbus:
185  *		Optional; Callback to perform chip specific operations when FRS
186  *		is sourcing vbus.
187  * @auto_discharge_disconnect:
188  *		Optional; Enables TCPC to autonously discharge vbus on disconnect.
189  * @vbus_vsafe0v:
190  *		optional; Set when TCPC can detect whether vbus is at VSAFE0V.
191  * @set_partner_usb_comm_capable:
192  *		Optional; The USB Communications Capable bit indicates if port
193  *		partner is capable of communication over the USB data lines
194  *		(e.g. D+/- or SS Tx/Rx). Called to notify the status of the bit.
195  * @check_contaminant:
196  *		Optional; The callback is invoked when chiplevel drivers indicated
197  *		that the USB port needs to be checked for contaminant presence.
198  *		Chip level drivers are expected to check for contaminant and call
199  *		tcpm_clean_port when the port is clean to put the port back into
200  *		toggling state.
201  */
202 struct tcpci_data {
203 	struct regmap *regmap;
204 	unsigned char TX_BUF_BYTE_x_hidden:1;
205 	unsigned char auto_discharge_disconnect:1;
206 	unsigned char vbus_vsafe0v:1;
207 
208 	int (*init)(struct tcpci *tcpci, struct tcpci_data *data);
209 	int (*set_vconn)(struct tcpci *tcpci, struct tcpci_data *data,
210 			 bool enable);
211 	int (*start_drp_toggling)(struct tcpci *tcpci, struct tcpci_data *data,
212 				  enum typec_cc_status cc);
213 	int (*set_vbus)(struct tcpci *tcpci, struct tcpci_data *data, bool source, bool sink);
214 	void (*frs_sourcing_vbus)(struct tcpci *tcpci, struct tcpci_data *data);
215 	void (*set_partner_usb_comm_capable)(struct tcpci *tcpci, struct tcpci_data *data,
216 					     bool capable);
217 	void (*check_contaminant)(struct tcpci *tcpci, struct tcpci_data *data);
218 };
219 
220 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data);
221 void tcpci_unregister_port(struct tcpci *tcpci);
222 irqreturn_t tcpci_irq(struct tcpci *tcpci);
223 
224 struct tcpm_port;
225 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci);
226 
tcpci_to_typec_cc(unsigned int cc,bool sink)227 static inline enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
228 {
229 	switch (cc) {
230 	case 0x1:
231 		return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
232 	case 0x2:
233 		return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
234 	case 0x3:
235 		if (sink)
236 			return TYPEC_CC_RP_3_0;
237 		fallthrough;
238 	case 0x0:
239 	default:
240 		return TYPEC_CC_OPEN;
241 	}
242 }
243 #endif /* __LINUX_USB_TCPCI_H */
244