1 /*
2 * Basic memory-mapped GPIO controllers.
3 *
4 * Copyright 2008 MontaVista Software, Inc.
5 * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13 #ifndef __BASIC_MMIO_GPIO_H
14 #define __BASIC_MMIO_GPIO_H
15
16 #include <linux/gpio.h>
17 #include <linux/types.h>
18 #include <linux/compiler.h>
19 #include <linux/spinlock_types.h>
20
21 struct bgpio_pdata {
22 int base;
23 int ngpio;
24 };
25
26 struct device;
27
28 struct bgpio_chip {
29 struct gpio_chip gc;
30
31 unsigned long (*read_reg)(void __iomem *reg);
32 void (*write_reg)(void __iomem *reg, unsigned long data);
33
34 void __iomem *reg_dat;
35 void __iomem *reg_set;
36 void __iomem *reg_clr;
37 void __iomem *reg_dir;
38
39 /* Number of bits (GPIOs): <register width> * 8. */
40 int bits;
41
42 /*
43 * Some GPIO controllers work with the big-endian bits notation,
44 * e.g. in a 8-bits register, GPIO7 is the least significant bit.
45 */
46 unsigned long (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin);
47
48 /*
49 * Used to lock bgpio_chip->data. Also, this is needed to keep
50 * shadowed and real data registers writes together.
51 */
52 spinlock_t lock;
53
54 /* Shadowed data register to clear/set bits safely. */
55 unsigned long data;
56
57 /* Shadowed direction registers to clear/set direction safely. */
58 unsigned long dir;
59 };
60
to_bgpio_chip(struct gpio_chip * gc)61 static inline struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
62 {
63 return container_of(gc, struct bgpio_chip, gc);
64 }
65
66 int bgpio_remove(struct bgpio_chip *bgc);
67 int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
68 unsigned long sz, void __iomem *dat, void __iomem *set,
69 void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
70 bool big_endian);
71
72 #endif /* __BASIC_MMIO_GPIO_H */
73