1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Type definitions for the Microsoft hypervisor.
4  */
5 #ifndef _HV_HVHDK_H
6 #define _HV_HVHDK_H
7 
8 #include <linux/build_bug.h>
9 
10 #include "hvhdk_mini.h"
11 #include "hvgdk.h"
12 
13 /* Bits for dirty mask of hv_vp_register_page */
14 #define HV_X64_REGISTER_CLASS_GENERAL	0
15 #define HV_X64_REGISTER_CLASS_IP	1
16 #define HV_X64_REGISTER_CLASS_XMM	2
17 #define HV_X64_REGISTER_CLASS_SEGMENT	3
18 #define HV_X64_REGISTER_CLASS_FLAGS	4
19 
20 #define HV_VP_REGISTER_PAGE_VERSION_1	1u
21 
22 #define HV_VP_REGISTER_PAGE_MAX_VECTOR_COUNT		7
23 
24 union hv_vp_register_page_interrupt_vectors {
25 	u64 as_uint64;
26 	struct {
27 		u8 vector_count;
28 		u8 vector[HV_VP_REGISTER_PAGE_MAX_VECTOR_COUNT];
29 	} __packed;
30 };
31 
32 struct hv_vp_register_page {
33 	u16 version;
34 	u8 isvalid;
35 	u8 rsvdz;
36 	u32 dirty;
37 
38 #if IS_ENABLED(CONFIG_X86)
39 
40 	union {
41 		struct {
42 			/* General purpose registers
43 			 * (HV_X64_REGISTER_CLASS_GENERAL)
44 			 */
45 			union {
46 				struct {
47 					u64 rax;
48 					u64 rcx;
49 					u64 rdx;
50 					u64 rbx;
51 					u64 rsp;
52 					u64 rbp;
53 					u64 rsi;
54 					u64 rdi;
55 					u64 r8;
56 					u64 r9;
57 					u64 r10;
58 					u64 r11;
59 					u64 r12;
60 					u64 r13;
61 					u64 r14;
62 					u64 r15;
63 				} __packed;
64 
65 				u64 gp_registers[16];
66 			};
67 			/* Instruction pointer (HV_X64_REGISTER_CLASS_IP) */
68 			u64 rip;
69 			/* Flags (HV_X64_REGISTER_CLASS_FLAGS) */
70 			u64 rflags;
71 		} __packed;
72 
73 		u64 registers[18];
74 	};
75 	/* Volatile XMM registers (HV_X64_REGISTER_CLASS_XMM) */
76 	union {
77 		struct {
78 			struct hv_u128 xmm0;
79 			struct hv_u128 xmm1;
80 			struct hv_u128 xmm2;
81 			struct hv_u128 xmm3;
82 			struct hv_u128 xmm4;
83 			struct hv_u128 xmm5;
84 		} __packed;
85 
86 		struct hv_u128 xmm_registers[6];
87 	};
88 	/* Segment registers (HV_X64_REGISTER_CLASS_SEGMENT) */
89 	union {
90 		struct {
91 			struct hv_x64_segment_register es;
92 			struct hv_x64_segment_register cs;
93 			struct hv_x64_segment_register ss;
94 			struct hv_x64_segment_register ds;
95 			struct hv_x64_segment_register fs;
96 			struct hv_x64_segment_register gs;
97 		} __packed;
98 
99 		struct hv_x64_segment_register segment_registers[6];
100 	};
101 	/* Misc. control registers (cannot be set via this interface) */
102 	u64 cr0;
103 	u64 cr3;
104 	u64 cr4;
105 	u64 cr8;
106 	u64 efer;
107 	u64 dr7;
108 	union hv_x64_pending_interruption_register pending_interruption;
109 	union hv_x64_interrupt_state_register interrupt_state;
110 	u64 instruction_emulation_hints;
111 	u64 xfem;
112 
113 	/*
114 	 * Fields from this point are not included in the register page save chunk.
115 	 * The reserved field is intended to maintain alignment for unsaved fields.
116 	 */
117 	u8 reserved1[0x100];
118 
119 	/*
120 	 * Interrupts injected as part of HvCallDispatchVp.
121 	 */
122 	union hv_vp_register_page_interrupt_vectors interrupt_vectors;
123 
124 #elif IS_ENABLED(CONFIG_ARM64)
125 	/* Not yet supported in ARM */
126 #endif
127 } __packed;
128 
129 #define HV_PARTITION_PROCESSOR_FEATURES_BANKS 2
130 
131 union hv_partition_processor_features {
132 	u64 as_uint64[HV_PARTITION_PROCESSOR_FEATURES_BANKS];
133 	struct {
134 		u64 sse3_support : 1;
135 		u64 lahf_sahf_support : 1;
136 		u64 ssse3_support : 1;
137 		u64 sse4_1_support : 1;
138 		u64 sse4_2_support : 1;
139 		u64 sse4a_support : 1;
140 		u64 xop_support : 1;
141 		u64 pop_cnt_support : 1;
142 		u64 cmpxchg16b_support : 1;
143 		u64 altmovcr8_support : 1;
144 		u64 lzcnt_support : 1;
145 		u64 mis_align_sse_support : 1;
146 		u64 mmx_ext_support : 1;
147 		u64 amd3dnow_support : 1;
148 		u64 extended_amd3dnow_support : 1;
149 		u64 page_1gb_support : 1;
150 		u64 aes_support : 1;
151 		u64 pclmulqdq_support : 1;
152 		u64 pcid_support : 1;
153 		u64 fma4_support : 1;
154 		u64 f16c_support : 1;
155 		u64 rd_rand_support : 1;
156 		u64 rd_wr_fs_gs_support : 1;
157 		u64 smep_support : 1;
158 		u64 enhanced_fast_string_support : 1;
159 		u64 bmi1_support : 1;
160 		u64 bmi2_support : 1;
161 		u64 hle_support_deprecated : 1;
162 		u64 rtm_support_deprecated : 1;
163 		u64 movbe_support : 1;
164 		u64 npiep1_support : 1;
165 		u64 dep_x87_fpu_save_support : 1;
166 		u64 rd_seed_support : 1;
167 		u64 adx_support : 1;
168 		u64 intel_prefetch_support : 1;
169 		u64 smap_support : 1;
170 		u64 hle_support : 1;
171 		u64 rtm_support : 1;
172 		u64 rdtscp_support : 1;
173 		u64 clflushopt_support : 1;
174 		u64 clwb_support : 1;
175 		u64 sha_support : 1;
176 		u64 x87_pointers_saved_support : 1;
177 		u64 invpcid_support : 1;
178 		u64 ibrs_support : 1;
179 		u64 stibp_support : 1;
180 		u64 ibpb_support: 1;
181 		u64 unrestricted_guest_support : 1;
182 		u64 mdd_support : 1;
183 		u64 fast_short_rep_mov_support : 1;
184 		u64 l1dcache_flush_support : 1;
185 		u64 rdcl_no_support : 1;
186 		u64 ibrs_all_support : 1;
187 		u64 skip_l1df_support : 1;
188 		u64 ssb_no_support : 1;
189 		u64 rsb_a_no_support : 1;
190 		u64 virt_spec_ctrl_support : 1;
191 		u64 rd_pid_support : 1;
192 		u64 umip_support : 1;
193 		u64 mbs_no_support : 1;
194 		u64 mb_clear_support : 1;
195 		u64 taa_no_support : 1;
196 		u64 tsx_ctrl_support : 1;
197 		/*
198 		 * N.B. The final processor feature bit in bank 0 is reserved to
199 		 * simplify potential downlevel backports.
200 		 */
201 		u64 reserved_bank0 : 1;
202 
203 		/* N.B. Begin bank 1 processor features. */
204 		u64 acount_mcount_support : 1;
205 		u64 tsc_invariant_support : 1;
206 		u64 cl_zero_support : 1;
207 		u64 rdpru_support : 1;
208 		u64 la57_support : 1;
209 		u64 mbec_support : 1;
210 		u64 nested_virt_support : 1;
211 		u64 psfd_support : 1;
212 		u64 cet_ss_support : 1;
213 		u64 cet_ibt_support : 1;
214 		u64 vmx_exception_inject_support : 1;
215 		u64 enqcmd_support : 1;
216 		u64 umwait_tpause_support : 1;
217 		u64 movdiri_support : 1;
218 		u64 movdir64b_support : 1;
219 		u64 cldemote_support : 1;
220 		u64 serialize_support : 1;
221 		u64 tsc_deadline_tmr_support : 1;
222 		u64 tsc_adjust_support : 1;
223 		u64 fzlrep_movsb : 1;
224 		u64 fsrep_stosb : 1;
225 		u64 fsrep_cmpsb : 1;
226 		u64 reserved_bank1 : 42;
227 	} __packed;
228 };
229 
230 union hv_partition_processor_xsave_features {
231 	struct {
232 		u64 xsave_support : 1;
233 		u64 xsaveopt_support : 1;
234 		u64 avx_support : 1;
235 		u64 reserved1 : 61;
236 	} __packed;
237 	u64 as_uint64;
238 };
239 
240 struct hv_partition_creation_properties {
241 	union hv_partition_processor_features disabled_processor_features;
242 	union hv_partition_processor_xsave_features
243 		disabled_processor_xsave_features;
244 } __packed;
245 
246 #define HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS 1
247 
248 union hv_partition_synthetic_processor_features {
249 	u64 as_uint64[HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS];
250 
251 	struct {
252 		u64 hypervisor_present : 1;
253 		/* Support for HV#1: (CPUID leaves 0x40000000 - 0x40000006)*/
254 		u64 hv1 : 1;
255 		u64 access_vp_run_time_reg : 1; /* HV_X64_MSR_VP_RUNTIME */
256 		u64 access_partition_reference_counter : 1; /* HV_X64_MSR_TIME_REF_COUNT */
257 		u64 access_synic_regs : 1; /* SINT-related registers */
258 		/*
259 		 * Access to HV_X64_MSR_STIMER0_CONFIG through
260 		 * HV_X64_MSR_STIMER3_COUNT.
261 		 */
262 		u64 access_synthetic_timer_regs : 1;
263 		u64 access_intr_ctrl_regs : 1; /* APIC MSRs and VP assist page*/
264 		/* HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL */
265 		u64 access_hypercall_regs : 1;
266 		u64 access_vp_index : 1;
267 		u64 access_partition_reference_tsc : 1;
268 		u64 access_guest_idle_reg : 1;
269 		u64 access_frequency_regs : 1;
270 		u64 reserved_z12 : 1;
271 		u64 reserved_z13 : 1;
272 		u64 reserved_z14 : 1;
273 		u64 enable_extended_gva_ranges_for_flush_virtual_address_list : 1;
274 		u64 reserved_z16 : 1;
275 		u64 reserved_z17 : 1;
276 		/* Use fast hypercall output. Corresponds to privilege. */
277 		u64 fast_hypercall_output : 1;
278 		u64 reserved_z19 : 1;
279 		u64 start_virtual_processor : 1; /* Can start VPs */
280 		u64 reserved_z21 : 1;
281 		/* Synthetic timers in direct mode. */
282 		u64 direct_synthetic_timers : 1;
283 		u64 reserved_z23 : 1;
284 		u64 extended_processor_masks : 1;
285 
286 		/* Enable various hypercalls */
287 		u64 tb_flush_hypercalls : 1;
288 		u64 synthetic_cluster_ipi : 1;
289 		u64 notify_long_spin_wait : 1;
290 		u64 query_numa_distance : 1;
291 		u64 signal_events : 1;
292 		u64 retarget_device_interrupt : 1;
293 		u64 restore_time : 1;
294 
295 		/* EnlightenedVmcs nested enlightenment is supported. */
296 		u64 enlightened_vmcs : 1;
297 		u64 reserved : 31;
298 	} __packed;
299 };
300 
301 #define HV_MAKE_COMPATIBILITY_VERSION(major_, minor_)	\
302 	((u32)((major_) << 8 | (minor_)))
303 
304 #define HV_COMPATIBILITY_21_H2		HV_MAKE_COMPATIBILITY_VERSION(0X6, 0X9)
305 
306 union hv_partition_isolation_properties {
307 	u64 as_uint64;
308 	struct {
309 		u64 isolation_type: 5;
310 		u64 isolation_host_type : 2;
311 		u64 rsvd_z: 5;
312 		u64 shared_gpa_boundary_page_number: 52;
313 	} __packed;
314 };
315 
316 /*
317  * Various isolation types supported by MSHV.
318  */
319 #define HV_PARTITION_ISOLATION_TYPE_NONE            0
320 #define HV_PARTITION_ISOLATION_TYPE_SNP             2
321 #define HV_PARTITION_ISOLATION_TYPE_TDX             3
322 
323 /*
324  * Various host isolation types supported by MSHV.
325  */
326 #define HV_PARTITION_ISOLATION_HOST_TYPE_NONE       0x0
327 #define HV_PARTITION_ISOLATION_HOST_TYPE_HARDWARE   0x1
328 #define HV_PARTITION_ISOLATION_HOST_TYPE_RESERVED   0x2
329 
330 /* Note: Exo partition is enabled by default */
331 #define HV_PARTITION_CREATION_FLAG_GPA_SUPER_PAGES_ENABLED		BIT(4)
332 #define HV_PARTITION_CREATION_FLAG_EXO_PARTITION			BIT(8)
333 #define HV_PARTITION_CREATION_FLAG_LAPIC_ENABLED			BIT(13)
334 #define HV_PARTITION_CREATION_FLAG_INTERCEPT_MESSAGE_PAGE_ENABLED	BIT(19)
335 #define HV_PARTITION_CREATION_FLAG_X2APIC_CAPABLE			BIT(22)
336 
337 struct hv_input_create_partition {
338 	u64 flags;
339 	struct hv_proximity_domain_info proximity_domain_info;
340 	u32 compatibility_version;
341 	u32 padding;
342 	struct hv_partition_creation_properties partition_creation_properties;
343 	union hv_partition_isolation_properties isolation_properties;
344 } __packed;
345 
346 struct hv_output_create_partition {
347 	u64 partition_id;
348 } __packed;
349 
350 struct hv_input_initialize_partition {
351 	u64 partition_id;
352 } __packed;
353 
354 struct hv_input_finalize_partition {
355 	u64 partition_id;
356 } __packed;
357 
358 struct hv_input_delete_partition {
359 	u64 partition_id;
360 } __packed;
361 
362 struct hv_input_get_partition_property {
363 	u64 partition_id;
364 	u32 property_code; /* enum hv_partition_property_code */
365 	u32 padding;
366 } __packed;
367 
368 struct hv_output_get_partition_property {
369 	u64 property_value;
370 } __packed;
371 
372 struct hv_input_set_partition_property {
373 	u64 partition_id;
374 	u32 property_code; /* enum hv_partition_property_code */
375 	u32 padding;
376 	u64 property_value;
377 } __packed;
378 
379 enum hv_vp_state_page_type {
380 	HV_VP_STATE_PAGE_REGISTERS = 0,
381 	HV_VP_STATE_PAGE_INTERCEPT_MESSAGE = 1,
382 	HV_VP_STATE_PAGE_GHCB = 2,
383 	HV_VP_STATE_PAGE_COUNT
384 };
385 
386 struct hv_input_map_vp_state_page {
387 	u64 partition_id;
388 	u32 vp_index;
389 	u16 type; /* enum hv_vp_state_page_type */
390 	union hv_input_vtl input_vtl;
391 	union {
392 		u8 as_uint8;
393 		struct {
394 			u8 map_location_provided : 1;
395 			u8 reserved : 7;
396 		};
397 	} flags;
398 	u64 requested_map_location;
399 } __packed;
400 
401 struct hv_output_map_vp_state_page {
402 	u64 map_location; /* GPA page number */
403 } __packed;
404 
405 struct hv_input_unmap_vp_state_page {
406 	u64 partition_id;
407 	u32 vp_index;
408 	u16 type; /* enum hv_vp_state_page_type */
409 	union hv_input_vtl input_vtl;
410 	u8 reserved0;
411 } __packed;
412 
413 struct hv_x64_apic_eoi_message {
414 	u32 vp_index;
415 	u32 interrupt_vector;
416 } __packed;
417 
418 struct hv_opaque_intercept_message {
419 	u32 vp_index;
420 } __packed;
421 
422 enum hv_port_type {
423 	HV_PORT_TYPE_MESSAGE = 1,
424 	HV_PORT_TYPE_EVENT   = 2,
425 	HV_PORT_TYPE_MONITOR = 3,
426 	HV_PORT_TYPE_DOORBELL = 4	/* Root Partition only */
427 };
428 
429 struct hv_port_info {
430 	u32 port_type; /* enum hv_port_type */
431 	u32 padding;
432 	union {
433 		struct {
434 			u32 target_sint;
435 			u32 target_vp;
436 			u64 rsvdz;
437 		} message_port_info;
438 		struct {
439 			u32 target_sint;
440 			u32 target_vp;
441 			u16 base_flag_number;
442 			u16 flag_count;
443 			u32 rsvdz;
444 		} event_port_info;
445 		struct {
446 			u64 monitor_address;
447 			u64 rsvdz;
448 		} monitor_port_info;
449 		struct {
450 			u32 target_sint;
451 			u32 target_vp;
452 			u64 rsvdz;
453 		} doorbell_port_info;
454 	};
455 } __packed;
456 
457 struct hv_connection_info {
458 	u32 port_type;
459 	u32 padding;
460 	union {
461 		struct {
462 			u64 rsvdz;
463 		} message_connection_info;
464 		struct {
465 			u64 rsvdz;
466 		} event_connection_info;
467 		struct {
468 			u64 monitor_address;
469 		} monitor_connection_info;
470 		struct {
471 			u64 gpa;
472 			u64 trigger_value;
473 			u64 flags;
474 		} doorbell_connection_info;
475 	};
476 } __packed;
477 
478 /* Define synthetic interrupt controller flag constants. */
479 #define HV_EVENT_FLAGS_COUNT		(256 * 8)
480 #define HV_EVENT_FLAGS_BYTE_COUNT	(256)
481 #define HV_EVENT_FLAGS32_COUNT		(256 / sizeof(u32))
482 
483 /* linux side we create long version of flags to use long bit ops on flags */
484 #define HV_EVENT_FLAGS_UL_COUNT		(256 / sizeof(ulong))
485 
486 /* Define the synthetic interrupt controller event flags format. */
487 union hv_synic_event_flags {
488 	unsigned char flags8[HV_EVENT_FLAGS_BYTE_COUNT];
489 	u32 flags32[HV_EVENT_FLAGS32_COUNT];
490 	ulong flags[HV_EVENT_FLAGS_UL_COUNT];  /* linux only */
491 };
492 
493 struct hv_synic_event_flags_page {
494 	volatile union hv_synic_event_flags event_flags[HV_SYNIC_SINT_COUNT];
495 };
496 
497 #define HV_SYNIC_EVENT_RING_MESSAGE_COUNT 63
498 
499 struct hv_synic_event_ring {
500 	u8  signal_masked;
501 	u8  ring_full;
502 	u16 reserved_z;
503 	u32 data[HV_SYNIC_EVENT_RING_MESSAGE_COUNT];
504 } __packed;
505 
506 struct hv_synic_event_ring_page {
507 	struct hv_synic_event_ring sint_event_ring[HV_SYNIC_SINT_COUNT];
508 };
509 
510 /* Define SynIC control register. */
511 union hv_synic_scontrol {
512 	u64 as_uint64;
513 	struct {
514 		u64 enable : 1;
515 		u64 reserved : 63;
516 	} __packed;
517 };
518 
519 /* Define the format of the SIEFP register */
520 union hv_synic_siefp {
521 	u64 as_uint64;
522 	struct {
523 		u64 siefp_enabled : 1;
524 		u64 preserved : 11;
525 		u64 base_siefp_gpa : 52;
526 	} __packed;
527 };
528 
529 union hv_synic_sirbp {
530 	u64 as_uint64;
531 	struct {
532 		u64 sirbp_enabled : 1;
533 		u64 preserved : 11;
534 		u64 base_sirbp_gpa : 52;
535 	} __packed;
536 };
537 
538 union hv_interrupt_control {
539 	u64 as_uint64;
540 	struct {
541 		u32 interrupt_type; /* enum hv_interrupt_type */
542 		u32 level_triggered : 1;
543 		u32 logical_dest_mode : 1;
544 		u32 rsvd : 30;
545 	} __packed;
546 };
547 
548 struct hv_stimer_state {
549 	struct {
550 		u32 undelivered_msg_pending : 1;
551 		u32 reserved : 31;
552 	} __packed flags;
553 	u32 resvd;
554 	u64 config;
555 	u64 count;
556 	u64 adjustment;
557 	u64 undelivered_exp_time;
558 } __packed;
559 
560 struct hv_synthetic_timers_state {
561 	struct hv_stimer_state timers[HV_SYNIC_STIMER_COUNT];
562 	u64 reserved[5];
563 } __packed;
564 
565 struct hv_async_completion_message_payload {
566 	u64 partition_id;
567 	u32 status;
568 	u32 completion_count;
569 	u64 sub_status;
570 } __packed;
571 
572 union hv_input_delete_vp {
573 	u64 as_uint64[2];
574 	struct {
575 		u64 partition_id;
576 		u32 vp_index;
577 		u8 reserved[4];
578 	} __packed;
579 } __packed;
580 
581 struct hv_input_assert_virtual_interrupt {
582 	u64 partition_id;
583 	union hv_interrupt_control control;
584 	u64 dest_addr; /* cpu's apic id */
585 	u32 vector;
586 	u8 target_vtl;
587 	u8 rsvd_z0;
588 	u16 rsvd_z1;
589 } __packed;
590 
591 struct hv_input_create_port {
592 	u64 port_partition_id;
593 	union hv_port_id port_id;
594 	u8 port_vtl;
595 	u8 min_connection_vtl;
596 	u16 padding;
597 	u64 connection_partition_id;
598 	struct hv_port_info port_info;
599 	struct hv_proximity_domain_info proximity_domain_info;
600 } __packed;
601 
602 union hv_input_delete_port {
603 	u64 as_uint64[2];
604 	struct {
605 		u64 port_partition_id;
606 		union hv_port_id port_id;
607 		u32 reserved;
608 	};
609 } __packed;
610 
611 struct hv_input_connect_port {
612 	u64 connection_partition_id;
613 	union hv_connection_id connection_id;
614 	u8 connection_vtl;
615 	u8 rsvdz0;
616 	u16 rsvdz1;
617 	u64 port_partition_id;
618 	union hv_port_id port_id;
619 	u32 reserved2;
620 	struct hv_connection_info connection_info;
621 	struct hv_proximity_domain_info proximity_domain_info;
622 } __packed;
623 
624 union hv_input_disconnect_port {
625 	u64 as_uint64[2];
626 	struct {
627 		u64 connection_partition_id;
628 		union hv_connection_id connection_id;
629 		u32 is_doorbell: 1;
630 		u32 reserved: 31;
631 	} __packed;
632 } __packed;
633 
634 union hv_input_notify_port_ring_empty {
635 	u64 as_uint64;
636 	struct {
637 		u32 sint_index;
638 		u32 reserved;
639 	};
640 } __packed;
641 
642 struct hv_vp_state_data_xsave {
643 	u64 flags;
644 	union hv_x64_xsave_xfem_register states;
645 } __packed;
646 
647 /*
648  * For getting and setting VP state, there are two options based on the state type:
649  *
650  *     1.) Data that is accessed by PFNs in the input hypercall page. This is used
651  *         for state which may not fit into the hypercall pages.
652  *     2.) Data that is accessed directly in the input\output hypercall pages.
653  *         This is used for state that will always fit into the hypercall pages.
654  *
655  * In the future this could be dynamic based on the size if needed.
656  *
657  * Note these hypercalls have an 8-byte aligned variable header size as per the tlfs
658  */
659 
660 #define HV_GET_SET_VP_STATE_TYPE_PFN	BIT(31)
661 
662 enum hv_get_set_vp_state_type {
663 	/* HvGetSetVpStateLocalInterruptControllerState - APIC/GIC state */
664 	HV_GET_SET_VP_STATE_LAPIC_STATE	     = 0 | HV_GET_SET_VP_STATE_TYPE_PFN,
665 	HV_GET_SET_VP_STATE_XSAVE	     = 1 | HV_GET_SET_VP_STATE_TYPE_PFN,
666 	HV_GET_SET_VP_STATE_SIM_PAGE	     = 2 | HV_GET_SET_VP_STATE_TYPE_PFN,
667 	HV_GET_SET_VP_STATE_SIEF_PAGE	     = 3 | HV_GET_SET_VP_STATE_TYPE_PFN,
668 	HV_GET_SET_VP_STATE_SYNTHETIC_TIMERS = 4,
669 };
670 
671 struct hv_vp_state_data {
672 	u32 type;
673 	u32 rsvd;
674 	struct hv_vp_state_data_xsave xsave;
675 } __packed;
676 
677 struct hv_input_get_vp_state {
678 	u64 partition_id;
679 	u32 vp_index;
680 	u8 input_vtl;
681 	u8 rsvd0;
682 	u16 rsvd1;
683 	struct hv_vp_state_data state_data;
684 	u64 output_data_pfns[];
685 } __packed;
686 
687 union hv_output_get_vp_state {
688 	struct hv_synthetic_timers_state synthetic_timers_state;
689 } __packed;
690 
691 union hv_input_set_vp_state_data {
692 	u64 pfns;
693 	u8 bytes;
694 } __packed;
695 
696 struct hv_input_set_vp_state {
697 	u64 partition_id;
698 	u32 vp_index;
699 	u8 input_vtl;
700 	u8 rsvd0;
701 	u16 rsvd1;
702 	struct hv_vp_state_data state_data;
703 	union hv_input_set_vp_state_data data[];
704 } __packed;
705 
706 union hv_x64_vp_execution_state {
707 	u16 as_uint16;
708 	struct {
709 		u16 cpl:2;
710 		u16 cr0_pe:1;
711 		u16 cr0_am:1;
712 		u16 efer_lma:1;
713 		u16 debug_active:1;
714 		u16 interruption_pending:1;
715 		u16 vtl:4;
716 		u16 enclave_mode:1;
717 		u16 interrupt_shadow:1;
718 		u16 virtualization_fault_active:1;
719 		u16 reserved:2;
720 	} __packed;
721 };
722 
723 struct hv_x64_intercept_message_header {
724 	u32 vp_index;
725 	u8 instruction_length:4;
726 	u8 cr8:4; /* Only set for exo partitions */
727 	u8 intercept_access_type;
728 	union hv_x64_vp_execution_state execution_state;
729 	struct hv_x64_segment_register cs_segment;
730 	u64 rip;
731 	u64 rflags;
732 } __packed;
733 
734 union hv_x64_memory_access_info {
735 	u8 as_uint8;
736 	struct {
737 		u8 gva_valid:1;
738 		u8 gva_gpa_valid:1;
739 		u8 hypercall_output_pending:1;
740 		u8 tlb_locked_no_overlay:1;
741 		u8 reserved:4;
742 	} __packed;
743 };
744 
745 struct hv_x64_memory_intercept_message {
746 	struct hv_x64_intercept_message_header header;
747 	u32 cache_type; /* enum hv_cache_type */
748 	u8 instruction_byte_count;
749 	union hv_x64_memory_access_info memory_access_info;
750 	u8 tpr_priority;
751 	u8 reserved1;
752 	u64 guest_virtual_address;
753 	u64 guest_physical_address;
754 	u8 instruction_bytes[16];
755 } __packed;
756 
757 /*
758  * Dispatch state for the VP communicated by the hypervisor to the
759  * VP-dispatching thread in the root on return from HVCALL_DISPATCH_VP.
760  */
761 enum hv_vp_dispatch_state {
762 	HV_VP_DISPATCH_STATE_INVALID	= 0,
763 	HV_VP_DISPATCH_STATE_BLOCKED	= 1,
764 	HV_VP_DISPATCH_STATE_READY	= 2,
765 };
766 
767 /*
768  * Dispatch event that caused the current dispatch state on return from
769  * HVCALL_DISPATCH_VP.
770  */
771 enum hv_vp_dispatch_event {
772 	HV_VP_DISPATCH_EVENT_INVALID	= 0x00000000,
773 	HV_VP_DISPATCH_EVENT_SUSPEND	= 0x00000001,
774 	HV_VP_DISPATCH_EVENT_INTERCEPT	= 0x00000002,
775 };
776 
777 #define HV_ROOT_SCHEDULER_MAX_VPS_PER_CHILD_PARTITION   1024
778 /* The maximum array size of HV_GENERIC_SET (vp_set) buffer */
779 #define HV_GENERIC_SET_QWORD_COUNT(max) (((((max) - 1) >> 6) + 1) + 2)
780 
781 struct hv_vp_signal_bitset_scheduler_message {
782 	u64 partition_id;
783 	u32 overflow_count;
784 	u16 vp_count;
785 	u16 reserved;
786 
787 #define BITSET_BUFFER_SIZE \
788 	HV_GENERIC_SET_QWORD_COUNT(HV_ROOT_SCHEDULER_MAX_VPS_PER_CHILD_PARTITION)
789 	union {
790 		struct hv_vpset bitset;
791 		u64 bitset_buffer[BITSET_BUFFER_SIZE];
792 	} vp_bitset;
793 #undef BITSET_BUFFER_SIZE
794 } __packed;
795 
796 static_assert(sizeof(struct hv_vp_signal_bitset_scheduler_message) <=
797 	(sizeof(struct hv_message) - sizeof(struct hv_message_header)));
798 
799 #define HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT \
800 	(((sizeof(struct hv_message) - sizeof(struct hv_message_header)) / \
801 	 (sizeof(u64 /* partition id */) + sizeof(u32 /* vp index */))) - 1)
802 
803 struct hv_vp_signal_pair_scheduler_message {
804 	u32 overflow_count;
805 	u8 vp_count;
806 	u8 reserved1[3];
807 
808 	u64 partition_ids[HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT];
809 	u32 vp_indexes[HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT];
810 
811 	u8 reserved2[4];
812 } __packed;
813 
814 static_assert(sizeof(struct hv_vp_signal_pair_scheduler_message) ==
815 	(sizeof(struct hv_message) - sizeof(struct hv_message_header)));
816 
817 /* Input and output structures for HVCALL_DISPATCH_VP */
818 #define HV_DISPATCH_VP_FLAG_CLEAR_INTERCEPT_SUSPEND	0x1
819 #define HV_DISPATCH_VP_FLAG_ENABLE_CALLER_INTERRUPTS	0x2
820 #define HV_DISPATCH_VP_FLAG_SET_CALLER_SPEC_CTRL	0x4
821 #define HV_DISPATCH_VP_FLAG_SKIP_VP_SPEC_FLUSH		0x8
822 #define HV_DISPATCH_VP_FLAG_SKIP_CALLER_SPEC_FLUSH	0x10
823 #define HV_DISPATCH_VP_FLAG_SKIP_CALLER_USER_SPEC_FLUSH	0x20
824 #define HV_DISPATCH_VP_FLAG_SCAN_INTERRUPT_INJECTION	0x40
825 
826 struct hv_input_dispatch_vp {
827 	u64 partition_id;
828 	u32 vp_index;
829 	u32 flags;
830 	u64 time_slice; /* in 100ns */
831 	u64 spec_ctrl;
832 } __packed;
833 
834 struct hv_output_dispatch_vp {
835 	u32 dispatch_state; /* enum hv_vp_dispatch_state */
836 	u32 dispatch_event; /* enum hv_vp_dispatch_event */
837 } __packed;
838 
839 struct hv_input_modify_sparse_spa_page_host_access {
840 	u32 host_access : 2;
841 	u32 reserved : 30;
842 	u32 flags;
843 	u64 partition_id;
844 	u64 spa_page_list[];
845 } __packed;
846 
847 /* hv_input_modify_sparse_spa_page_host_access flags */
848 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_MAKE_EXCLUSIVE  0x1
849 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_MAKE_SHARED     0x2
850 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_LARGE_PAGE      0x4
851 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_HUGE_PAGE       0x8
852 
853 #endif /* _HV_HVHDK_H */
854