1// SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2/* 3 * Copyright 2012-2017 <LW@KARO-electronics.de> 4 * based on imx53-qsb.dts 5 * Copyright 2011 Freescale Semiconductor, Inc. 6 * Copyright 2011 Linaro Ltd. 7 */ 8 9#include "imx53.dtsi" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 model = "Ka-Ro electronics TX53 module"; 14 compatible = "karo,tx53", "fsl,imx53"; 15 16 /* Will be filled by the bootloader */ 17 memory@70000000 { 18 device_type = "memory"; 19 reg = <0x70000000 0>; 20 }; 21 22 aliases { 23 can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */ 24 can1 = &can1; 25 ipu = &ipu; 26 reg-can-xcvr = ®_can_xcvr; 27 usbh1 = &usbh1; 28 usbotg = &usbotg; 29 }; 30 31 clocks { 32 ckih1 { 33 clock-frequency = <0>; 34 }; 35 }; 36 37 mclk: clock-mclk { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <26000000>; 41 }; 42 43 gpio-keys { 44 compatible = "gpio-keys"; 45 pinctrl-names = "default"; 46 pinctrl-0 = <&pinctrl_gpio_key>; 47 48 key-power { 49 label = "Power Button"; 50 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; 51 linux,code = <116>; /* KEY_POWER */ 52 wakeup-source; 53 }; 54 }; 55 56 leds { 57 compatible = "gpio-leds"; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&pinctrl_stk5led>; 60 61 led-user { 62 label = "Heartbeat"; 63 gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; 64 linux,default-trigger = "heartbeat"; 65 }; 66 }; 67 68 reg_2v5: regulator-2v5 { 69 compatible = "regulator-fixed"; 70 regulator-name = "2V5"; 71 regulator-min-microvolt = <2500000>; 72 regulator-max-microvolt = <2500000>; 73 }; 74 75 reg_3v3: regulator-3v3 { 76 compatible = "regulator-fixed"; 77 regulator-name = "3V3"; 78 regulator-min-microvolt = <3300000>; 79 regulator-max-microvolt = <3300000>; 80 }; 81 82 reg_can_xcvr: regulator-can-xcvr { 83 compatible = "regulator-fixed"; 84 regulator-name = "CAN XCVR"; 85 regulator-min-microvolt = <3300000>; 86 regulator-max-microvolt = <3300000>; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&pinctrl_can_xcvr>; 89 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; 90 }; 91 92 reg_usbh1_vbus: regulator-usbh1-vbus { 93 compatible = "regulator-fixed"; 94 regulator-name = "usbh1_vbus"; 95 regulator-min-microvolt = <5000000>; 96 regulator-max-microvolt = <5000000>; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_usbh1_vbus>; 99 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; 100 enable-active-high; 101 }; 102 103 reg_usbotg_vbus: regulator-usbotg-vbus { 104 compatible = "regulator-fixed"; 105 regulator-name = "usbotg_vbus"; 106 regulator-min-microvolt = <5000000>; 107 regulator-max-microvolt = <5000000>; 108 pinctrl-names = "default"; 109 pinctrl-0 = <&pinctrl_usbotg_vbus>; 110 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; 111 enable-active-high; 112 }; 113 114 sound { 115 compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000"; 116 model = "tx53-audio-sgtl5000"; 117 ssi-controller = <&ssi1>; 118 audio-codec = <&sgtl5000>; 119 audio-routing = 120 "MIC_IN", "Mic Jack", 121 "Mic Jack", "Mic Bias", 122 "Headphone Jack", "HP_OUT"; 123 /* '1' based port numbers according to datasheet names */ 124 mux-int-port = <1>; 125 mux-ext-port = <5>; 126 }; 127}; 128 129&audmux { 130 pinctrl-names = "default"; 131 pinctrl-0 = <&pinctrl_ssi1>; 132 status = "okay"; 133}; 134 135&can1 { 136 pinctrl-names = "default"; 137 pinctrl-0 = <&pinctrl_can1>; 138 xceiver-supply = <®_can_xcvr>; 139 status = "okay"; 140}; 141 142&can2 { 143 pinctrl-names = "default"; 144 pinctrl-0 = <&pinctrl_can2>; 145 xceiver-supply = <®_can_xcvr>; 146 status = "okay"; 147}; 148 149&ecspi1 { 150 pinctrl-names = "default"; 151 pinctrl-0 = <&pinctrl_ecspi1>; 152 status = "okay"; 153 154 cs-gpios = < 155 &gpio2 30 GPIO_ACTIVE_HIGH 156 &gpio3 19 GPIO_ACTIVE_HIGH 157 >; 158 159}; 160 161&esdhc1 { 162 cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 163 fsl,wp-controller; 164 pinctrl-names = "default"; 165 pinctrl-0 = <&pinctrl_esdhc1>; 166 status = "okay"; 167}; 168 169&esdhc2 { 170 cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 171 fsl,wp-controller; 172 pinctrl-names = "default"; 173 pinctrl-0 = <&pinctrl_esdhc2>; 174 status = "okay"; 175}; 176 177&fec { 178 pinctrl-names = "default"; 179 pinctrl-0 = <&pinctrl_fec>; 180 phy-mode = "rmii"; 181 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; 182 phy-handle = <&phy0>; 183 mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */ 184 status = "okay"; 185 186 mdio { 187 #address-cells = <1>; 188 #size-cells = <0>; 189 190 phy0: ethernet-phy@0 { 191 reg = <0>; 192 interrupt-parent = <&gpio2>; 193 interrupts = <4 IRQ_TYPE_EDGE_FALLING>; 194 device_type = "ethernet-phy"; 195 }; 196 }; 197}; 198 199&i2c1 { 200 pinctrl-names = "default", "gpio"; 201 pinctrl-0 = <&pinctrl_i2c1>; 202 pinctrl-0 = <&pinctrl_i2c1_gpio>; 203 scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 204 sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; 205 clock-frequency = <400000>; 206 status = "okay"; 207 208 rtc1: rtc@68 { 209 compatible = "dallas,ds1339"; 210 reg = <0x68>; 211 pinctrl-names = "default"; 212 pinctrl-0 = <&pinctrl_ds1339>; 213 interrupt-parent = <&gpio4>; 214 interrupts = <20 IRQ_TYPE_EDGE_FALLING>; 215 trickle-resistor-ohms = <250>; 216 trickle-diode-disable; 217 }; 218}; 219 220&iomuxc { 221 pinctrl-names = "default"; 222 pinctrl-0 = <&pinctrl_hog>; 223 224 pinctrl_hog: hoggrp { 225 /* pins not in use by any device on the Starterkit board series */ 226 fsl,pins = < 227 /* CMOS Sensor Interface */ 228 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4 229 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4 230 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4 231 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4 232 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4 233 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4 234 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4 235 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4 236 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4 237 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4 238 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4 239 MX53_PAD_GPIO_0__GPIO1_0 0x1f4 240 /* Module Specific Signal */ 241 /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */ 242 /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */ 243 MX53_PAD_EIM_D29__GPIO3_29 0x1f4 244 MX53_PAD_EIM_EB3__GPIO2_31 0x1f4 245 /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */ 246 /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */ 247 MX53_PAD_EIM_A19__GPIO2_19 0x1f4 248 MX53_PAD_EIM_A20__GPIO2_18 0x1f4 249 MX53_PAD_EIM_A21__GPIO2_17 0x1f4 250 MX53_PAD_EIM_A22__GPIO2_16 0x1f4 251 MX53_PAD_EIM_A23__GPIO6_6 0x1f4 252 MX53_PAD_EIM_A24__GPIO5_4 0x1f4 253 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4 254 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4 255 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4 256 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4 257 /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */ 258 /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */ 259 MX53_PAD_GPIO_13__GPIO4_3 0x1f4 260 MX53_PAD_EIM_CS0__GPIO2_23 0x1f4 261 MX53_PAD_EIM_CS1__GPIO2_24 0x1f4 262 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4 263 MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4 264 MX53_PAD_EIM_EB0__GPIO2_28 0x1f4 265 MX53_PAD_EIM_EB1__GPIO2_29 0x1f4 266 MX53_PAD_EIM_OE__GPIO2_25 0x1f4 267 MX53_PAD_EIM_LBA__GPIO2_27 0x1f4 268 MX53_PAD_EIM_RW__GPIO2_26 0x1f4 269 MX53_PAD_EIM_DA8__GPIO3_8 0x1f4 270 MX53_PAD_EIM_DA9__GPIO3_9 0x1f4 271 MX53_PAD_EIM_DA10__GPIO3_10 0x1f4 272 MX53_PAD_EIM_DA11__GPIO3_11 0x1f4 273 MX53_PAD_EIM_DA12__GPIO3_12 0x1f4 274 MX53_PAD_EIM_DA13__GPIO3_13 0x1f4 275 MX53_PAD_EIM_DA14__GPIO3_14 0x1f4 276 MX53_PAD_EIM_DA15__GPIO3_15 0x1f4 277 >; 278 }; 279 280 pinctrl_can1: can1grp { 281 fsl,pins = < 282 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000 283 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000 284 >; 285 }; 286 287 pinctrl_can2: can2grp { 288 fsl,pins = < 289 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000 290 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000 291 >; 292 }; 293 294 pinctrl_can_xcvr: can-xcvrgrp { 295 fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */ 296 }; 297 298 pinctrl_ds1339: ds1339grp { 299 fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>; 300 }; 301 302 pinctrl_ecspi1: ecspi1grp { 303 fsl,pins = < 304 MX53_PAD_GPIO_19__ECSPI1_RDY 0x80000000 305 MX53_PAD_EIM_EB2__ECSPI1_SS0 0x80000000 306 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000 307 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000 308 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000 309 MX53_PAD_EIM_D19__ECSPI1_SS1 0x80000000 310 >; 311 }; 312 313 pinctrl_esdhc1: esdhc1grp { 314 fsl,pins = < 315 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 316 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 317 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 318 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 319 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 320 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 321 MX53_PAD_EIM_D24__GPIO3_24 0x1f0 322 >; 323 }; 324 325 pinctrl_esdhc2: esdhc2grp { 326 fsl,pins = < 327 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 328 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 329 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 330 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 331 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 332 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 333 MX53_PAD_EIM_D25__GPIO3_25 0x1f0 334 >; 335 }; 336 337 pinctrl_fec: fecgrp { 338 fsl,pins = < 339 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 340 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 341 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 342 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 343 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 344 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 345 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 346 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 347 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 348 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 349 >; 350 }; 351 352 pinctrl_gpio_key: gpio-keygrp { 353 fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>; 354 }; 355 356 pinctrl_i2c1: i2c1grp { 357 fsl,pins = < 358 MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4 359 MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4 360 >; 361 }; 362 363 pinctrl_i2c1_gpio: i2c1-gpiogrp { 364 fsl,pins = < 365 MX53_PAD_EIM_D21__GPIO3_21 0x400001e6 366 MX53_PAD_EIM_D28__GPIO3_28 0x400001e6 367 >; 368 }; 369 370 pinctrl_i2c3: i2c3grp { 371 fsl,pins = < 372 MX53_PAD_GPIO_3__I2C3_SCL 0x400001e4 373 MX53_PAD_GPIO_6__I2C3_SDA 0x400001e4 374 >; 375 }; 376 377 pinctrl_i2c3_gpio: i2c3-gpiogrp { 378 fsl,pins = < 379 MX53_PAD_GPIO_3__GPIO1_3 0x400001e6 380 MX53_PAD_GPIO_6__GPIO1_6 0x400001e6 381 >; 382 }; 383 384 pinctrl_nand: nandgrp { 385 fsl,pins = < 386 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4 387 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4 388 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4 389 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4 390 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0 391 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0 392 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4 393 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4 394 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4 395 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4 396 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4 397 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4 398 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4 399 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4 400 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4 401 >; 402 }; 403 404 pinctrl_pwm2: pwm2grp { 405 fsl,pins = < 406 MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000 407 >; 408 }; 409 410 pinctrl_ssi1: ssi1grp { 411 fsl,pins = < 412 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000 413 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000 414 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000 415 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000 416 >; 417 }; 418 419 pinctrl_ssi2: ssi2grp { 420 fsl,pins = < 421 MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x80000000 422 MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x80000000 423 MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000 424 MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x80000000 425 MX53_PAD_EIM_D27__GPIO3_27 0x1f0 426 >; 427 }; 428 429 pinctrl_stk5led: stk5ledgrp { 430 fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>; 431 }; 432 433 pinctrl_uart1: uart1grp { 434 fsl,pins = < 435 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 436 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 437 MX53_PAD_PATA_RESET_B__UART1_CTS 0x1c5 438 MX53_PAD_PATA_IORDY__UART1_RTS 0x1c5 439 >; 440 }; 441 442 pinctrl_uart2: uart2grp { 443 fsl,pins = < 444 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5 445 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5 446 MX53_PAD_PATA_DIOR__UART2_RTS 0x1c5 447 MX53_PAD_PATA_INTRQ__UART2_CTS 0x1c5 448 >; 449 }; 450 451 pinctrl_uart3: uart3grp { 452 fsl,pins = < 453 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 454 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 455 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4 456 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4 457 >; 458 }; 459 460 pinctrl_usbh1: usbh1grp { 461 fsl,pins = < 462 MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */ 463 >; 464 }; 465 466 pinctrl_usbh1_vbus: usbh1-vbusgrp { 467 fsl,pins = < 468 MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */ 469 >; 470 }; 471 472 pinctrl_usbotg_vbus: usbotg-vbusgrp { 473 fsl,pins = < 474 MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */ 475 MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */ 476 >; 477 }; 478}; 479 480&ipu { 481 status = "okay"; 482}; 483 484&nfc { 485 pinctrl-names = "default"; 486 pinctrl-0 = <&pinctrl_nand>; 487 nand-bus-width = <8>; 488 nand-ecc-mode = "hw"; 489 nand-on-flash-bbt; 490 status = "okay"; 491}; 492 493&pwm2 { 494 pinctrl-names = "default"; 495 pinctrl-0 = <&pinctrl_pwm2>; 496}; 497 498&sdma { 499 fsl,sdma-ram-script-name = "sdma-imx53.bin"; 500}; 501 502&ssi1 { 503 status = "okay"; 504}; 505 506&ssi2 { 507 status = "disabled"; 508}; 509 510&uart1 { 511 pinctrl-names = "default"; 512 pinctrl-0 = <&pinctrl_uart1>; 513 uart-has-rtscts; 514 status = "okay"; 515}; 516 517&uart2 { 518 pinctrl-names = "default"; 519 pinctrl-0 = <&pinctrl_uart2>; 520 uart-has-rtscts; 521 status = "okay"; 522}; 523 524&uart3 { 525 pinctrl-names = "default"; 526 pinctrl-0 = <&pinctrl_uart3>; 527 uart-has-rtscts; 528 status = "okay"; 529}; 530 531&usbh1 { 532 pinctrl-names = "default"; 533 pinctrl-0 = <&pinctrl_usbh1>; 534 phy_type = "utmi"; 535 disable-over-current; 536 vbus-supply = <®_usbh1_vbus>; 537 status = "okay"; 538}; 539 540&usbotg { 541 phy_type = "utmi"; 542 dr_mode = "peripheral"; 543 disable-over-current; 544 vbus-supply = <®_usbotg_vbus>; 545 status = "okay"; 546}; 547