1 /*
2 * ARM RealView Baseboard System emulation.
3 *
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
6 *
7 * This code is licensed under the GPL.
8 */
9
10 #include "qemu/osdep.h"
11 #include "qapi/error.h"
12 #include "cpu.h"
13 #include "hw/sysbus.h"
14 #include "hw/arm/boot.h"
15 #include "hw/arm/primecell.h"
16 #include "hw/core/split-irq.h"
17 #include "hw/net/lan9118.h"
18 #include "hw/net/smc91c111.h"
19 #include "hw/pci/pci.h"
20 #include "hw/qdev-core.h"
21 #include "net/net.h"
22 #include "system/system.h"
23 #include "hw/boards.h"
24 #include "hw/i2c/i2c.h"
25 #include "qemu/error-report.h"
26 #include "hw/char/pl011.h"
27 #include "hw/cpu/a9mpcore.h"
28 #include "hw/intc/realview_gic.h"
29 #include "hw/irq.h"
30 #include "hw/i2c/arm_sbcon_i2c.h"
31 #include "hw/sd/sd.h"
32 #include "audio/audio.h"
33 #include "target/arm/cpu-qom.h"
34
35 #define SMP_BOOT_ADDR 0xe0000000
36 #define SMP_BOOTREG_ADDR 0x10000030
37
38 #define GIC_EXT_IRQS 64 /* Realview PBX-A9 development board */
39
40 /* Board init. */
41
42 static struct arm_boot_info realview_binfo = {
43 .smp_loader_start = SMP_BOOT_ADDR,
44 .smp_bootreg_addr = SMP_BOOTREG_ADDR,
45 };
46
47 /* The following two lists must be consistent. */
48 enum realview_board_type {
49 BOARD_EB,
50 BOARD_EB_MPCORE,
51 BOARD_PB_A8,
52 BOARD_PBX_A9,
53 };
54
55 static const int realview_board_id[] = {
56 0x33b,
57 0x33b,
58 0x769,
59 0x76d
60 };
61
split_irq_from_named(DeviceState * src,const char * outname,qemu_irq out1,qemu_irq out2)62 static void split_irq_from_named(DeviceState *src, const char* outname,
63 qemu_irq out1, qemu_irq out2) {
64 DeviceState *splitter = qdev_new(TYPE_SPLIT_IRQ);
65
66 qdev_prop_set_uint32(splitter, "num-lines", 2);
67
68 qdev_realize_and_unref(splitter, NULL, &error_fatal);
69
70 qdev_connect_gpio_out(splitter, 0, out1);
71 qdev_connect_gpio_out(splitter, 1, out2);
72 qdev_connect_gpio_out_named(src, outname, 0,
73 qdev_get_gpio_in(splitter, 0));
74 }
75
realview_init(MachineState * machine,enum realview_board_type board_type)76 static void realview_init(MachineState *machine,
77 enum realview_board_type board_type)
78 {
79 ARMCPU *cpu = NULL;
80 CPUARMState *env;
81 MemoryRegion *sysmem = get_system_memory();
82 MemoryRegion *ram_lo;
83 MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
84 MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
85 MemoryRegion *ram_hack = g_new(MemoryRegion, 1);
86 DeviceState *dev, *sysctl, *gpio2, *pl041;
87 SysBusDevice *busdev;
88 qemu_irq pic[64];
89 PCIBus *pci_bus = NULL;
90 DriveInfo *dinfo;
91 I2CBus *i2c;
92 int n;
93 unsigned int smp_cpus = machine->smp.cpus;
94 qemu_irq cpu_irq[4];
95 int is_mpcore = 0;
96 int is_pb = 0;
97 uint32_t proc_id = 0;
98 uint32_t sys_id;
99 ram_addr_t low_ram_size;
100 ram_addr_t ram_size = machine->ram_size;
101 hwaddr periphbase = 0;
102
103 switch (board_type) {
104 case BOARD_EB:
105 break;
106 case BOARD_EB_MPCORE:
107 is_mpcore = 1;
108 periphbase = 0x10100000;
109 break;
110 case BOARD_PB_A8:
111 is_pb = 1;
112 break;
113 case BOARD_PBX_A9:
114 is_mpcore = 1;
115 is_pb = 1;
116 periphbase = 0x1f000000;
117 break;
118 }
119
120 for (n = 0; n < smp_cpus; n++) {
121 Object *cpuobj = object_new(machine->cpu_type);
122
123 /* By default A9,A15 and ARM1176 CPUs have EL3 enabled. This board
124 * does not currently support EL3 so the CPU EL3 property is disabled
125 * before realization.
126 */
127 if (object_property_find(cpuobj, "has_el3")) {
128 object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
129 }
130
131 if (is_pb && is_mpcore) {
132 object_property_set_int(cpuobj, "reset-cbar", periphbase,
133 &error_fatal);
134 }
135
136 qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
137
138 cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpuobj), ARM_CPU_IRQ);
139 }
140 cpu = ARM_CPU(first_cpu);
141 env = &cpu->env;
142 if (arm_feature(env, ARM_FEATURE_V7)) {
143 if (is_mpcore) {
144 proc_id = 0x0c000000;
145 } else {
146 proc_id = 0x0e000000;
147 }
148 } else if (arm_feature(env, ARM_FEATURE_V6K)) {
149 proc_id = 0x06000000;
150 } else if (arm_feature(env, ARM_FEATURE_V6)) {
151 proc_id = 0x04000000;
152 } else {
153 proc_id = 0x02000000;
154 }
155
156 if (is_pb && ram_size > 0x20000000) {
157 /* Core tile RAM. */
158 ram_lo = g_new(MemoryRegion, 1);
159 low_ram_size = ram_size - 0x20000000;
160 ram_size = 0x20000000;
161 memory_region_init_ram(ram_lo, NULL, "realview.lowmem", low_ram_size,
162 &error_fatal);
163 memory_region_add_subregion(sysmem, 0x20000000, ram_lo);
164 }
165
166 memory_region_init_ram(ram_hi, NULL, "realview.highmem", ram_size,
167 &error_fatal);
168 low_ram_size = ram_size;
169 if (low_ram_size > 0x10000000)
170 low_ram_size = 0x10000000;
171 /* SDRAM at address zero. */
172 memory_region_init_alias(ram_alias, NULL, "realview.alias",
173 ram_hi, 0, low_ram_size);
174 memory_region_add_subregion(sysmem, 0, ram_alias);
175 if (is_pb) {
176 /* And again at a high address. */
177 memory_region_add_subregion(sysmem, 0x70000000, ram_hi);
178 } else {
179 ram_size = low_ram_size;
180 }
181
182 sys_id = is_pb ? 0x01780500 : 0xc1400400;
183 sysctl = qdev_new("realview_sysctl");
184 qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
185 qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
186 sysbus_realize_and_unref(SYS_BUS_DEVICE(sysctl), &error_fatal);
187 sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);
188
189 if (is_mpcore) {
190 if (is_pb) {
191 dev = qdev_new(TYPE_A9MPCORE_PRIV);
192 qdev_prop_set_uint32(dev, "num-irq", GIC_EXT_IRQS + GIC_INTERNAL);
193 } else {
194 dev = qdev_new("realview_mpcore");
195 }
196 qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
197 busdev = SYS_BUS_DEVICE(dev);
198 sysbus_realize_and_unref(busdev, &error_fatal);
199 sysbus_mmio_map(busdev, 0, periphbase);
200 for (n = 0; n < smp_cpus; n++) {
201 sysbus_connect_irq(busdev, n, cpu_irq[n]);
202 }
203 sysbus_create_varargs("l2x0", periphbase + 0x2000, NULL);
204 /* Both A9 and 11MPCore put the GIC CPU i/f at base + 0x100 */
205 realview_binfo.gic_cpu_if_addr = periphbase + 0x100;
206 } else {
207 uint32_t gic_addr = is_pb ? 0x1e000000 : 0x10040000;
208 /* For now just create the nIRQ GIC, and ignore the others. */
209 dev = sysbus_create_simple(TYPE_REALVIEW_GIC, gic_addr, cpu_irq[0]);
210 }
211 for (n = 0; n < GIC_EXT_IRQS; n++) {
212 pic[n] = qdev_get_gpio_in(dev, n);
213 }
214
215 pl041 = qdev_new("pl041");
216 qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
217 if (machine->audiodev) {
218 qdev_prop_set_string(pl041, "audiodev", machine->audiodev);
219 }
220 sysbus_realize_and_unref(SYS_BUS_DEVICE(pl041), &error_fatal);
221 sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000);
222 sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, pic[19]);
223
224 sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]);
225 sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]);
226
227 pl011_create(0x10009000, pic[12], serial_hd(0));
228 pl011_create(0x1000a000, pic[13], serial_hd(1));
229 pl011_create(0x1000b000, pic[14], serial_hd(2));
230 pl011_create(0x1000c000, pic[15], serial_hd(3));
231
232 /* DMA controller is optional, apparently. */
233 dev = qdev_new("pl081");
234 object_property_set_link(OBJECT(dev), "downstream", OBJECT(sysmem),
235 &error_fatal);
236 busdev = SYS_BUS_DEVICE(dev);
237 sysbus_realize_and_unref(busdev, &error_fatal);
238 sysbus_mmio_map(busdev, 0, 0x10030000);
239 sysbus_connect_irq(busdev, 0, pic[24]);
240
241 sysbus_create_simple("sp804", 0x10011000, pic[4]);
242 sysbus_create_simple("sp804", 0x10012000, pic[5]);
243
244 sysbus_create_simple("pl061", 0x10013000, pic[6]);
245 sysbus_create_simple("pl061", 0x10014000, pic[7]);
246 gpio2 = sysbus_create_simple("pl061", 0x10015000, pic[8]);
247
248 dev = qdev_new("pl111");
249 object_property_set_link(OBJECT(dev), "framebuffer-memory",
250 OBJECT(sysmem), &error_fatal);
251 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
252 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x10020000);
253 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[23]);
254
255 dev = sysbus_create_varargs("pl181", 0x10005000, pic[17], pic[18], NULL);
256 /* Wire up MMC card detect and read-only signals. These have
257 * to go to both the PL061 GPIO and the sysctl register.
258 * Note that the PL181 orders these lines (readonly,inserted)
259 * and the PL061 has them the other way about. Also the card
260 * detect line is inverted.
261 */
262 split_irq_from_named(dev, "card-read-only",
263 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_WPROT),
264 qdev_get_gpio_in(gpio2, 1));
265
266 split_irq_from_named(dev, "card-inserted",
267 qdev_get_gpio_in(sysctl, ARM_SYSCTL_GPIO_MMC_CARDIN),
268 qemu_irq_invert(qdev_get_gpio_in(gpio2, 0)));
269
270 dinfo = drive_get(IF_SD, 0, 0);
271 if (dinfo) {
272 DeviceState *card;
273
274 card = qdev_new(TYPE_SD_CARD);
275 qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
276 &error_fatal);
277 qdev_realize_and_unref(card, qdev_get_child_bus(dev, "sd-bus"),
278 &error_fatal);
279 }
280
281 sysbus_create_simple("pl031", 0x10017000, pic[10]);
282
283 if (!is_pb) {
284 dev = qdev_new("realview_pci");
285 busdev = SYS_BUS_DEVICE(dev);
286 sysbus_realize_and_unref(busdev, &error_fatal);
287 sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller registers */
288 sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */
289 sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */
290 sysbus_mmio_map(busdev, 3, 0x62000000); /* PCI I/O */
291 sysbus_mmio_map(busdev, 4, 0x63000000); /* PCI memory window 1 */
292 sysbus_mmio_map(busdev, 5, 0x64000000); /* PCI memory window 2 */
293 sysbus_mmio_map(busdev, 6, 0x68000000); /* PCI memory window 3 */
294 sysbus_connect_irq(busdev, 0, pic[48]);
295 sysbus_connect_irq(busdev, 1, pic[49]);
296 sysbus_connect_irq(busdev, 2, pic[50]);
297 sysbus_connect_irq(busdev, 3, pic[51]);
298 pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
299 if (machine_usb(machine)) {
300 pci_create_simple(pci_bus, -1, "pci-ohci");
301 }
302 n = drive_get_max_bus(IF_SCSI);
303 while (n >= 0) {
304 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
305 lsi53c8xx_handle_legacy_cmdline(dev);
306 n--;
307 }
308 }
309
310 if (qemu_find_nic_info(is_pb ? "lan9118" : "smc91c111", true, NULL)) {
311 if (is_pb) {
312 lan9118_init(0x4e000000, pic[28]);
313 } else {
314 smc91c111_init(0x4e000000, pic[28]);
315 }
316 }
317
318 if (pci_bus) {
319 pci_init_nic_devices(pci_bus, "rtl8139");
320 }
321
322 dev = sysbus_create_simple(TYPE_ARM_SBCON_I2C, 0x10002000, NULL);
323 i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
324 i2c_slave_create_simple(i2c, "ds1338", 0x68);
325
326 /* Memory map for RealView Emulation Baseboard: */
327 /* 0x10000000 System registers. */
328 /* 0x10001000 System controller. */
329 /* 0x10002000 Two-Wire Serial Bus. */
330 /* 0x10003000 Reserved. */
331 /* 0x10004000 AACI. */
332 /* 0x10005000 MCI. */
333 /* 0x10006000 KMI0. */
334 /* 0x10007000 KMI1. */
335 /* 0x10008000 Character LCD. (EB) */
336 /* 0x10009000 UART0. */
337 /* 0x1000a000 UART1. */
338 /* 0x1000b000 UART2. */
339 /* 0x1000c000 UART3. */
340 /* 0x1000d000 SSPI. */
341 /* 0x1000e000 SCI. */
342 /* 0x1000f000 Reserved. */
343 /* 0x10010000 Watchdog. */
344 /* 0x10011000 Timer 0+1. */
345 /* 0x10012000 Timer 2+3. */
346 /* 0x10013000 GPIO 0. */
347 /* 0x10014000 GPIO 1. */
348 /* 0x10015000 GPIO 2. */
349 /* 0x10002000 Two-Wire Serial Bus - DVI. (PB) */
350 /* 0x10017000 RTC. */
351 /* 0x10018000 DMC. */
352 /* 0x10019000 PCI controller config. */
353 /* 0x10020000 CLCD. */
354 /* 0x10030000 DMA Controller. */
355 /* 0x10040000 GIC1. (EB) */
356 /* 0x10050000 GIC2. (EB) */
357 /* 0x10060000 GIC3. (EB) */
358 /* 0x10070000 GIC4. (EB) */
359 /* 0x10080000 SMC. */
360 /* 0x1e000000 GIC1. (PB) */
361 /* 0x1e001000 GIC2. (PB) */
362 /* 0x1e002000 GIC3. (PB) */
363 /* 0x1e003000 GIC4. (PB) */
364 /* 0x40000000 NOR flash. */
365 /* 0x44000000 DoC flash. */
366 /* 0x48000000 SRAM. */
367 /* 0x4c000000 Configuration flash. */
368 /* 0x4e000000 Ethernet. */
369 /* 0x4f000000 USB. */
370 /* 0x50000000 PISMO. */
371 /* 0x54000000 PISMO. */
372 /* 0x58000000 PISMO. */
373 /* 0x5c000000 PISMO. */
374 /* 0x60000000 PCI. */
375 /* 0x60000000 PCI Self Config. */
376 /* 0x61000000 PCI Config. */
377 /* 0x62000000 PCI IO. */
378 /* 0x63000000 PCI mem 0. */
379 /* 0x64000000 PCI mem 1. */
380 /* 0x68000000 PCI mem 2. */
381
382 /* ??? Hack to map an additional page of ram for the secondary CPU
383 startup code. I guess this works on real hardware because the
384 BootROM happens to be in ROM/flash or in memory that isn't clobbered
385 until after Linux boots the secondary CPUs. */
386 memory_region_init_ram(ram_hack, NULL, "realview.hack", 0x1000,
387 &error_fatal);
388 memory_region_add_subregion(sysmem, SMP_BOOT_ADDR, ram_hack);
389
390 realview_binfo.ram_size = ram_size;
391 realview_binfo.board_id = realview_board_id[board_type];
392 realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0);
393 arm_load_kernel(cpu, machine, &realview_binfo);
394 }
395
realview_eb_init(MachineState * machine)396 static void realview_eb_init(MachineState *machine)
397 {
398 realview_init(machine, BOARD_EB);
399 }
400
realview_eb_mpcore_init(MachineState * machine)401 static void realview_eb_mpcore_init(MachineState *machine)
402 {
403 realview_init(machine, BOARD_EB_MPCORE);
404 }
405
realview_pb_a8_init(MachineState * machine)406 static void realview_pb_a8_init(MachineState *machine)
407 {
408 realview_init(machine, BOARD_PB_A8);
409 }
410
realview_pbx_a9_init(MachineState * machine)411 static void realview_pbx_a9_init(MachineState *machine)
412 {
413 realview_init(machine, BOARD_PBX_A9);
414 }
415
realview_eb_class_init(ObjectClass * oc,const void * data)416 static void realview_eb_class_init(ObjectClass *oc, const void *data)
417 {
418 MachineClass *mc = MACHINE_CLASS(oc);
419
420 mc->desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)";
421 mc->init = realview_eb_init;
422 mc->block_default_type = IF_SCSI;
423 mc->ignore_memory_transaction_failures = true;
424 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926");
425 mc->auto_create_sdcard = true;
426
427 machine_add_audiodev_property(mc);
428 }
429
430 static const TypeInfo realview_eb_type = {
431 .name = MACHINE_TYPE_NAME("realview-eb"),
432 .parent = TYPE_MACHINE,
433 .class_init = realview_eb_class_init,
434 };
435
realview_eb_mpcore_class_init(ObjectClass * oc,const void * data)436 static void realview_eb_mpcore_class_init(ObjectClass *oc, const void *data)
437 {
438 MachineClass *mc = MACHINE_CLASS(oc);
439
440 mc->desc = "ARM RealView Emulation Baseboard (ARM11MPCore)";
441 mc->init = realview_eb_mpcore_init;
442 mc->block_default_type = IF_SCSI;
443 mc->max_cpus = 4;
444 mc->ignore_memory_transaction_failures = true;
445 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm11mpcore");
446 mc->auto_create_sdcard = true;
447
448 machine_add_audiodev_property(mc);
449 }
450
451 static const TypeInfo realview_eb_mpcore_type = {
452 .name = MACHINE_TYPE_NAME("realview-eb-mpcore"),
453 .parent = TYPE_MACHINE,
454 .class_init = realview_eb_mpcore_class_init,
455 };
456
realview_pb_a8_class_init(ObjectClass * oc,const void * data)457 static void realview_pb_a8_class_init(ObjectClass *oc, const void *data)
458 {
459 MachineClass *mc = MACHINE_CLASS(oc);
460
461 mc->desc = "ARM RealView Platform Baseboard for Cortex-A8";
462 mc->init = realview_pb_a8_init;
463 mc->ignore_memory_transaction_failures = true;
464 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
465 mc->auto_create_sdcard = true;
466
467 machine_add_audiodev_property(mc);
468 }
469
470 static const TypeInfo realview_pb_a8_type = {
471 .name = MACHINE_TYPE_NAME("realview-pb-a8"),
472 .parent = TYPE_MACHINE,
473 .class_init = realview_pb_a8_class_init,
474 };
475
realview_pbx_a9_class_init(ObjectClass * oc,const void * data)476 static void realview_pbx_a9_class_init(ObjectClass *oc, const void *data)
477 {
478 MachineClass *mc = MACHINE_CLASS(oc);
479
480 mc->desc = "ARM RealView Platform Baseboard Explore for Cortex-A9";
481 mc->init = realview_pbx_a9_init;
482 mc->max_cpus = 4;
483 mc->ignore_memory_transaction_failures = true;
484 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
485 mc->auto_create_sdcard = true;
486
487 machine_add_audiodev_property(mc);
488 }
489
490 static const TypeInfo realview_pbx_a9_type = {
491 .name = MACHINE_TYPE_NAME("realview-pbx-a9"),
492 .parent = TYPE_MACHINE,
493 .class_init = realview_pbx_a9_class_init,
494 };
495
realview_machine_init(void)496 static void realview_machine_init(void)
497 {
498 type_register_static(&realview_eb_type);
499 type_register_static(&realview_eb_mpcore_type);
500 type_register_static(&realview_pb_a8_type);
501 type_register_static(&realview_pbx_a9_type);
502 }
503
504 type_init(realview_machine_init)
505