xref: /linux/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h (revision 37a93dd5c49b5fda807fd204edf2547c3493319c)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */
3 
4 #ifndef _HINIC3_HWDEV_H_
5 #define _HINIC3_HWDEV_H_
6 
7 #include <linux/auxiliary_bus.h>
8 #include <linux/pci.h>
9 
10 #include "hinic3_hw_intf.h"
11 
12 struct hinic3_cmdqs;
13 struct hinic3_hwif;
14 
15 enum hinic3_event_service_type {
16 	HINIC3_EVENT_SRV_COMM = 0,
17 	HINIC3_EVENT_SRV_NIC  = 1
18 };
19 
20 enum hinic3_comm_event_type {
21 	HINIC3_COMM_EVENT_PCIE_LINK_DOWN = 0,
22 	HINIC3_COMM_EVENT_HEART_LOST = 1,
23 	HINIC3_COMM_EVENT_FAULT = 2,
24 	HINIC3_COMM_EVENT_SRIOV_STATE_CHANGE = 3,
25 	HINIC3_COMM_EVENT_CARD_REMOVE = 4,
26 	HINIC3_COMM_EVENT_MGMT_WATCHDOG = 5,
27 };
28 
29 enum hinic3_fault_err_level {
30 	HINIC3_FAULT_LEVEL_SERIOUS_FLR = 3,
31 };
32 
33 enum hinic3_fault_source_type {
34 	HINIC3_FAULT_SRC_HW_PHY_FAULT = 9,
35 	HINIC3_FAULT_SRC_TX_TIMEOUT   = 22,
36 };
37 
38 #define HINIC3_SRV_EVENT_TYPE(svc, type)    (((svc) << 16) | (type))
39 
40 /* driver-specific data of pci_dev */
41 struct hinic3_pcidev {
42 	struct pci_dev       *pdev;
43 	struct hinic3_hwdev  *hwdev;
44 	/* Auxiliary devices */
45 	struct hinic3_adev   *hadev[HINIC3_SERVICE_T_MAX];
46 
47 	void __iomem         *cfg_reg_base;
48 	void __iomem         *intr_reg_base;
49 	void __iomem         *mgmt_reg_base;
50 	void __iomem         *db_base;
51 	u64                  db_dwqe_len;
52 	u64                  db_base_phy;
53 
54 	/* lock for attach/detach uld */
55 	struct mutex         pdev_mutex;
56 	unsigned long        state;
57 };
58 
59 struct hinic3_hwdev {
60 	struct hinic3_pcidev        *adapter;
61 	struct pci_dev              *pdev;
62 	struct device               *dev;
63 	int                         dev_id;
64 	struct hinic3_hwif          *hwif;
65 	struct hinic3_cfg_mgmt_info *cfg_mgmt;
66 	struct hinic3_aeqs          *aeqs;
67 	struct hinic3_ceqs          *ceqs;
68 	struct hinic3_mbox          *mbox;
69 	struct hinic3_cmdqs         *cmdqs;
70 	struct delayed_work         sync_time_task;
71 	struct workqueue_struct     *workq;
72 	struct hinic3_msg_pf_to_mgmt *pf_to_mgmt;
73 	/* protect channel init and uninit */
74 	spinlock_t                  channel_lock;
75 	u64                         features[COMM_MAX_FEATURE_QWORD];
76 	u32                         wq_page_size;
77 	u8                          max_cmdq;
78 	ulong                       func_state;
79 };
80 
81 struct hinic3_event_info {
82 	/* enum hinic3_event_service_type */
83 	u16 service;
84 	u16 type;
85 	u8  event_data[104];
86 };
87 
88 struct hinic3_adev {
89 	struct auxiliary_device  adev;
90 	struct hinic3_hwdev      *hwdev;
91 	enum hinic3_service_type svc_type;
92 
93 	void (*event)(struct auxiliary_device *adev,
94 		      struct hinic3_event_info *event);
95 };
96 
97 int hinic3_init_hwdev(struct pci_dev *pdev);
98 void hinic3_free_hwdev(struct hinic3_hwdev *hwdev);
99 
100 void hinic3_set_api_stop(struct hinic3_hwdev *hwdev);
101 
102 #endif
103