1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
5 *
6 * Copyright (C) 2015 Russell King
7 */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22
23 #include "phy-caps.h"
24 #include "sfp.h"
25 #include "swphy.h"
26
27 #define SUPPORTED_INTERFACES \
28 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
29 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
30 #define ADVERTISED_INTERFACES \
31 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
32 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
33
34 enum {
35 PHYLINK_DISABLE_STOPPED,
36 PHYLINK_DISABLE_LINK,
37 PHYLINK_DISABLE_MAC_WOL,
38
39 PCS_STATE_DOWN = 0,
40 PCS_STATE_STARTING,
41 PCS_STATE_STARTED,
42 };
43
44 /**
45 * struct phylink - internal data type for phylink
46 */
47 struct phylink {
48 /* private: */
49 struct net_device *netdev;
50 const struct phylink_mac_ops *mac_ops;
51 struct phylink_config *config;
52 struct phylink_pcs *pcs;
53 struct device *dev;
54 unsigned int old_link_state:1;
55
56 unsigned long phylink_disable_state; /* bitmask of disables */
57 struct phy_device *phydev;
58 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
59 u8 cfg_link_an_mode; /* MLO_AN_xxx */
60 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */
61 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */
62 u8 link_port; /* The current non-phy ethtool port */
63 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
64 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi);
65
66 /* The link configuration settings */
67 struct phylink_link_state link_config;
68
69 /* The current settings */
70 phy_interface_t cur_interface;
71
72 struct gpio_desc *link_gpio;
73 unsigned int link_irq;
74 struct timer_list link_poll;
75
76 struct mutex state_mutex;
77 struct phylink_link_state phy_state;
78 unsigned int phy_ib_mode;
79 struct work_struct resolve;
80 unsigned int pcs_neg_mode;
81 unsigned int pcs_state;
82
83 bool link_failed;
84 bool suspend_link_up;
85 bool major_config_failed;
86 bool mac_supports_eee_ops;
87 bool mac_supports_eee;
88 bool phy_enable_tx_lpi;
89 bool mac_enable_tx_lpi;
90 bool mac_tx_clk_stop;
91 u32 mac_tx_lpi_timer;
92 u8 mac_rx_clk_stop_blocked;
93
94 struct sfp_bus *sfp_bus;
95 bool sfp_may_have_phy;
96 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
97 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
98 u8 sfp_port;
99
100 struct eee_config eee_cfg;
101 };
102
103 #define phylink_printk(level, pl, fmt, ...) \
104 do { \
105 if ((pl)->config->type == PHYLINK_NETDEV) \
106 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
107 else if ((pl)->config->type == PHYLINK_DEV) \
108 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
109 } while (0)
110
111 #define phylink_err(pl, fmt, ...) \
112 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
113 #define phylink_warn(pl, fmt, ...) \
114 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
115 #define phylink_info(pl, fmt, ...) \
116 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
117 #if defined(CONFIG_DYNAMIC_DEBUG)
118 #define phylink_dbg(pl, fmt, ...) \
119 do { \
120 if ((pl)->config->type == PHYLINK_NETDEV) \
121 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
122 else if ((pl)->config->type == PHYLINK_DEV) \
123 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
124 } while (0)
125 #elif defined(DEBUG)
126 #define phylink_dbg(pl, fmt, ...) \
127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
128 #else
129 #define phylink_dbg(pl, fmt, ...) \
130 ({ \
131 if (0) \
132 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
133 })
134 #endif
135
136 static const phy_interface_t phylink_sfp_interface_preference[] = {
137 PHY_INTERFACE_MODE_25GBASER,
138 PHY_INTERFACE_MODE_USXGMII,
139 PHY_INTERFACE_MODE_10GBASER,
140 PHY_INTERFACE_MODE_5GBASER,
141 PHY_INTERFACE_MODE_2500BASEX,
142 PHY_INTERFACE_MODE_SGMII,
143 PHY_INTERFACE_MODE_1000BASEX,
144 PHY_INTERFACE_MODE_100BASEX,
145 };
146
147 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
148
149 /**
150 * phylink_set_port_modes() - set the port type modes in the ethtool mask
151 * @mask: ethtool link mode mask
152 *
153 * Sets all the port type modes in the ethtool mask. MAC drivers should
154 * use this in their 'validate' callback.
155 */
phylink_set_port_modes(unsigned long * mask)156 void phylink_set_port_modes(unsigned long *mask)
157 {
158 phylink_set(mask, TP);
159 phylink_set(mask, AUI);
160 phylink_set(mask, MII);
161 phylink_set(mask, FIBRE);
162 phylink_set(mask, BNC);
163 phylink_set(mask, Backplane);
164 }
165 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
166
phylink_is_empty_linkmode(const unsigned long * linkmode)167 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
168 {
169 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
170
171 phylink_set_port_modes(tmp);
172 phylink_set(tmp, Autoneg);
173 phylink_set(tmp, Pause);
174 phylink_set(tmp, Asym_Pause);
175
176 return linkmode_subset(linkmode, tmp);
177 }
178
phylink_an_mode_str(unsigned int mode)179 static const char *phylink_an_mode_str(unsigned int mode)
180 {
181 static const char *modestr[] = {
182 [MLO_AN_PHY] = "phy",
183 [MLO_AN_FIXED] = "fixed",
184 [MLO_AN_INBAND] = "inband",
185 };
186
187 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
188 }
189
phylink_pcs_mode_str(unsigned int mode)190 static const char *phylink_pcs_mode_str(unsigned int mode)
191 {
192 if (!mode)
193 return "none";
194
195 if (mode & PHYLINK_PCS_NEG_OUTBAND)
196 return "outband";
197
198 if (mode & PHYLINK_PCS_NEG_INBAND) {
199 if (mode & PHYLINK_PCS_NEG_ENABLED)
200 return "inband,an-enabled";
201 else
202 return "inband,an-disabled";
203 }
204
205 return "unknown";
206 }
207
phylink_interface_signal_rate(phy_interface_t interface)208 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
209 {
210 switch (interface) {
211 case PHY_INTERFACE_MODE_SGMII:
212 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
213 return 1250;
214 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
215 return 3125;
216 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
217 return 5156;
218 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
219 return 10313;
220 default:
221 return 0;
222 }
223 }
224
225 /**
226 * phylink_interface_max_speed() - get the maximum speed of a phy interface
227 * @interface: phy interface mode defined by &typedef phy_interface_t
228 *
229 * Determine the maximum speed of a phy interface. This is intended to help
230 * determine the correct speed to pass to the MAC when the phy is performing
231 * rate matching.
232 *
233 * Return: The maximum speed of @interface
234 */
phylink_interface_max_speed(phy_interface_t interface)235 static int phylink_interface_max_speed(phy_interface_t interface)
236 {
237 switch (interface) {
238 case PHY_INTERFACE_MODE_100BASEX:
239 case PHY_INTERFACE_MODE_REVRMII:
240 case PHY_INTERFACE_MODE_RMII:
241 case PHY_INTERFACE_MODE_SMII:
242 case PHY_INTERFACE_MODE_REVMII:
243 case PHY_INTERFACE_MODE_MII:
244 return SPEED_100;
245
246 case PHY_INTERFACE_MODE_TBI:
247 case PHY_INTERFACE_MODE_MOCA:
248 case PHY_INTERFACE_MODE_RTBI:
249 case PHY_INTERFACE_MODE_1000BASEX:
250 case PHY_INTERFACE_MODE_1000BASEKX:
251 case PHY_INTERFACE_MODE_TRGMII:
252 case PHY_INTERFACE_MODE_RGMII_TXID:
253 case PHY_INTERFACE_MODE_RGMII_RXID:
254 case PHY_INTERFACE_MODE_RGMII_ID:
255 case PHY_INTERFACE_MODE_RGMII:
256 case PHY_INTERFACE_MODE_PSGMII:
257 case PHY_INTERFACE_MODE_QSGMII:
258 case PHY_INTERFACE_MODE_QUSGMII:
259 case PHY_INTERFACE_MODE_SGMII:
260 case PHY_INTERFACE_MODE_GMII:
261 return SPEED_1000;
262
263 case PHY_INTERFACE_MODE_2500BASEX:
264 case PHY_INTERFACE_MODE_10G_QXGMII:
265 return SPEED_2500;
266
267 case PHY_INTERFACE_MODE_5GBASER:
268 return SPEED_5000;
269
270 case PHY_INTERFACE_MODE_XGMII:
271 case PHY_INTERFACE_MODE_RXAUI:
272 case PHY_INTERFACE_MODE_XAUI:
273 case PHY_INTERFACE_MODE_10GBASER:
274 case PHY_INTERFACE_MODE_10GKR:
275 case PHY_INTERFACE_MODE_USXGMII:
276 return SPEED_10000;
277
278 case PHY_INTERFACE_MODE_25GBASER:
279 return SPEED_25000;
280
281 case PHY_INTERFACE_MODE_XLGMII:
282 return SPEED_40000;
283
284 case PHY_INTERFACE_MODE_INTERNAL:
285 case PHY_INTERFACE_MODE_NA:
286 case PHY_INTERFACE_MODE_MAX:
287 /* No idea! Garbage in, unknown out */
288 return SPEED_UNKNOWN;
289 }
290
291 /* If we get here, someone forgot to add an interface mode above */
292 WARN_ON_ONCE(1);
293 return SPEED_UNKNOWN;
294 }
295
296 static struct {
297 unsigned long mask;
298 int speed;
299 unsigned int duplex;
300 unsigned int caps_bit;
301 } phylink_caps_params[] = {
302 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) },
303 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) },
304 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) },
305 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) },
306 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) },
307 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) },
308 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) },
309 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) },
310 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) },
311 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) },
312 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) },
313 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) },
314 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) },
315 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) },
316 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) },
317 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) },
318 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) },
319 };
320
321 /**
322 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps
323 * @caps: A set of MAC capabilities
324 *
325 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h
326 */
phylink_caps_to_link_caps(unsigned long caps)327 static unsigned long phylink_caps_to_link_caps(unsigned long caps)
328 {
329 unsigned long link_caps = 0;
330 int i;
331
332 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++)
333 if (caps & phylink_caps_params[i].mask)
334 link_caps |= phylink_caps_params[i].caps_bit;
335
336 return link_caps;
337 }
338
phylink_link_caps_to_mac_caps(unsigned long link_caps)339 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps)
340 {
341 unsigned long caps = 0;
342 int i;
343
344 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++)
345 if (link_caps & phylink_caps_params[i].caps_bit)
346 caps |= phylink_caps_params[i].mask;
347
348 return caps;
349 }
350
351 /**
352 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
353 * @linkmodes: ethtool linkmode mask (must be already initialised)
354 * @caps: bitmask of MAC capabilities
355 *
356 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
357 * supported by the @caps. @linkmodes must have been initialised previously.
358 */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)359 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
360 unsigned long caps)
361 {
362 unsigned long link_caps = phylink_caps_to_link_caps(caps);
363
364 if (caps & MAC_SYM_PAUSE)
365 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
366
367 if (caps & MAC_ASYM_PAUSE)
368 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
369
370 phy_caps_linkmodes(link_caps, linkmodes);
371 }
372
373 /**
374 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
375 * @config: pointer to a &struct phylink_config
376 * @max_speed: maximum speed
377 *
378 * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
379 * Any further motifications of config.mac_capabilities will override this.
380 */
phylink_limit_mac_speed(struct phylink_config * config,u32 max_speed)381 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
382 {
383 int i;
384
385 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
386 phylink_caps_params[i].speed > max_speed; i++)
387 config->mac_capabilities &= ~phylink_caps_params[i].mask;
388 }
389 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
390
391 /**
392 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
393 * @speed: the speed to search for
394 * @duplex: the duplex to search for
395 *
396 * Find the mac capability for a given speed and duplex.
397 *
398 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
399 * there were no matches.
400 */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)401 static unsigned long phylink_cap_from_speed_duplex(int speed,
402 unsigned int duplex)
403 {
404 int i;
405
406 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
407 if (speed == phylink_caps_params[i].speed &&
408 duplex == phylink_caps_params[i].duplex)
409 return phylink_caps_params[i].mask;
410 }
411
412 return 0;
413 }
414
415 /**
416 * phylink_get_capabilities() - get capabilities for a given MAC
417 * @interface: phy interface mode defined by &typedef phy_interface_t
418 * @mac_capabilities: bitmask of MAC capabilities
419 * @rate_matching: type of rate matching being performed
420 *
421 * Get the MAC capabilities that are supported by the @interface mode and
422 * @mac_capabilities.
423 */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)424 static unsigned long phylink_get_capabilities(phy_interface_t interface,
425 unsigned long mac_capabilities,
426 int rate_matching)
427 {
428 unsigned long link_caps = phy_caps_from_interface(interface);
429 int max_speed = phylink_interface_max_speed(interface);
430 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
431 unsigned long matched_caps = 0;
432
433 caps |= phylink_link_caps_to_mac_caps(link_caps);
434
435 switch (rate_matching) {
436 case RATE_MATCH_OPEN_LOOP:
437 /* TODO */
438 fallthrough;
439 case RATE_MATCH_NONE:
440 matched_caps = 0;
441 break;
442 case RATE_MATCH_PAUSE: {
443 /* The MAC must support asymmetric pause towards the local
444 * device for this. We could allow just symmetric pause, but
445 * then we might have to renegotiate if the link partner
446 * doesn't support pause. This is because there's no way to
447 * accept pause frames without transmitting them if we only
448 * support symmetric pause.
449 */
450 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
451 !(mac_capabilities & MAC_ASYM_PAUSE))
452 break;
453
454 /* We can't adapt if the MAC doesn't support the interface's
455 * max speed at full duplex.
456 */
457 if (mac_capabilities &
458 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL))
459 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
460 break;
461 }
462 case RATE_MATCH_CRS:
463 /* The MAC must support half duplex at the interface's max
464 * speed.
465 */
466 if (mac_capabilities &
467 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
468 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
469 matched_caps &= mac_capabilities;
470 }
471 break;
472 }
473
474 return (caps & mac_capabilities) | matched_caps;
475 }
476
477 /**
478 * phylink_validate_mask_caps() - Restrict link modes based on caps
479 * @supported: ethtool bitmask for supported link modes.
480 * @state: pointer to a &struct phylink_link_state.
481 * @mac_capabilities: bitmask of MAC capabilities
482 *
483 * Calculate the supported link modes based on @mac_capabilities, and restrict
484 * @supported and @state based on that. Use this function if your capabiliies
485 * aren't constant, such as if they vary depending on the interface.
486 */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)487 static void phylink_validate_mask_caps(unsigned long *supported,
488 struct phylink_link_state *state,
489 unsigned long mac_capabilities)
490 {
491 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
492 unsigned long caps;
493
494 phylink_set_port_modes(mask);
495 phylink_set(mask, Autoneg);
496 caps = phylink_get_capabilities(state->interface, mac_capabilities,
497 state->rate_matching);
498 phylink_caps_to_linkmodes(mask, caps);
499
500 linkmode_and(supported, supported, mask);
501 linkmode_and(state->advertising, state->advertising, mask);
502 }
503
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)504 static int phylink_validate_mac_and_pcs(struct phylink *pl,
505 unsigned long *supported,
506 struct phylink_link_state *state)
507 {
508 struct phylink_pcs *pcs = NULL;
509 unsigned long capabilities;
510 int ret;
511
512 /* Get the PCS for this interface mode */
513 if (pl->mac_ops->mac_select_pcs) {
514 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
515 if (IS_ERR(pcs))
516 return PTR_ERR(pcs);
517 }
518
519 if (pcs) {
520 /* The PCS, if present, must be setup before phylink_create()
521 * has been called. If the ops is not initialised, print an
522 * error and backtrace rather than oopsing the kernel.
523 */
524 if (!pcs->ops) {
525 phylink_err(pl, "interface %s: uninitialised PCS\n",
526 phy_modes(state->interface));
527 dump_stack();
528 return -EINVAL;
529 }
530
531 /* Ensure that this PCS supports the interface which the MAC
532 * returned it for. It is an error for the MAC to return a PCS
533 * that does not support the interface mode.
534 */
535 if (!phy_interface_empty(pcs->supported_interfaces) &&
536 !test_bit(state->interface, pcs->supported_interfaces)) {
537 phylink_err(pl, "MAC returned PCS which does not support %s\n",
538 phy_modes(state->interface));
539 return -EINVAL;
540 }
541
542 /* Validate the link parameters with the PCS */
543 if (pcs->ops->pcs_validate) {
544 ret = pcs->ops->pcs_validate(pcs, supported, state);
545 if (ret < 0 || phylink_is_empty_linkmode(supported))
546 return -EINVAL;
547
548 /* Ensure the advertising mask is a subset of the
549 * supported mask.
550 */
551 linkmode_and(state->advertising, state->advertising,
552 supported);
553 }
554 }
555
556 /* Then validate the link parameters with the MAC */
557 if (pl->mac_ops->mac_get_caps)
558 capabilities = pl->mac_ops->mac_get_caps(pl->config,
559 state->interface);
560 else
561 capabilities = pl->config->mac_capabilities;
562
563 phylink_validate_mask_caps(supported, state, capabilities);
564
565 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
566 }
567
phylink_validate_one(struct phylink * pl,struct phy_device * phy,const unsigned long * supported,const struct phylink_link_state * state,phy_interface_t interface,unsigned long * accum_supported,unsigned long * accum_advertising)568 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
569 const unsigned long *supported,
570 const struct phylink_link_state *state,
571 phy_interface_t interface,
572 unsigned long *accum_supported,
573 unsigned long *accum_advertising)
574 {
575 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
576 struct phylink_link_state tmp_state;
577
578 linkmode_copy(tmp_supported, supported);
579
580 tmp_state = *state;
581 tmp_state.interface = interface;
582
583 if (phy)
584 tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
585
586 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
587 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
588 interface, phy_modes(interface),
589 phy_rate_matching_to_str(tmp_state.rate_matching),
590 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
591
592 linkmode_or(accum_supported, accum_supported, tmp_supported);
593 linkmode_or(accum_advertising, accum_advertising,
594 tmp_state.advertising);
595 }
596 }
597
phylink_validate_mask(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)598 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
599 unsigned long *supported,
600 struct phylink_link_state *state,
601 const unsigned long *interfaces)
602 {
603 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
604 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
605 int interface;
606
607 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
608 phylink_validate_one(pl, phy, supported, state, interface,
609 all_s, all_adv);
610
611 linkmode_copy(supported, all_s);
612 linkmode_copy(state->advertising, all_adv);
613
614 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
615 }
616
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)617 static int phylink_validate(struct phylink *pl, unsigned long *supported,
618 struct phylink_link_state *state)
619 {
620 const unsigned long *interfaces = pl->config->supported_interfaces;
621
622 if (state->interface == PHY_INTERFACE_MODE_NA)
623 return phylink_validate_mask(pl, NULL, supported, state,
624 interfaces);
625
626 if (!test_bit(state->interface, interfaces))
627 return -EINVAL;
628
629 return phylink_validate_mac_and_pcs(pl, supported, state);
630 }
631
phylink_fill_fixedlink_supported(unsigned long * supported)632 static void phylink_fill_fixedlink_supported(unsigned long *supported)
633 {
634 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported);
635 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported);
636 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported);
637 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported);
638 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported);
639 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported);
640 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported);
641 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported);
642 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported);
643 }
644
phylink_parse_fixedlink(struct phylink * pl,const struct fwnode_handle * fwnode)645 static int phylink_parse_fixedlink(struct phylink *pl,
646 const struct fwnode_handle *fwnode)
647 {
648 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, };
649 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
650 const struct link_capabilities *c;
651 struct fwnode_handle *fixed_node;
652 struct gpio_desc *desc;
653 u32 speed;
654 int ret;
655
656 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
657 if (fixed_node) {
658 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
659
660 pl->link_config.speed = speed;
661 pl->link_config.duplex = DUPLEX_HALF;
662
663 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
664 pl->link_config.duplex = DUPLEX_FULL;
665
666 /* We treat the "pause" and "asym-pause" terminology as
667 * defining the link partner's ability.
668 */
669 if (fwnode_property_read_bool(fixed_node, "pause"))
670 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
671 pl->link_config.lp_advertising);
672 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
673 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
674 pl->link_config.lp_advertising);
675
676 if (ret == 0) {
677 desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
678 GPIOD_IN, "?");
679
680 if (!IS_ERR(desc))
681 pl->link_gpio = desc;
682 else if (desc == ERR_PTR(-EPROBE_DEFER))
683 ret = -EPROBE_DEFER;
684 }
685 fwnode_handle_put(fixed_node);
686
687 if (ret)
688 return ret;
689 } else {
690 u32 prop[5];
691
692 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
693 NULL, 0);
694 if (ret != ARRAY_SIZE(prop)) {
695 phylink_err(pl, "broken fixed-link?\n");
696 return -EINVAL;
697 }
698
699 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
700 prop, ARRAY_SIZE(prop));
701 if (!ret) {
702 pl->link_config.duplex = prop[1] ?
703 DUPLEX_FULL : DUPLEX_HALF;
704 pl->link_config.speed = prop[2];
705 if (prop[3])
706 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
707 pl->link_config.lp_advertising);
708 if (prop[4])
709 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
710 pl->link_config.lp_advertising);
711 }
712 }
713
714 if (pl->link_config.speed > SPEED_1000 &&
715 pl->link_config.duplex != DUPLEX_FULL)
716 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
717 pl->link_config.speed);
718
719 linkmode_zero(pl->supported);
720 phylink_fill_fixedlink_supported(pl->supported);
721
722 linkmode_copy(pl->link_config.advertising, pl->supported);
723 phylink_validate(pl, pl->supported, &pl->link_config);
724
725 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex,
726 pl->supported, true);
727 if (c)
728 linkmode_and(match, pl->supported, c->linkmodes);
729
730 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);
731 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);
732 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);
733 linkmode_and(pl->supported, pl->supported, mask);
734
735 phylink_set(pl->supported, MII);
736
737 if (c) {
738 linkmode_or(pl->supported, pl->supported, match);
739 linkmode_or(pl->link_config.lp_advertising,
740 pl->link_config.lp_advertising, match);
741 } else {
742 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
743 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
744 pl->link_config.speed);
745 }
746
747 linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
748 pl->supported);
749
750 pl->link_config.link = 1;
751 pl->link_config.an_complete = 1;
752
753 return 0;
754 }
755
phylink_parse_mode(struct phylink * pl,const struct fwnode_handle * fwnode)756 static int phylink_parse_mode(struct phylink *pl,
757 const struct fwnode_handle *fwnode)
758 {
759 struct fwnode_handle *dn;
760 const char *managed;
761 unsigned long caps;
762
763 if (pl->config->default_an_inband)
764 pl->cfg_link_an_mode = MLO_AN_INBAND;
765
766 dn = fwnode_get_named_child_node(fwnode, "fixed-link");
767 if (dn || fwnode_property_present(fwnode, "fixed-link"))
768 pl->cfg_link_an_mode = MLO_AN_FIXED;
769 fwnode_handle_put(dn);
770
771 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
772 strcmp(managed, "in-band-status") == 0)) {
773 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
774 phylink_err(pl,
775 "can't use both fixed-link and in-band-status\n");
776 return -EINVAL;
777 }
778
779 pl->cfg_link_an_mode = MLO_AN_INBAND;
780 }
781
782 if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
783 linkmode_zero(pl->supported);
784 phylink_set(pl->supported, MII);
785 phylink_set(pl->supported, Autoneg);
786 phylink_set(pl->supported, Asym_Pause);
787 phylink_set(pl->supported, Pause);
788
789 switch (pl->link_config.interface) {
790 case PHY_INTERFACE_MODE_SGMII:
791 case PHY_INTERFACE_MODE_PSGMII:
792 case PHY_INTERFACE_MODE_QSGMII:
793 case PHY_INTERFACE_MODE_QUSGMII:
794 case PHY_INTERFACE_MODE_RGMII:
795 case PHY_INTERFACE_MODE_RGMII_ID:
796 case PHY_INTERFACE_MODE_RGMII_RXID:
797 case PHY_INTERFACE_MODE_RGMII_TXID:
798 case PHY_INTERFACE_MODE_RTBI:
799 case PHY_INTERFACE_MODE_1000BASEX:
800 case PHY_INTERFACE_MODE_2500BASEX:
801 case PHY_INTERFACE_MODE_5GBASER:
802 case PHY_INTERFACE_MODE_25GBASER:
803 case PHY_INTERFACE_MODE_USXGMII:
804 case PHY_INTERFACE_MODE_10G_QXGMII:
805 case PHY_INTERFACE_MODE_10GKR:
806 case PHY_INTERFACE_MODE_10GBASER:
807 case PHY_INTERFACE_MODE_XLGMII:
808 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
809 caps = phylink_get_capabilities(pl->link_config.interface, caps,
810 RATE_MATCH_NONE);
811 phylink_caps_to_linkmodes(pl->supported, caps);
812 break;
813
814 default:
815 phylink_err(pl,
816 "incorrect link mode %s for in-band status\n",
817 phy_modes(pl->link_config.interface));
818 return -EINVAL;
819 }
820
821 linkmode_copy(pl->link_config.advertising, pl->supported);
822
823 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
824 phylink_err(pl,
825 "failed to validate link configuration for in-band status\n");
826 return -EINVAL;
827 }
828 }
829
830 return 0;
831 }
832
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)833 static void phylink_apply_manual_flow(struct phylink *pl,
834 struct phylink_link_state *state)
835 {
836 /* If autoneg is disabled, pause AN is also disabled */
837 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
838 state->advertising))
839 state->pause &= ~MLO_PAUSE_AN;
840
841 /* Manual configuration of pause modes */
842 if (!(pl->link_config.pause & MLO_PAUSE_AN))
843 state->pause = pl->link_config.pause;
844 }
845
phylink_resolve_an_pause(struct phylink_link_state * state)846 static void phylink_resolve_an_pause(struct phylink_link_state *state)
847 {
848 bool tx_pause, rx_pause;
849
850 if (state->duplex == DUPLEX_FULL) {
851 linkmode_resolve_pause(state->advertising,
852 state->lp_advertising,
853 &tx_pause, &rx_pause);
854 if (tx_pause)
855 state->pause |= MLO_PAUSE_TX;
856 if (rx_pause)
857 state->pause |= MLO_PAUSE_RX;
858 }
859 }
860
phylink_pcs_inband_caps(struct phylink_pcs * pcs,phy_interface_t interface)861 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
862 phy_interface_t interface)
863 {
864 if (pcs && pcs->ops->pcs_inband_caps)
865 return pcs->ops->pcs_inband_caps(pcs, interface);
866
867 return 0;
868 }
869
phylink_pcs_pre_config(struct phylink_pcs * pcs,phy_interface_t interface)870 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
871 phy_interface_t interface)
872 {
873 if (pcs && pcs->ops->pcs_pre_config)
874 pcs->ops->pcs_pre_config(pcs, interface);
875 }
876
phylink_pcs_post_config(struct phylink_pcs * pcs,phy_interface_t interface)877 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
878 phy_interface_t interface)
879 {
880 int err = 0;
881
882 if (pcs && pcs->ops->pcs_post_config)
883 err = pcs->ops->pcs_post_config(pcs, interface);
884
885 return err;
886 }
887
phylink_pcs_disable(struct phylink_pcs * pcs)888 static void phylink_pcs_disable(struct phylink_pcs *pcs)
889 {
890 if (pcs && pcs->ops->pcs_disable)
891 pcs->ops->pcs_disable(pcs);
892 }
893
phylink_pcs_enable(struct phylink_pcs * pcs)894 static int phylink_pcs_enable(struct phylink_pcs *pcs)
895 {
896 int err = 0;
897
898 if (pcs && pcs->ops->pcs_enable)
899 err = pcs->ops->pcs_enable(pcs);
900
901 return err;
902 }
903
phylink_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,const struct phylink_link_state * state,bool permit_pause_to_mac)904 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
905 const struct phylink_link_state *state,
906 bool permit_pause_to_mac)
907 {
908 if (!pcs)
909 return 0;
910
911 return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
912 state->advertising, permit_pause_to_mac);
913 }
914
phylink_pcs_link_up(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,int speed,int duplex)915 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
916 phy_interface_t interface, int speed,
917 int duplex)
918 {
919 if (pcs && pcs->ops->pcs_link_up)
920 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
921 }
922
phylink_pcs_disable_eee(struct phylink_pcs * pcs)923 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs)
924 {
925 if (pcs && pcs->ops->pcs_disable_eee)
926 pcs->ops->pcs_disable_eee(pcs);
927 }
928
phylink_pcs_enable_eee(struct phylink_pcs * pcs)929 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs)
930 {
931 if (pcs && pcs->ops->pcs_enable_eee)
932 pcs->ops->pcs_enable_eee(pcs);
933 }
934
935 /* Query inband for a specific interface mode, asking the MAC for the
936 * PCS which will be used to handle the interface mode.
937 */
phylink_inband_caps(struct phylink * pl,phy_interface_t interface)938 static unsigned int phylink_inband_caps(struct phylink *pl,
939 phy_interface_t interface)
940 {
941 struct phylink_pcs *pcs;
942
943 if (!pl->mac_ops->mac_select_pcs)
944 return 0;
945
946 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
947 if (!pcs)
948 return 0;
949
950 return phylink_pcs_inband_caps(pcs, interface);
951 }
952
phylink_pcs_poll_stop(struct phylink * pl)953 static void phylink_pcs_poll_stop(struct phylink *pl)
954 {
955 if (pl->cfg_link_an_mode == MLO_AN_INBAND)
956 timer_delete(&pl->link_poll);
957 }
958
phylink_pcs_poll_start(struct phylink * pl)959 static void phylink_pcs_poll_start(struct phylink *pl)
960 {
961 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
962 mod_timer(&pl->link_poll, jiffies + HZ);
963 }
964
phylink_pcs_pre_init(struct phylink * pl,struct phylink_pcs * pcs)965 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
966 {
967 int ret = 0;
968
969 /* Signal to PCS driver that MAC requires RX clock for init */
970 if (pl->config->mac_requires_rxc)
971 pcs->rxc_always_on = true;
972
973 if (pcs->ops->pcs_pre_init)
974 ret = pcs->ops->pcs_pre_init(pcs);
975
976 return ret;
977 }
978 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
979
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)980 static void phylink_mac_config(struct phylink *pl,
981 const struct phylink_link_state *state)
982 {
983 struct phylink_link_state st = *state;
984
985 /* Stop drivers incorrectly using these */
986 linkmode_zero(st.lp_advertising);
987 st.speed = SPEED_UNKNOWN;
988 st.duplex = DUPLEX_UNKNOWN;
989 st.an_complete = false;
990 st.link = false;
991
992 phylink_dbg(pl,
993 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
994 __func__, phylink_an_mode_str(pl->act_link_an_mode),
995 phy_modes(st.interface),
996 phy_rate_matching_to_str(st.rate_matching),
997 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
998 st.pause);
999
1000 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st);
1001 }
1002
phylink_pcs_an_restart(struct phylink * pl)1003 static void phylink_pcs_an_restart(struct phylink *pl)
1004 {
1005 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1006 pl->link_config.advertising) &&
1007 phy_interface_mode_is_8023z(pl->link_config.interface) &&
1008 phylink_autoneg_inband(pl->act_link_an_mode))
1009 pl->pcs->ops->pcs_an_restart(pl->pcs);
1010 }
1011
1012 /**
1013 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1014 * @pl: a pointer to a &struct phylink returned from phylink_create()
1015 * @pcs: a pointer to &struct phylink_pcs
1016 * @interface: interface mode to be used
1017 * @advertising: adertisement ethtool link mode mask
1018 *
1019 * Determines the negotiation mode to be used by the PCS, and returns
1020 * one of:
1021 *
1022 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1023 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1024 * will be used.
1025 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1026 * disabled
1027 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1028 *
1029 * Note: this is for cases where the PCS itself is involved in negotiation
1030 * (e.g. Clause 37, SGMII and similar) not Clause 73.
1031 */
phylink_pcs_neg_mode(struct phylink * pl,struct phylink_pcs * pcs,phy_interface_t interface,const unsigned long * advertising)1032 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,
1033 phy_interface_t interface,
1034 const unsigned long *advertising)
1035 {
1036 unsigned int pcs_ib_caps = 0;
1037 unsigned int phy_ib_caps = 0;
1038 unsigned int neg_mode, mode;
1039 enum {
1040 INBAND_CISCO_SGMII,
1041 INBAND_BASEX,
1042 } type;
1043
1044 mode = pl->req_link_an_mode;
1045
1046 pl->phy_ib_mode = 0;
1047
1048 switch (interface) {
1049 case PHY_INTERFACE_MODE_SGMII:
1050 case PHY_INTERFACE_MODE_QSGMII:
1051 case PHY_INTERFACE_MODE_QUSGMII:
1052 case PHY_INTERFACE_MODE_USXGMII:
1053 case PHY_INTERFACE_MODE_10G_QXGMII:
1054 /* These protocols are designed for use with a PHY which
1055 * communicates its negotiation result back to the MAC via
1056 * inband communication. Note: there exist PHYs that run
1057 * with SGMII but do not send the inband data.
1058 */
1059 type = INBAND_CISCO_SGMII;
1060 break;
1061
1062 case PHY_INTERFACE_MODE_1000BASEX:
1063 case PHY_INTERFACE_MODE_2500BASEX:
1064 /* 1000base-X is designed for use media-side for Fibre
1065 * connections, and thus the Autoneg bit needs to be
1066 * taken into account. We also do this for 2500base-X
1067 * as well, but drivers may not support this, so may
1068 * need to override this.
1069 */
1070 type = INBAND_BASEX;
1071 break;
1072
1073 default:
1074 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE;
1075 pl->act_link_an_mode = mode;
1076 return;
1077 }
1078
1079 if (pcs)
1080 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);
1081
1082 if (pl->phydev)
1083 phy_ib_caps = phy_inband_caps(pl->phydev, interface);
1084
1085 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",
1086 phy_modes(interface), pcs_ib_caps, phy_ib_caps);
1087
1088 if (!phylink_autoneg_inband(mode)) {
1089 bool pcs_ib_only = false;
1090 bool phy_ib_only = false;
1091
1092 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) {
1093 /* PCS supports reporting in-band capabilities, and
1094 * supports more than disable mode.
1095 */
1096 if (pcs_ib_caps & LINK_INBAND_DISABLE)
1097 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1098 else if (pcs_ib_caps & LINK_INBAND_ENABLE)
1099 pcs_ib_only = true;
1100 }
1101
1102 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) {
1103 /* PHY supports in-band capabilities, and supports
1104 * more than disable mode.
1105 */
1106 if (phy_ib_caps & LINK_INBAND_DISABLE)
1107 pl->phy_ib_mode = LINK_INBAND_DISABLE;
1108 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1109 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1110 else if (phy_ib_caps & LINK_INBAND_ENABLE)
1111 phy_ib_only = true;
1112 }
1113
1114 /* If either the PCS or PHY requires inband to be enabled,
1115 * this is an invalid configuration. Provide a diagnostic
1116 * message for this case, but don't try to force the issue.
1117 */
1118 if (pcs_ib_only || phy_ib_only)
1119 phylink_warn(pl,
1120 "firmware wants %s mode, but %s%s%s requires inband\n",
1121 phylink_an_mode_str(mode),
1122 pcs_ib_only ? "PCS" : "",
1123 pcs_ib_only && phy_ib_only ? " and " : "",
1124 phy_ib_only ? "PHY" : "");
1125
1126 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1127 } else if (type == INBAND_CISCO_SGMII || pl->phydev) {
1128 /* For SGMII modes which are designed to be used with PHYs, or
1129 * Base-X with a PHY, we try to use in-band mode where-ever
1130 * possible. However, there are some PHYs e.g. BCM84881 which
1131 * do not support in-band.
1132 */
1133 const unsigned int inband_ok = LINK_INBAND_ENABLE |
1134 LINK_INBAND_BYPASS;
1135 const unsigned int outband_ok = LINK_INBAND_DISABLE |
1136 LINK_INBAND_BYPASS;
1137 /* PCS PHY
1138 * D E D E
1139 * 0 0 0 0 no information inband enabled
1140 * 1 0 0 0 pcs doesn't support outband
1141 * 0 1 0 0 pcs required inband enabled
1142 * 1 1 0 0 pcs optional inband enabled
1143 * 0 0 1 0 phy doesn't support outband
1144 * 1 0 1 0 pcs+phy doesn't support outband
1145 * 0 1 1 0 pcs required, phy doesn't support, invalid
1146 * 1 1 1 0 pcs optional, phy doesn't support, outband
1147 * 0 0 0 1 phy required inband enabled
1148 * 1 0 0 1 pcs doesn't support, phy required, invalid
1149 * 0 1 0 1 pcs+phy required inband enabled
1150 * 1 1 0 1 pcs optional, phy required inband enabled
1151 * 0 0 1 1 phy optional inband enabled
1152 * 1 0 1 1 pcs doesn't support, phy optional, outband
1153 * 0 1 1 1 pcs required, phy optional inband enabled
1154 * 1 1 1 1 pcs+phy optional inband enabled
1155 */
1156 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) &&
1157 (!phy_ib_caps || phy_ib_caps & inband_ok)) {
1158 /* In-band supported or unknown at both ends. Enable
1159 * in-band mode with or without bypass at the PHY.
1160 */
1161 if (phy_ib_caps & LINK_INBAND_ENABLE)
1162 pl->phy_ib_mode = LINK_INBAND_ENABLE;
1163 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1164 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1165
1166 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1167 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) &&
1168 (!phy_ib_caps || phy_ib_caps & outband_ok)) {
1169 /* Either in-band not supported at at least one end.
1170 * In-band bypass at the other end is possible.
1171 */
1172 if (phy_ib_caps & LINK_INBAND_DISABLE)
1173 pl->phy_ib_mode = LINK_INBAND_DISABLE;
1174 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1175 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1176
1177 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1178 if (pl->phydev)
1179 mode = MLO_AN_PHY;
1180 } else {
1181 /* invalid */
1182 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",
1183 phy_modes(interface));
1184 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1185 }
1186 } else {
1187 /* For Base-X without a PHY */
1188 if (pcs_ib_caps == LINK_INBAND_DISABLE)
1189 /* If the PCS doesn't support inband, then inband must
1190 * be disabled.
1191 */
1192 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1193 else if (pcs_ib_caps == LINK_INBAND_ENABLE)
1194 /* If the PCS requires inband, then inband must always
1195 * be enabled.
1196 */
1197 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1198 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1199 advertising))
1200 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1201 else
1202 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1203 }
1204
1205 pl->pcs_neg_mode = neg_mode;
1206 pl->act_link_an_mode = mode;
1207 }
1208
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1209 static void phylink_major_config(struct phylink *pl, bool restart,
1210 const struct phylink_link_state *state)
1211 {
1212 struct phylink_pcs *pcs = NULL;
1213 bool pcs_changed = false;
1214 unsigned int rate_kbd;
1215 int err;
1216
1217 phylink_dbg(pl, "major config, requested %s/%s\n",
1218 phylink_an_mode_str(pl->req_link_an_mode),
1219 phy_modes(state->interface));
1220
1221 pl->major_config_failed = false;
1222
1223 if (pl->mac_ops->mac_select_pcs) {
1224 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1225 if (IS_ERR(pcs)) {
1226 phylink_err(pl,
1227 "mac_select_pcs unexpectedly failed: %pe\n",
1228 pcs);
1229
1230 pl->major_config_failed = true;
1231 return;
1232 }
1233
1234 pcs_changed = pl->pcs != pcs;
1235 }
1236
1237 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising);
1238
1239 phylink_dbg(pl, "major config, active %s/%s/%s\n",
1240 phylink_an_mode_str(pl->act_link_an_mode),
1241 phylink_pcs_mode_str(pl->pcs_neg_mode),
1242 phy_modes(state->interface));
1243
1244 phylink_pcs_poll_stop(pl);
1245
1246 if (pl->mac_ops->mac_prepare) {
1247 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode,
1248 state->interface);
1249 if (err < 0) {
1250 phylink_err(pl, "mac_prepare failed: %pe\n",
1251 ERR_PTR(err));
1252 pl->major_config_failed = true;
1253 return;
1254 }
1255 }
1256
1257 /* If we have a new PCS, switch to the new PCS after preparing the MAC
1258 * for the change.
1259 */
1260 if (pcs_changed) {
1261 phylink_pcs_disable(pl->pcs);
1262
1263 if (pl->pcs)
1264 pl->pcs->phylink = NULL;
1265
1266 pcs->phylink = pl;
1267
1268 pl->pcs = pcs;
1269 }
1270
1271 if (pl->pcs)
1272 phylink_pcs_pre_config(pl->pcs, state->interface);
1273
1274 phylink_mac_config(pl, state);
1275
1276 if (pl->pcs) {
1277 err = phylink_pcs_post_config(pl->pcs, state->interface);
1278 if (err < 0) {
1279 phylink_err(pl, "pcs_post_config failed: %pe\n",
1280 ERR_PTR(err));
1281
1282 pl->major_config_failed = true;
1283 }
1284 }
1285
1286 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1287 phylink_pcs_enable(pl->pcs);
1288
1289 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state,
1290 !!(pl->link_config.pause & MLO_PAUSE_AN));
1291 if (err < 0) {
1292 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err));
1293 pl->major_config_failed = true;
1294 } else if (err > 0) {
1295 restart = true;
1296 }
1297
1298 if (restart)
1299 phylink_pcs_an_restart(pl);
1300
1301 if (pl->mac_ops->mac_finish) {
1302 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode,
1303 state->interface);
1304 if (err < 0) {
1305 phylink_err(pl, "mac_finish failed: %pe\n",
1306 ERR_PTR(err));
1307
1308 pl->major_config_failed = true;
1309 }
1310 }
1311
1312 if (pl->phydev && pl->phy_ib_mode) {
1313 err = phy_config_inband(pl->phydev, pl->phy_ib_mode);
1314 if (err < 0) {
1315 phylink_err(pl, "phy_config_inband: %pe\n",
1316 ERR_PTR(err));
1317
1318 pl->major_config_failed = true;
1319 }
1320 }
1321
1322 if (pl->sfp_bus) {
1323 rate_kbd = phylink_interface_signal_rate(state->interface);
1324 if (rate_kbd)
1325 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1326 }
1327
1328 phylink_pcs_poll_start(pl);
1329 }
1330
1331 /*
1332 * Reconfigure for a change of inband advertisement.
1333 * If we have a separate PCS, we only need to call its pcs_config() method,
1334 * and then restart AN if it indicates something changed. Otherwise, we do
1335 * the full MAC reconfiguration.
1336 */
phylink_change_inband_advert(struct phylink * pl)1337 static int phylink_change_inband_advert(struct phylink *pl)
1338 {
1339 int ret;
1340
1341 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1342 return 0;
1343
1344 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1345 phylink_an_mode_str(pl->req_link_an_mode),
1346 phy_modes(pl->link_config.interface),
1347 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1348 pl->link_config.pause);
1349
1350 /* Recompute the PCS neg mode */
1351 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface,
1352 pl->link_config.advertising);
1353
1354 /* Modern PCS-based method; update the advert at the PCS, and
1355 * restart negotiation if the pcs_config() helper indicates that
1356 * the programmed advertisement has changed.
1357 */
1358 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config,
1359 !!(pl->link_config.pause & MLO_PAUSE_AN));
1360 if (ret < 0)
1361 return ret;
1362
1363 if (ret > 0)
1364 phylink_pcs_an_restart(pl);
1365
1366 return 0;
1367 }
1368
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1369 static void phylink_mac_pcs_get_state(struct phylink *pl,
1370 struct phylink_link_state *state)
1371 {
1372 struct phylink_pcs *pcs;
1373 bool autoneg;
1374
1375 linkmode_copy(state->advertising, pl->link_config.advertising);
1376 linkmode_zero(state->lp_advertising);
1377 state->interface = pl->link_config.interface;
1378 state->rate_matching = pl->link_config.rate_matching;
1379 state->an_complete = 0;
1380 state->link = 1;
1381
1382 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
1383 if (autoneg) {
1384 state->speed = SPEED_UNKNOWN;
1385 state->duplex = DUPLEX_UNKNOWN;
1386 state->pause = MLO_PAUSE_NONE;
1387 } else {
1388 state->speed = pl->link_config.speed;
1389 state->duplex = pl->link_config.duplex;
1390 state->pause = pl->link_config.pause;
1391 }
1392
1393 pcs = pl->pcs;
1394 if (pcs)
1395 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state);
1396 else
1397 state->link = 0;
1398 }
1399
1400 /* The fixed state is... fixed except for the link state,
1401 * which may be determined by a GPIO or a callback.
1402 */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1403 static void phylink_get_fixed_state(struct phylink *pl,
1404 struct phylink_link_state *state)
1405 {
1406 *state = pl->link_config;
1407 if (pl->config->get_fixed_state)
1408 pl->config->get_fixed_state(pl->config, state);
1409 else if (pl->link_gpio)
1410 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1411
1412 state->pause = MLO_PAUSE_NONE;
1413 phylink_resolve_an_pause(state);
1414 }
1415
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1416 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1417 {
1418 struct phylink_link_state link_state;
1419
1420 switch (pl->req_link_an_mode) {
1421 case MLO_AN_PHY:
1422 link_state = pl->phy_state;
1423 break;
1424
1425 case MLO_AN_FIXED:
1426 phylink_get_fixed_state(pl, &link_state);
1427 break;
1428
1429 case MLO_AN_INBAND:
1430 link_state = pl->link_config;
1431 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1432 link_state.pause = MLO_PAUSE_NONE;
1433 break;
1434
1435 default: /* can't happen */
1436 return;
1437 }
1438
1439 link_state.link = false;
1440
1441 phylink_apply_manual_flow(pl, &link_state);
1442 phylink_major_config(pl, force_restart, &link_state);
1443 }
1444
phylink_pause_to_str(int pause)1445 static const char *phylink_pause_to_str(int pause)
1446 {
1447 switch (pause & MLO_PAUSE_TXRX_MASK) {
1448 case MLO_PAUSE_TX | MLO_PAUSE_RX:
1449 return "rx/tx";
1450 case MLO_PAUSE_TX:
1451 return "tx";
1452 case MLO_PAUSE_RX:
1453 return "rx";
1454 default:
1455 return "off";
1456 }
1457 }
1458
phylink_deactivate_lpi(struct phylink * pl)1459 static void phylink_deactivate_lpi(struct phylink *pl)
1460 {
1461 if (pl->mac_enable_tx_lpi) {
1462 pl->mac_enable_tx_lpi = false;
1463
1464 phylink_dbg(pl, "disabling LPI\n");
1465
1466 pl->mac_ops->mac_disable_tx_lpi(pl->config);
1467
1468 phylink_pcs_disable_eee(pl->pcs);
1469 }
1470 }
1471
phylink_activate_lpi(struct phylink * pl)1472 static void phylink_activate_lpi(struct phylink *pl)
1473 {
1474 int err;
1475
1476 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) {
1477 phylink_dbg(pl, "MAC does not support LPI with %s\n",
1478 phy_modes(pl->cur_interface));
1479 return;
1480 }
1481
1482 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n",
1483 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop);
1484
1485 phylink_pcs_enable_eee(pl->pcs);
1486
1487 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer,
1488 pl->mac_tx_clk_stop);
1489 if (err) {
1490 phylink_pcs_disable_eee(pl->pcs);
1491 phylink_err(pl, "%ps() failed: %pe\n",
1492 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err));
1493 return;
1494 }
1495
1496 pl->mac_enable_tx_lpi = true;
1497 }
1498
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1499 static void phylink_link_up(struct phylink *pl,
1500 struct phylink_link_state link_state)
1501 {
1502 struct net_device *ndev = pl->netdev;
1503 int speed, duplex;
1504 bool rx_pause;
1505
1506 speed = link_state.speed;
1507 duplex = link_state.duplex;
1508 rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1509
1510 switch (link_state.rate_matching) {
1511 case RATE_MATCH_PAUSE:
1512 /* The PHY is doing rate matchion from the media rate (in
1513 * the link_state) to the interface speed, and will send
1514 * pause frames to the MAC to limit its transmission speed.
1515 */
1516 speed = phylink_interface_max_speed(link_state.interface);
1517 duplex = DUPLEX_FULL;
1518 rx_pause = true;
1519 break;
1520
1521 case RATE_MATCH_CRS:
1522 /* The PHY is doing rate matchion from the media rate (in
1523 * the link_state) to the interface speed, and will cause
1524 * collisions to the MAC to limit its transmission speed.
1525 */
1526 speed = phylink_interface_max_speed(link_state.interface);
1527 duplex = DUPLEX_HALF;
1528 break;
1529 }
1530
1531 pl->cur_interface = link_state.interface;
1532
1533 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed,
1534 duplex);
1535
1536 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode,
1537 pl->cur_interface, speed, duplex,
1538 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1539
1540 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi)
1541 phylink_activate_lpi(pl);
1542
1543 if (ndev)
1544 netif_carrier_on(ndev);
1545
1546 phylink_info(pl,
1547 "Link is Up - %s/%s - flow control %s\n",
1548 phy_speed_to_str(link_state.speed),
1549 phy_duplex_to_str(link_state.duplex),
1550 phylink_pause_to_str(link_state.pause));
1551 }
1552
phylink_link_down(struct phylink * pl)1553 static void phylink_link_down(struct phylink *pl)
1554 {
1555 struct net_device *ndev = pl->netdev;
1556
1557 if (ndev)
1558 netif_carrier_off(ndev);
1559
1560 phylink_deactivate_lpi(pl);
1561
1562 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode,
1563 pl->cur_interface);
1564 phylink_info(pl, "Link is Down\n");
1565 }
1566
phylink_link_is_up(struct phylink * pl)1567 static bool phylink_link_is_up(struct phylink *pl)
1568 {
1569 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state;
1570 }
1571
phylink_resolve(struct work_struct * w)1572 static void phylink_resolve(struct work_struct *w)
1573 {
1574 struct phylink *pl = container_of(w, struct phylink, resolve);
1575 struct phylink_link_state link_state;
1576 bool mac_config = false;
1577 bool retrigger = false;
1578 bool cur_link_state;
1579
1580 mutex_lock(&pl->state_mutex);
1581 cur_link_state = phylink_link_is_up(pl);
1582
1583 if (pl->phylink_disable_state) {
1584 pl->link_failed = false;
1585 link_state.link = false;
1586 } else if (pl->link_failed) {
1587 link_state.link = false;
1588 retrigger = true;
1589 } else if (pl->act_link_an_mode == MLO_AN_FIXED) {
1590 phylink_get_fixed_state(pl, &link_state);
1591 mac_config = link_state.link;
1592 } else if (pl->act_link_an_mode == MLO_AN_PHY) {
1593 link_state = pl->phy_state;
1594 mac_config = link_state.link;
1595 } else {
1596 phylink_mac_pcs_get_state(pl, &link_state);
1597
1598 /* The PCS may have a latching link-fail indicator. If the link
1599 * was up, bring the link down and re-trigger the resolve.
1600 * Otherwise, re-read the PCS state to get the current status
1601 * of the link.
1602 */
1603 if (!link_state.link) {
1604 if (cur_link_state)
1605 retrigger = true;
1606 else
1607 phylink_mac_pcs_get_state(pl, &link_state);
1608 }
1609
1610 /* If we have a phy, the "up" state is the union of both the
1611 * PHY and the MAC
1612 */
1613 if (pl->phydev)
1614 link_state.link &= pl->phy_state.link;
1615
1616 /* Only update if the PHY link is up */
1617 if (pl->phydev && pl->phy_state.link) {
1618 /* If the interface has changed, force a link down
1619 * event if the link isn't already down, and re-resolve.
1620 */
1621 if (link_state.interface != pl->phy_state.interface) {
1622 retrigger = true;
1623 link_state.link = false;
1624 }
1625
1626 link_state.interface = pl->phy_state.interface;
1627
1628 /* If we are doing rate matching, then the link
1629 * speed/duplex comes from the PHY
1630 */
1631 if (pl->phy_state.rate_matching) {
1632 link_state.rate_matching =
1633 pl->phy_state.rate_matching;
1634 link_state.speed = pl->phy_state.speed;
1635 link_state.duplex = pl->phy_state.duplex;
1636 }
1637
1638 /* If we have a PHY, we need to update with the PHY
1639 * flow control bits.
1640 */
1641 link_state.pause = pl->phy_state.pause;
1642 mac_config = true;
1643 }
1644 }
1645
1646 if (pl->act_link_an_mode != MLO_AN_FIXED)
1647 phylink_apply_manual_flow(pl, &link_state);
1648
1649 if (mac_config) {
1650 if (link_state.interface != pl->link_config.interface) {
1651 /* The interface has changed, force the link down and
1652 * then reconfigure.
1653 */
1654 if (cur_link_state) {
1655 phylink_link_down(pl);
1656 cur_link_state = false;
1657 }
1658 phylink_major_config(pl, false, &link_state);
1659 pl->link_config.interface = link_state.interface;
1660 }
1661 }
1662
1663 /* If configuration of the interface failed, force the link down
1664 * until we get a successful configuration.
1665 */
1666 if (pl->major_config_failed)
1667 link_state.link = false;
1668
1669 if (link_state.link != cur_link_state) {
1670 pl->old_link_state = link_state.link;
1671 if (!link_state.link)
1672 phylink_link_down(pl);
1673 else
1674 phylink_link_up(pl, link_state);
1675 }
1676 if (!link_state.link && retrigger) {
1677 pl->link_failed = false;
1678 queue_work(system_power_efficient_wq, &pl->resolve);
1679 }
1680 mutex_unlock(&pl->state_mutex);
1681 }
1682
phylink_run_resolve(struct phylink * pl)1683 static void phylink_run_resolve(struct phylink *pl)
1684 {
1685 if (!pl->phylink_disable_state)
1686 queue_work(system_power_efficient_wq, &pl->resolve);
1687 }
1688
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1689 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1690 {
1691 unsigned long state = pl->phylink_disable_state;
1692
1693 set_bit(bit, &pl->phylink_disable_state);
1694 if (state == 0) {
1695 queue_work(system_power_efficient_wq, &pl->resolve);
1696 flush_work(&pl->resolve);
1697 }
1698 }
1699
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1700 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1701 {
1702 clear_bit(bit, &pl->phylink_disable_state);
1703 phylink_run_resolve(pl);
1704 }
1705
phylink_fixed_poll(struct timer_list * t)1706 static void phylink_fixed_poll(struct timer_list *t)
1707 {
1708 struct phylink *pl = container_of(t, struct phylink, link_poll);
1709
1710 mod_timer(t, jiffies + HZ);
1711
1712 phylink_run_resolve(pl);
1713 }
1714
1715 static const struct sfp_upstream_ops sfp_phylink_ops;
1716
phylink_register_sfp(struct phylink * pl,const struct fwnode_handle * fwnode)1717 static int phylink_register_sfp(struct phylink *pl,
1718 const struct fwnode_handle *fwnode)
1719 {
1720 struct sfp_bus *bus;
1721 int ret;
1722
1723 if (!fwnode)
1724 return 0;
1725
1726 bus = sfp_bus_find_fwnode(fwnode);
1727 if (IS_ERR(bus)) {
1728 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1729 return PTR_ERR(bus);
1730 }
1731
1732 pl->sfp_bus = bus;
1733
1734 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1735 sfp_bus_put(bus);
1736
1737 return ret;
1738 }
1739
1740 /**
1741 * phylink_set_fixed_link() - set the fixed link
1742 * @pl: a pointer to a &struct phylink returned from phylink_create()
1743 * @state: a pointer to a struct phylink_link_state.
1744 *
1745 * This function is used when the link parameters are known and do not change,
1746 * making it suitable for certain types of network connections.
1747 *
1748 * Returns: zero on success or negative error code.
1749 */
phylink_set_fixed_link(struct phylink * pl,const struct phylink_link_state * state)1750 int phylink_set_fixed_link(struct phylink *pl,
1751 const struct phylink_link_state *state)
1752 {
1753 const struct link_capabilities *c;
1754 unsigned long *adv;
1755
1756 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1757 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1758 return -EINVAL;
1759
1760 c = phy_caps_lookup(state->speed, state->duplex,
1761 pl->supported, true);
1762 if (!c)
1763 return -EINVAL;
1764
1765 adv = pl->link_config.advertising;
1766 linkmode_and(adv, pl->supported, c->linkmodes);
1767 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1768
1769 pl->link_config.speed = state->speed;
1770 pl->link_config.duplex = state->duplex;
1771 pl->link_config.link = 1;
1772 pl->link_config.an_complete = 1;
1773
1774 pl->cfg_link_an_mode = MLO_AN_FIXED;
1775 pl->req_link_an_mode = pl->cfg_link_an_mode;
1776
1777 return 0;
1778 }
1779 EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1780
1781 /**
1782 * phylink_create() - create a phylink instance
1783 * @config: a pointer to the target &struct phylink_config
1784 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1785 * interface
1786 * @iface: the desired link mode defined by &typedef phy_interface_t
1787 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1788 *
1789 * Create a new phylink instance, and parse the link parameters found in @np.
1790 * This will parse in-band modes, fixed-link or SFP configuration.
1791 *
1792 * Note: the rtnl lock must not be held when calling this function.
1793 *
1794 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1795 * must use IS_ERR() to check for errors from this function.
1796 */
phylink_create(struct phylink_config * config,const struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1797 struct phylink *phylink_create(struct phylink_config *config,
1798 const struct fwnode_handle *fwnode,
1799 phy_interface_t iface,
1800 const struct phylink_mac_ops *mac_ops)
1801 {
1802 struct phylink *pl;
1803 int ret;
1804
1805 /* Validate the supplied configuration */
1806 if (phy_interface_empty(config->supported_interfaces)) {
1807 dev_err(config->dev,
1808 "phylink: error: empty supported_interfaces\n");
1809 return ERR_PTR(-EINVAL);
1810 }
1811
1812 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1813 if (!pl)
1814 return ERR_PTR(-ENOMEM);
1815
1816 mutex_init(&pl->state_mutex);
1817 INIT_WORK(&pl->resolve, phylink_resolve);
1818
1819 pl->config = config;
1820 if (config->type == PHYLINK_NETDEV) {
1821 pl->netdev = to_net_dev(config->dev);
1822 netif_carrier_off(pl->netdev);
1823 } else if (config->type == PHYLINK_DEV) {
1824 pl->dev = config->dev;
1825 } else {
1826 kfree(pl);
1827 return ERR_PTR(-EINVAL);
1828 }
1829
1830 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops);
1831 pl->mac_supports_eee = pl->mac_supports_eee_ops &&
1832 pl->config->lpi_capabilities &&
1833 !phy_interface_empty(pl->config->lpi_interfaces);
1834
1835 /* Set the default EEE configuration */
1836 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default;
1837 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled;
1838 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default;
1839
1840 pl->phy_state.interface = iface;
1841 pl->link_interface = iface;
1842 if (iface == PHY_INTERFACE_MODE_MOCA)
1843 pl->link_port = PORT_BNC;
1844 else
1845 pl->link_port = PORT_MII;
1846 pl->link_config.interface = iface;
1847 pl->link_config.pause = MLO_PAUSE_AN;
1848 pl->link_config.speed = SPEED_UNKNOWN;
1849 pl->link_config.duplex = DUPLEX_UNKNOWN;
1850 pl->pcs_state = PCS_STATE_DOWN;
1851 pl->mac_ops = mac_ops;
1852 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1853 timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1854
1855 linkmode_fill(pl->supported);
1856 linkmode_copy(pl->link_config.advertising, pl->supported);
1857 phylink_validate(pl, pl->supported, &pl->link_config);
1858
1859 ret = phylink_parse_mode(pl, fwnode);
1860 if (ret < 0) {
1861 kfree(pl);
1862 return ERR_PTR(ret);
1863 }
1864
1865 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1866 ret = phylink_parse_fixedlink(pl, fwnode);
1867 if (ret < 0) {
1868 kfree(pl);
1869 return ERR_PTR(ret);
1870 }
1871 }
1872
1873 pl->req_link_an_mode = pl->cfg_link_an_mode;
1874
1875 ret = phylink_register_sfp(pl, fwnode);
1876 if (ret < 0) {
1877 kfree(pl);
1878 return ERR_PTR(ret);
1879 }
1880
1881 return pl;
1882 }
1883 EXPORT_SYMBOL_GPL(phylink_create);
1884
1885 /**
1886 * phylink_destroy() - cleanup and destroy the phylink instance
1887 * @pl: a pointer to a &struct phylink returned from phylink_create()
1888 *
1889 * Destroy a phylink instance. Any PHY that has been attached must have been
1890 * cleaned up via phylink_disconnect_phy() prior to calling this function.
1891 *
1892 * Note: the rtnl lock must not be held when calling this function.
1893 */
phylink_destroy(struct phylink * pl)1894 void phylink_destroy(struct phylink *pl)
1895 {
1896 sfp_bus_del_upstream(pl->sfp_bus);
1897 if (pl->link_gpio)
1898 gpiod_put(pl->link_gpio);
1899
1900 cancel_work_sync(&pl->resolve);
1901 kfree(pl);
1902 }
1903 EXPORT_SYMBOL_GPL(phylink_destroy);
1904
1905 /**
1906 * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1907 * @pl: a pointer to a &struct phylink returned from phylink_create()
1908 *
1909 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1910 * no PHY is needed.
1911 *
1912 * Returns true if phylink will be expecting a PHY.
1913 */
phylink_expects_phy(struct phylink * pl)1914 bool phylink_expects_phy(struct phylink *pl)
1915 {
1916 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1917 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1918 phy_interface_mode_is_8023z(pl->link_interface)))
1919 return false;
1920 return true;
1921 }
1922 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1923
phylink_phy_change(struct phy_device * phydev,bool up)1924 static void phylink_phy_change(struct phy_device *phydev, bool up)
1925 {
1926 struct phylink *pl = phydev->phylink;
1927 bool tx_pause, rx_pause;
1928
1929 phy_get_pause(phydev, &tx_pause, &rx_pause);
1930
1931 mutex_lock(&pl->state_mutex);
1932 pl->phy_state.speed = phydev->speed;
1933 pl->phy_state.duplex = phydev->duplex;
1934 pl->phy_state.rate_matching = phydev->rate_matching;
1935 pl->phy_state.pause = MLO_PAUSE_NONE;
1936 if (tx_pause)
1937 pl->phy_state.pause |= MLO_PAUSE_TX;
1938 if (rx_pause)
1939 pl->phy_state.pause |= MLO_PAUSE_RX;
1940 pl->phy_state.interface = phydev->interface;
1941 pl->phy_state.link = up;
1942 if (!up)
1943 pl->link_failed = true;
1944
1945 /* Get the LPI state from phylib */
1946 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi;
1947 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer;
1948 mutex_unlock(&pl->state_mutex);
1949
1950 phylink_run_resolve(pl);
1951
1952 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n",
1953 up ? "up" : "down",
1954 phy_modes(phydev->interface),
1955 phy_speed_to_str(phydev->speed),
1956 phy_duplex_to_str(phydev->duplex),
1957 phy_rate_matching_to_str(phydev->rate_matching),
1958 phylink_pause_to_str(pl->phy_state.pause),
1959 phydev->enable_tx_lpi ? "" : "no");
1960 }
1961
phylink_validate_phy(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state)1962 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
1963 unsigned long *supported,
1964 struct phylink_link_state *state)
1965 {
1966 DECLARE_PHY_INTERFACE_MASK(interfaces);
1967
1968 /* If the PHY provides a bitmap of the interfaces it will be using
1969 * depending on the negotiated media speeds, use this to validate
1970 * which ethtool link modes can be used.
1971 */
1972 if (!phy_interface_empty(phy->possible_interfaces)) {
1973 /* We only care about the union of the PHY's interfaces and
1974 * those which the host supports.
1975 */
1976 phy_interface_and(interfaces, phy->possible_interfaces,
1977 pl->config->supported_interfaces);
1978
1979 if (phy_interface_empty(interfaces)) {
1980 phylink_err(pl, "PHY has no common interfaces\n");
1981 return -EINVAL;
1982 }
1983
1984 if (phy_on_sfp(phy)) {
1985 /* If the PHY is on a SFP, limit the interfaces to
1986 * those that can be used with a SFP module.
1987 */
1988 phy_interface_and(interfaces, interfaces,
1989 phylink_sfp_interfaces);
1990
1991 if (phy_interface_empty(interfaces)) {
1992 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
1993 return -EINVAL;
1994 }
1995 }
1996
1997 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
1998 phydev_name(phy),
1999 (int)PHY_INTERFACE_MODE_MAX,
2000 phy->possible_interfaces,
2001 (int)PHY_INTERFACE_MODE_MAX, interfaces);
2002
2003 return phylink_validate_mask(pl, phy, supported, state,
2004 interfaces);
2005 }
2006
2007 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
2008 phydev_name(phy));
2009
2010 /* Check whether we would use rate matching for the proposed interface
2011 * mode.
2012 */
2013 state->rate_matching = phy_get_rate_matching(phy, state->interface);
2014
2015 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
2016 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
2017 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
2018 * their Serdes is either unnecessary or not reasonable.
2019 *
2020 * For these which switch interface modes, we really need to know which
2021 * interface modes the PHY supports to properly work out which ethtool
2022 * linkmodes can be supported. For now, as a work-around, we validate
2023 * against all interface modes, which may lead to more ethtool link
2024 * modes being advertised than are actually supported.
2025 */
2026 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
2027 state->interface != PHY_INTERFACE_MODE_RXAUI &&
2028 state->interface != PHY_INTERFACE_MODE_XAUI &&
2029 state->interface != PHY_INTERFACE_MODE_USXGMII)
2030 state->interface = PHY_INTERFACE_MODE_NA;
2031
2032 return phylink_validate(pl, supported, state);
2033 }
2034
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)2035 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
2036 phy_interface_t interface)
2037 {
2038 struct phylink_link_state config;
2039 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
2040 char *irq_str;
2041 int ret;
2042
2043 /*
2044 * This is the new way of dealing with flow control for PHYs,
2045 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2046 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
2047 * using our validate call to the MAC, we rely upon the MAC
2048 * clearing the bits from both supported and advertising fields.
2049 */
2050 phy_support_asym_pause(phy);
2051
2052 memset(&config, 0, sizeof(config));
2053 linkmode_copy(supported, phy->supported);
2054 linkmode_copy(config.advertising, phy->advertising);
2055 config.interface = interface;
2056
2057 ret = phylink_validate_phy(pl, phy, supported, &config);
2058 if (ret) {
2059 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
2060 phy_modes(config.interface),
2061 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
2062 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
2063 ERR_PTR(ret));
2064 return ret;
2065 }
2066
2067 phy->phylink = pl;
2068 phy->phy_link_change = phylink_phy_change;
2069
2070 irq_str = phy_attached_info_irq(phy);
2071 phylink_info(pl,
2072 "PHY [%s] driver [%s] (irq=%s)\n",
2073 dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
2074 kfree(irq_str);
2075
2076 mutex_lock(&phy->lock);
2077 mutex_lock(&pl->state_mutex);
2078 pl->phydev = phy;
2079 pl->phy_state.interface = interface;
2080 pl->phy_state.pause = MLO_PAUSE_NONE;
2081 pl->phy_state.speed = SPEED_UNKNOWN;
2082 pl->phy_state.duplex = DUPLEX_UNKNOWN;
2083 pl->phy_state.rate_matching = RATE_MATCH_NONE;
2084 linkmode_copy(pl->supported, supported);
2085 linkmode_copy(pl->link_config.advertising, config.advertising);
2086
2087 /* Restrict the phy advertisement according to the MAC support. */
2088 linkmode_copy(phy->advertising, config.advertising);
2089
2090 /* If the MAC supports phylink managed EEE, restrict the EEE
2091 * advertisement according to the MAC's LPI capabilities.
2092 */
2093 if (pl->mac_supports_eee) {
2094 /* If EEE is enabled, then we need to call phy_support_eee()
2095 * to ensure that the advertising mask is appropriately set.
2096 * This also enables EEE at the PHY.
2097 */
2098 if (pl->eee_cfg.eee_enabled)
2099 phy_support_eee(phy);
2100
2101 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled;
2102 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer;
2103
2104 /* Convert the MAC's LPI capabilities to linkmodes */
2105 linkmode_zero(pl->supported_lpi);
2106 phylink_caps_to_linkmodes(pl->supported_lpi,
2107 pl->config->lpi_capabilities);
2108
2109 /* Restrict the PHYs EEE support/advertisement to the modes
2110 * that the MAC supports.
2111 */
2112 linkmode_and(phy->advertising_eee, phy->advertising_eee,
2113 pl->supported_lpi);
2114 } else if (pl->mac_supports_eee_ops) {
2115 /* MAC supports phylink EEE, but wants EEE always disabled. */
2116 phy_disable_eee(phy);
2117 }
2118
2119 mutex_unlock(&pl->state_mutex);
2120 mutex_unlock(&phy->lock);
2121
2122 phylink_dbg(pl,
2123 "phy: %s setting supported %*pb advertising %*pb\n",
2124 phy_modes(interface),
2125 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
2126 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
2127
2128 if (phy_interrupt_is_valid(phy))
2129 phy_request_interrupt(phy);
2130
2131 if (pl->config->mac_managed_pm)
2132 phy->mac_managed_pm = true;
2133
2134 /* Allow the MAC to stop its clock if the PHY has the capability */
2135 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0;
2136
2137 if (pl->mac_supports_eee_ops) {
2138 /* Explicitly configure whether the PHY is allowed to stop it's
2139 * receive clock.
2140 */
2141 ret = phy_eee_rx_clock_stop(phy,
2142 pl->config->eee_rx_clk_stop_enable);
2143 if (ret == -EOPNOTSUPP)
2144 ret = 0;
2145 }
2146
2147 return ret;
2148 }
2149
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)2150 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
2151 phy_interface_t interface)
2152 {
2153 u32 flags = 0;
2154
2155 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
2156 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2157 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
2158 return -EINVAL;
2159
2160 if (pl->phydev)
2161 return -EBUSY;
2162
2163 if (pl->config->mac_requires_rxc)
2164 flags |= PHY_F_RXC_ALWAYS_ON;
2165
2166 return phy_attach_direct(pl->netdev, phy, flags, interface);
2167 }
2168
2169 /**
2170 * phylink_connect_phy() - connect a PHY to the phylink instance
2171 * @pl: a pointer to a &struct phylink returned from phylink_create()
2172 * @phy: a pointer to a &struct phy_device.
2173 *
2174 * Connect @phy to the phylink instance specified by @pl by calling
2175 * phy_attach_direct(). Configure the @phy according to the MAC driver's
2176 * capabilities, start the PHYLIB state machine and enable any interrupts
2177 * that the PHY supports.
2178 *
2179 * This updates the phylink's ethtool supported and advertising link mode
2180 * masks.
2181 *
2182 * Returns 0 on success or a negative errno.
2183 */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)2184 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
2185 {
2186 int ret;
2187
2188 /* Use PHY device/driver interface */
2189 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2190 pl->link_interface = phy->interface;
2191 pl->link_config.interface = pl->link_interface;
2192 }
2193
2194 ret = phylink_attach_phy(pl, phy, pl->link_interface);
2195 if (ret < 0)
2196 return ret;
2197
2198 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2199 if (ret)
2200 phy_detach(phy);
2201
2202 return ret;
2203 }
2204 EXPORT_SYMBOL_GPL(phylink_connect_phy);
2205
2206 /**
2207 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2208 * @pl: a pointer to a &struct phylink returned from phylink_create()
2209 * @dn: a pointer to a &struct device_node.
2210 * @flags: PHY-specific flags to communicate to the PHY device driver
2211 *
2212 * Connect the phy specified in the device node @dn to the phylink instance
2213 * specified by @pl. Actions specified in phylink_connect_phy() will be
2214 * performed.
2215 *
2216 * Returns 0 on success or a negative errno.
2217 */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)2218 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2219 u32 flags)
2220 {
2221 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2222 }
2223 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2224
2225 /**
2226 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2227 * @pl: a pointer to a &struct phylink returned from phylink_create()
2228 * @fwnode: a pointer to a &struct fwnode_handle.
2229 * @flags: PHY-specific flags to communicate to the PHY device driver
2230 *
2231 * Connect the phy specified @fwnode to the phylink instance specified
2232 * by @pl.
2233 *
2234 * Returns 0 on success or a negative errno.
2235 */
phylink_fwnode_phy_connect(struct phylink * pl,const struct fwnode_handle * fwnode,u32 flags)2236 int phylink_fwnode_phy_connect(struct phylink *pl,
2237 const struct fwnode_handle *fwnode,
2238 u32 flags)
2239 {
2240 struct fwnode_handle *phy_fwnode;
2241 struct phy_device *phy_dev;
2242 int ret;
2243
2244 /* Fixed links and 802.3z are handled without needing a PHY */
2245 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2246 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2247 phy_interface_mode_is_8023z(pl->link_interface)))
2248 return 0;
2249
2250 phy_fwnode = fwnode_get_phy_node(fwnode);
2251 if (IS_ERR(phy_fwnode)) {
2252 if (pl->cfg_link_an_mode == MLO_AN_PHY)
2253 return -ENODEV;
2254 return 0;
2255 }
2256
2257 phy_dev = fwnode_phy_find_device(phy_fwnode);
2258 /* We're done with the phy_node handle */
2259 fwnode_handle_put(phy_fwnode);
2260 if (!phy_dev)
2261 return -ENODEV;
2262
2263 /* Use PHY device/driver interface */
2264 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2265 pl->link_interface = phy_dev->interface;
2266 pl->link_config.interface = pl->link_interface;
2267 }
2268
2269 if (pl->config->mac_requires_rxc)
2270 flags |= PHY_F_RXC_ALWAYS_ON;
2271
2272 ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2273 pl->link_interface);
2274 phy_device_free(phy_dev);
2275 if (ret)
2276 return ret;
2277
2278 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2279 if (ret)
2280 phy_detach(phy_dev);
2281
2282 return ret;
2283 }
2284 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2285
2286 /**
2287 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2288 * instance.
2289 * @pl: a pointer to a &struct phylink returned from phylink_create()
2290 *
2291 * Disconnect any current PHY from the phylink instance described by @pl.
2292 */
phylink_disconnect_phy(struct phylink * pl)2293 void phylink_disconnect_phy(struct phylink *pl)
2294 {
2295 struct phy_device *phy;
2296
2297 ASSERT_RTNL();
2298
2299 phy = pl->phydev;
2300 if (phy) {
2301 mutex_lock(&phy->lock);
2302 mutex_lock(&pl->state_mutex);
2303 pl->phydev = NULL;
2304 pl->phy_enable_tx_lpi = false;
2305 pl->mac_tx_clk_stop = false;
2306 mutex_unlock(&pl->state_mutex);
2307 mutex_unlock(&phy->lock);
2308 flush_work(&pl->resolve);
2309
2310 phy_disconnect(phy);
2311 }
2312 }
2313 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2314
phylink_link_changed(struct phylink * pl,bool up,const char * what)2315 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2316 {
2317 if (!up)
2318 pl->link_failed = true;
2319 phylink_run_resolve(pl);
2320 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2321 }
2322
2323 /**
2324 * phylink_mac_change() - notify phylink of a change in MAC state
2325 * @pl: a pointer to a &struct phylink returned from phylink_create()
2326 * @up: indicates whether the link is currently up.
2327 *
2328 * The MAC driver should call this driver when the state of its link
2329 * changes (eg, link failure, new negotiation results, etc.)
2330 */
phylink_mac_change(struct phylink * pl,bool up)2331 void phylink_mac_change(struct phylink *pl, bool up)
2332 {
2333 phylink_link_changed(pl, up, "mac");
2334 }
2335 EXPORT_SYMBOL_GPL(phylink_mac_change);
2336
2337 /**
2338 * phylink_pcs_change() - notify phylink of a change to PCS link state
2339 * @pcs: pointer to &struct phylink_pcs
2340 * @up: indicates whether the link is currently up.
2341 *
2342 * The PCS driver should call this when the state of its link changes
2343 * (e.g. link failure, new negotiation results, etc.) Note: it should
2344 * not determine "up" by reading the BMSR. If in doubt about the link
2345 * state at interrupt time, then pass true if pcs_get_state() returns
2346 * the latched link-down state, otherwise pass false.
2347 */
phylink_pcs_change(struct phylink_pcs * pcs,bool up)2348 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2349 {
2350 struct phylink *pl = pcs->phylink;
2351
2352 if (pl)
2353 phylink_link_changed(pl, up, "pcs");
2354 }
2355 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2356
phylink_link_handler(int irq,void * data)2357 static irqreturn_t phylink_link_handler(int irq, void *data)
2358 {
2359 struct phylink *pl = data;
2360
2361 phylink_run_resolve(pl);
2362
2363 return IRQ_HANDLED;
2364 }
2365
2366 /**
2367 * phylink_start() - start a phylink instance
2368 * @pl: a pointer to a &struct phylink returned from phylink_create()
2369 *
2370 * Start the phylink instance specified by @pl, configuring the MAC for the
2371 * desired link mode(s) and negotiation style. This should be called from the
2372 * network device driver's &struct net_device_ops ndo_open() method.
2373 */
phylink_start(struct phylink * pl)2374 void phylink_start(struct phylink *pl)
2375 {
2376 bool poll = false;
2377
2378 ASSERT_RTNL();
2379
2380 phylink_info(pl, "configuring for %s/%s link mode\n",
2381 phylink_an_mode_str(pl->req_link_an_mode),
2382 phy_modes(pl->link_config.interface));
2383
2384 /* Always set the carrier off */
2385 if (pl->netdev)
2386 netif_carrier_off(pl->netdev);
2387
2388 pl->pcs_state = PCS_STATE_STARTING;
2389
2390 /* Apply the link configuration to the MAC when starting. This allows
2391 * a fixed-link to start with the correct parameters, and also
2392 * ensures that we set the appropriate advertisement for Serdes links.
2393 *
2394 * Restart autonegotiation if using 802.3z to ensure that the link
2395 * parameters are properly negotiated. This is necessary for DSA
2396 * switches using 802.3z negotiation to ensure they see our modes.
2397 */
2398 phylink_mac_initial_config(pl, true);
2399
2400 pl->pcs_state = PCS_STATE_STARTED;
2401
2402 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2403
2404 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2405 int irq = gpiod_to_irq(pl->link_gpio);
2406
2407 if (irq > 0) {
2408 if (!request_irq(irq, phylink_link_handler,
2409 IRQF_TRIGGER_RISING |
2410 IRQF_TRIGGER_FALLING,
2411 "netdev link", pl))
2412 pl->link_irq = irq;
2413 else
2414 irq = 0;
2415 }
2416 if (irq <= 0)
2417 poll = true;
2418 }
2419
2420 if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2421 poll |= pl->config->poll_fixed_state;
2422
2423 if (poll)
2424 mod_timer(&pl->link_poll, jiffies + HZ);
2425 if (pl->phydev)
2426 phy_start(pl->phydev);
2427 if (pl->sfp_bus)
2428 sfp_upstream_start(pl->sfp_bus);
2429 }
2430 EXPORT_SYMBOL_GPL(phylink_start);
2431
2432 /**
2433 * phylink_stop() - stop a phylink instance
2434 * @pl: a pointer to a &struct phylink returned from phylink_create()
2435 *
2436 * Stop the phylink instance specified by @pl. This should be called from the
2437 * network device driver's &struct net_device_ops ndo_stop() method. The
2438 * network device's carrier state should not be changed prior to calling this
2439 * function.
2440 *
2441 * This will synchronously bring down the link if the link is not already
2442 * down (in other words, it will trigger a mac_link_down() method call.)
2443 */
phylink_stop(struct phylink * pl)2444 void phylink_stop(struct phylink *pl)
2445 {
2446 ASSERT_RTNL();
2447
2448 if (pl->sfp_bus)
2449 sfp_upstream_stop(pl->sfp_bus);
2450 if (pl->phydev)
2451 phy_stop(pl->phydev);
2452 timer_delete_sync(&pl->link_poll);
2453 if (pl->link_irq) {
2454 free_irq(pl->link_irq, pl);
2455 pl->link_irq = 0;
2456 }
2457
2458 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2459
2460 pl->pcs_state = PCS_STATE_DOWN;
2461
2462 phylink_pcs_disable(pl->pcs);
2463 }
2464 EXPORT_SYMBOL_GPL(phylink_stop);
2465
2466 /**
2467 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI
2468 * @pl: a pointer to a &struct phylink returned from phylink_create()
2469 *
2470 * Disable the PHY's ability to stop the receive clock while the receive path
2471 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block()
2472 * are balanced by calls to phylink_rx_clk_stop_unblock().
2473 */
phylink_rx_clk_stop_block(struct phylink * pl)2474 void phylink_rx_clk_stop_block(struct phylink *pl)
2475 {
2476 ASSERT_RTNL();
2477
2478 if (pl->mac_rx_clk_stop_blocked == U8_MAX) {
2479 phylink_warn(pl, "%s called too many times - ignoring\n",
2480 __func__);
2481 dump_stack();
2482 return;
2483 }
2484
2485 /* Disable PHY receive clock stop if this is the first time this
2486 * function has been called and clock-stop was previously enabled.
2487 */
2488 if (pl->mac_rx_clk_stop_blocked++ == 0 &&
2489 pl->mac_supports_eee_ops && pl->phydev &&
2490 pl->config->eee_rx_clk_stop_enable)
2491 phy_eee_rx_clock_stop(pl->phydev, false);
2492 }
2493 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block);
2494
2495 /**
2496 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock
2497 * @pl: a pointer to a &struct phylink returned from phylink_create()
2498 *
2499 * All calls to phylink_rx_clk_stop_block() must be balanced with a
2500 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs
2501 * ability to stop the receive clock when the receive path is in EEE LPI mode.
2502 */
phylink_rx_clk_stop_unblock(struct phylink * pl)2503 void phylink_rx_clk_stop_unblock(struct phylink *pl)
2504 {
2505 ASSERT_RTNL();
2506
2507 if (pl->mac_rx_clk_stop_blocked == 0) {
2508 phylink_warn(pl, "%s called too many times - ignoring\n",
2509 __func__);
2510 dump_stack();
2511 return;
2512 }
2513
2514 /* Re-enable PHY receive clock stop if the number of unblocks matches
2515 * the number of calls to the block function above.
2516 */
2517 if (--pl->mac_rx_clk_stop_blocked == 0 &&
2518 pl->mac_supports_eee_ops && pl->phydev &&
2519 pl->config->eee_rx_clk_stop_enable)
2520 phy_eee_rx_clock_stop(pl->phydev, true);
2521 }
2522 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock);
2523
2524 /**
2525 * phylink_suspend() - handle a network device suspend event
2526 * @pl: a pointer to a &struct phylink returned from phylink_create()
2527 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2528 *
2529 * Handle a network device suspend event. There are several cases:
2530 *
2531 * - If Wake-on-Lan is not active, we can bring down the link between
2532 * the MAC and PHY by calling phylink_stop().
2533 * - If Wake-on-Lan is active, and being handled only by the PHY, we
2534 * can also bring down the link between the MAC and PHY.
2535 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2536 * still needs to receive packets, so we can not bring the link down.
2537 */
phylink_suspend(struct phylink * pl,bool mac_wol)2538 void phylink_suspend(struct phylink *pl, bool mac_wol)
2539 {
2540 ASSERT_RTNL();
2541
2542 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2543 /* Wake-on-Lan enabled, MAC handling */
2544 mutex_lock(&pl->state_mutex);
2545
2546 /* Stop the resolver bringing the link up */
2547 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2548
2549 pl->suspend_link_up = phylink_link_is_up(pl);
2550 if (pl->suspend_link_up) {
2551 /* Disable the carrier, to prevent transmit timeouts,
2552 * but one would hope all packets have been sent. This
2553 * also means phylink_resolve() will do nothing.
2554 */
2555 if (pl->netdev)
2556 netif_carrier_off(pl->netdev);
2557 pl->old_link_state = false;
2558 }
2559
2560 /* We do not call mac_link_down() here as we want the
2561 * link to remain up to receive the WoL packets.
2562 */
2563 mutex_unlock(&pl->state_mutex);
2564 } else {
2565 phylink_stop(pl);
2566 }
2567 }
2568 EXPORT_SYMBOL_GPL(phylink_suspend);
2569
2570 /**
2571 * phylink_prepare_resume() - prepare to resume a network device
2572 * @pl: a pointer to a &struct phylink returned from phylink_create()
2573 *
2574 * Optional, but if called must be called prior to phylink_resume().
2575 *
2576 * Prepare to resume a network device, preparing the PHY as necessary.
2577 */
phylink_prepare_resume(struct phylink * pl)2578 void phylink_prepare_resume(struct phylink *pl)
2579 {
2580 struct phy_device *phydev = pl->phydev;
2581
2582 ASSERT_RTNL();
2583
2584 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock
2585 * when PDOWN is set. However, some MACs require RXC to be running
2586 * in order to resume. If the MAC requires RXC, and we have a PHY,
2587 * then resume the PHY. Note that 802.3 allows PHYs 500ms before
2588 * the clock meets requirements. We do not implement this delay.
2589 */
2590 if (pl->config->mac_requires_rxc && phydev && phydev->suspended)
2591 phy_resume(phydev);
2592 }
2593 EXPORT_SYMBOL_GPL(phylink_prepare_resume);
2594
2595 /**
2596 * phylink_resume() - handle a network device resume event
2597 * @pl: a pointer to a &struct phylink returned from phylink_create()
2598 *
2599 * Undo the effects of phylink_suspend(), returning the link to an
2600 * operational state.
2601 */
phylink_resume(struct phylink * pl)2602 void phylink_resume(struct phylink *pl)
2603 {
2604 ASSERT_RTNL();
2605
2606 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2607 /* Wake-on-Lan enabled, MAC handling */
2608
2609 if (pl->suspend_link_up) {
2610 /* Call mac_link_down() so we keep the overall state
2611 * balanced. Do this under the state_mutex lock for
2612 * consistency. This will cause a "Link Down" message
2613 * to be printed during resume, which is harmless -
2614 * the true link state will be printed when we run a
2615 * resolve.
2616 */
2617 mutex_lock(&pl->state_mutex);
2618 phylink_link_down(pl);
2619 mutex_unlock(&pl->state_mutex);
2620 }
2621
2622 /* Re-apply the link parameters so that all the settings get
2623 * restored to the MAC.
2624 */
2625 phylink_mac_initial_config(pl, true);
2626
2627 /* Re-enable and re-resolve the link parameters */
2628 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2629 } else {
2630 phylink_start(pl);
2631 }
2632 }
2633 EXPORT_SYMBOL_GPL(phylink_resume);
2634
2635 /**
2636 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2637 * @pl: a pointer to a &struct phylink returned from phylink_create()
2638 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2639 *
2640 * Read the wake on lan parameters from the PHY attached to the phylink
2641 * instance specified by @pl. If no PHY is currently attached, report no
2642 * support for wake on lan.
2643 */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2644 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2645 {
2646 ASSERT_RTNL();
2647
2648 wol->supported = 0;
2649 wol->wolopts = 0;
2650
2651 if (pl->phydev)
2652 phy_ethtool_get_wol(pl->phydev, wol);
2653 }
2654 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2655
2656 /**
2657 * phylink_ethtool_set_wol() - set wake on lan parameters
2658 * @pl: a pointer to a &struct phylink returned from phylink_create()
2659 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2660 *
2661 * Set the wake on lan parameters for the PHY attached to the phylink
2662 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2663 * error.
2664 *
2665 * Returns zero on success or negative errno code.
2666 */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2667 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2668 {
2669 int ret = -EOPNOTSUPP;
2670
2671 ASSERT_RTNL();
2672
2673 if (pl->phydev)
2674 ret = phy_ethtool_set_wol(pl->phydev, wol);
2675
2676 return ret;
2677 }
2678 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2679
phylink_sfp_select_interface(struct phylink * pl,const unsigned long * link_modes)2680 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,
2681 const unsigned long *link_modes)
2682 {
2683 phy_interface_t interface;
2684
2685 interface = sfp_select_interface(pl->sfp_bus, link_modes);
2686 if (interface == PHY_INTERFACE_MODE_NA) {
2687 phylink_err(pl,
2688 "selection of interface failed, advertisement %*pb\n",
2689 __ETHTOOL_LINK_MODE_MASK_NBITS,
2690 link_modes);
2691 return interface;
2692 }
2693
2694 if (!test_bit(interface, pl->config->supported_interfaces)) {
2695 phylink_err(pl,
2696 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n",
2697 phy_modes(interface), interface,
2698 (int)PHY_INTERFACE_MODE_MAX,
2699 pl->config->supported_interfaces);
2700 return PHY_INTERFACE_MODE_NA;
2701 }
2702
2703 return interface;
2704 }
2705
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2706 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2707 {
2708 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2709
2710 linkmode_zero(mask);
2711 phylink_set_port_modes(mask);
2712
2713 linkmode_and(dst, dst, mask);
2714 linkmode_or(dst, dst, b);
2715 }
2716
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2717 static void phylink_get_ksettings(const struct phylink_link_state *state,
2718 struct ethtool_link_ksettings *kset)
2719 {
2720 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2721 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2722 if (kset->base.rate_matching == RATE_MATCH_NONE) {
2723 kset->base.speed = state->speed;
2724 kset->base.duplex = state->duplex;
2725 }
2726 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2727 state->advertising) ?
2728 AUTONEG_ENABLE : AUTONEG_DISABLE;
2729 }
2730
2731 /**
2732 * phylink_ethtool_ksettings_get() - get the current link settings
2733 * @pl: a pointer to a &struct phylink returned from phylink_create()
2734 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2735 *
2736 * Read the current link settings for the phylink instance specified by @pl.
2737 * This will be the link settings read from the MAC, PHY or fixed link
2738 * settings depending on the current negotiation mode.
2739 */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2740 int phylink_ethtool_ksettings_get(struct phylink *pl,
2741 struct ethtool_link_ksettings *kset)
2742 {
2743 struct phylink_link_state link_state;
2744
2745 ASSERT_RTNL();
2746
2747 if (pl->phydev)
2748 phy_ethtool_ksettings_get(pl->phydev, kset);
2749 else
2750 kset->base.port = pl->link_port;
2751
2752 linkmode_copy(kset->link_modes.supported, pl->supported);
2753
2754 switch (pl->act_link_an_mode) {
2755 case MLO_AN_FIXED:
2756 /* We are using fixed settings. Report these as the
2757 * current link settings - and note that these also
2758 * represent the supported speeds/duplex/pause modes.
2759 */
2760 phylink_get_fixed_state(pl, &link_state);
2761 phylink_get_ksettings(&link_state, kset);
2762 break;
2763
2764 case MLO_AN_INBAND:
2765 /* If there is a phy attached, then use the reported
2766 * settings from the phy with no modification.
2767 */
2768 if (pl->phydev)
2769 break;
2770
2771 phylink_mac_pcs_get_state(pl, &link_state);
2772
2773 /* The MAC is reporting the link results from its own PCS
2774 * layer via in-band status. Report these as the current
2775 * link settings.
2776 */
2777 phylink_get_ksettings(&link_state, kset);
2778 break;
2779 }
2780
2781 return 0;
2782 }
2783 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2784
phylink_validate_pcs_inband_autoneg(struct phylink * pl,phy_interface_t interface,unsigned long * adv)2785 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
2786 phy_interface_t interface,
2787 unsigned long *adv)
2788 {
2789 unsigned int inband = phylink_inband_caps(pl, interface);
2790 unsigned int mask;
2791
2792 /* If the PCS doesn't implement inband support, be permissive. */
2793 if (!inband)
2794 return true;
2795
2796 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
2797 mask = LINK_INBAND_ENABLE;
2798 else
2799 mask = LINK_INBAND_DISABLE;
2800
2801 /* Check whether the PCS implements the required mode */
2802 return !!(inband & mask);
2803 }
2804
2805 /**
2806 * phylink_ethtool_ksettings_set() - set the link settings
2807 * @pl: a pointer to a &struct phylink returned from phylink_create()
2808 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2809 */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2810 int phylink_ethtool_ksettings_set(struct phylink *pl,
2811 const struct ethtool_link_ksettings *kset)
2812 {
2813 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2814 const struct link_capabilities *c;
2815 struct phylink_link_state config;
2816
2817 ASSERT_RTNL();
2818
2819 if (pl->phydev) {
2820 struct ethtool_link_ksettings phy_kset = *kset;
2821
2822 linkmode_and(phy_kset.link_modes.advertising,
2823 phy_kset.link_modes.advertising,
2824 pl->supported);
2825
2826 /* We can rely on phylib for this update; we also do not need
2827 * to update the pl->link_config settings:
2828 * - the configuration returned via ksettings_get() will come
2829 * from phylib whenever a PHY is present.
2830 * - link_config.interface will be updated by the PHY calling
2831 * back via phylink_phy_change() and a subsequent resolve.
2832 * - initial link configuration for PHY mode comes from the
2833 * last phy state updated via phylink_phy_change().
2834 * - other configuration changes (e.g. pause modes) are
2835 * performed directly via phylib.
2836 * - if in in-band mode with a PHY, the link configuration
2837 * is passed on the link from the PHY, and all of
2838 * link_config.{speed,duplex,an_enabled,pause} are not used.
2839 * - the only possible use would be link_config.advertising
2840 * pause modes when in 1000base-X mode with a PHY, but in
2841 * the presence of a PHY, this should not be changed as that
2842 * should be determined from the media side advertisement.
2843 */
2844 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2845 }
2846
2847 config = pl->link_config;
2848 /* Mask out unsupported advertisements */
2849 linkmode_and(config.advertising, kset->link_modes.advertising,
2850 pl->supported);
2851
2852 /* FIXME: should we reject autoneg if phy/mac does not support it? */
2853 switch (kset->base.autoneg) {
2854 case AUTONEG_DISABLE:
2855 /* Autonegotiation disabled, select a suitable speed and
2856 * duplex.
2857 */
2858 c = phy_caps_lookup(kset->base.speed, kset->base.duplex,
2859 pl->supported, false);
2860 if (!c)
2861 return -EINVAL;
2862
2863 /* If we have a fixed link, refuse to change link parameters.
2864 * If the link parameters match, accept them but do nothing.
2865 */
2866 if (pl->req_link_an_mode == MLO_AN_FIXED) {
2867 if (c->speed != pl->link_config.speed ||
2868 c->duplex != pl->link_config.duplex)
2869 return -EINVAL;
2870 return 0;
2871 }
2872
2873 config.speed = c->speed;
2874 config.duplex = c->duplex;
2875 break;
2876
2877 case AUTONEG_ENABLE:
2878 /* If we have a fixed link, allow autonegotiation (since that
2879 * is our default case) but do not allow the advertisement to
2880 * be changed. If the advertisement matches, simply return.
2881 */
2882 if (pl->req_link_an_mode == MLO_AN_FIXED) {
2883 if (!linkmode_equal(config.advertising,
2884 pl->link_config.advertising))
2885 return -EINVAL;
2886 return 0;
2887 }
2888
2889 config.speed = SPEED_UNKNOWN;
2890 config.duplex = DUPLEX_UNKNOWN;
2891 break;
2892
2893 default:
2894 return -EINVAL;
2895 }
2896
2897 /* We have ruled out the case with a PHY attached, and the
2898 * fixed-link cases. All that is left are in-band links.
2899 */
2900 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2901 kset->base.autoneg == AUTONEG_ENABLE);
2902
2903 /* If this link is with an SFP, ensure that changes to advertised modes
2904 * also cause the associated interface to be selected such that the
2905 * link can be configured correctly.
2906 */
2907 if (pl->sfp_bus) {
2908 config.interface = phylink_sfp_select_interface(pl,
2909 config.advertising);
2910 if (config.interface == PHY_INTERFACE_MODE_NA)
2911 return -EINVAL;
2912
2913 /* Revalidate with the selected interface */
2914 linkmode_copy(support, pl->supported);
2915 if (phylink_validate(pl, support, &config)) {
2916 phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2917 phylink_an_mode_str(pl->req_link_an_mode),
2918 phy_modes(config.interface),
2919 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2920 return -EINVAL;
2921 }
2922 } else {
2923 /* Validate without changing the current supported mask. */
2924 linkmode_copy(support, pl->supported);
2925 if (phylink_validate(pl, support, &config))
2926 return -EINVAL;
2927 }
2928
2929 /* If autonegotiation is enabled, we must have an advertisement */
2930 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2931 config.advertising) &&
2932 phylink_is_empty_linkmode(config.advertising))
2933 return -EINVAL;
2934
2935 /* Validate the autonegotiation state. We don't have a PHY in this
2936 * situation, so the PCS is the media-facing entity.
2937 */
2938 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,
2939 config.advertising))
2940 return -EINVAL;
2941
2942 mutex_lock(&pl->state_mutex);
2943 pl->link_config.speed = config.speed;
2944 pl->link_config.duplex = config.duplex;
2945
2946 if (pl->link_config.interface != config.interface) {
2947 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2948 /* We need to force the link down, then change the interface */
2949 if (pl->old_link_state) {
2950 phylink_link_down(pl);
2951 pl->old_link_state = false;
2952 }
2953 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2954 &pl->phylink_disable_state))
2955 phylink_major_config(pl, false, &config);
2956 pl->link_config.interface = config.interface;
2957 linkmode_copy(pl->link_config.advertising, config.advertising);
2958 } else if (!linkmode_equal(pl->link_config.advertising,
2959 config.advertising)) {
2960 linkmode_copy(pl->link_config.advertising, config.advertising);
2961 phylink_change_inband_advert(pl);
2962 }
2963 mutex_unlock(&pl->state_mutex);
2964
2965 return 0;
2966 }
2967 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2968
2969 /**
2970 * phylink_ethtool_nway_reset() - restart negotiation
2971 * @pl: a pointer to a &struct phylink returned from phylink_create()
2972 *
2973 * Restart negotiation for the phylink instance specified by @pl. This will
2974 * cause any attached phy to restart negotiation with the link partner, and
2975 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2976 * negotiation.
2977 *
2978 * Returns zero on success, or negative error code.
2979 */
phylink_ethtool_nway_reset(struct phylink * pl)2980 int phylink_ethtool_nway_reset(struct phylink *pl)
2981 {
2982 int ret = 0;
2983
2984 ASSERT_RTNL();
2985
2986 if (pl->phydev)
2987 ret = phy_restart_aneg(pl->phydev);
2988 phylink_pcs_an_restart(pl);
2989
2990 return ret;
2991 }
2992 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2993
2994 /**
2995 * phylink_ethtool_get_pauseparam() - get the current pause parameters
2996 * @pl: a pointer to a &struct phylink returned from phylink_create()
2997 * @pause: a pointer to a &struct ethtool_pauseparam
2998 */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)2999 void phylink_ethtool_get_pauseparam(struct phylink *pl,
3000 struct ethtool_pauseparam *pause)
3001 {
3002 ASSERT_RTNL();
3003
3004 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
3005 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
3006 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
3007 }
3008 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
3009
3010 /**
3011 * phylink_ethtool_set_pauseparam() - set the current pause parameters
3012 * @pl: a pointer to a &struct phylink returned from phylink_create()
3013 * @pause: a pointer to a &struct ethtool_pauseparam
3014 */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)3015 int phylink_ethtool_set_pauseparam(struct phylink *pl,
3016 struct ethtool_pauseparam *pause)
3017 {
3018 struct phylink_link_state *config = &pl->link_config;
3019 bool manual_changed;
3020 int pause_state;
3021
3022 ASSERT_RTNL();
3023
3024 if (pl->req_link_an_mode == MLO_AN_FIXED)
3025 return -EOPNOTSUPP;
3026
3027 if (!phylink_test(pl->supported, Pause) &&
3028 !phylink_test(pl->supported, Asym_Pause))
3029 return -EOPNOTSUPP;
3030
3031 if (!phylink_test(pl->supported, Asym_Pause) &&
3032 pause->rx_pause != pause->tx_pause)
3033 return -EINVAL;
3034
3035 pause_state = 0;
3036 if (pause->autoneg)
3037 pause_state |= MLO_PAUSE_AN;
3038 if (pause->rx_pause)
3039 pause_state |= MLO_PAUSE_RX;
3040 if (pause->tx_pause)
3041 pause_state |= MLO_PAUSE_TX;
3042
3043 mutex_lock(&pl->state_mutex);
3044 /*
3045 * See the comments for linkmode_set_pause(), wrt the deficiencies
3046 * with the current implementation. A solution to this issue would
3047 * be:
3048 * ethtool Local device
3049 * rx tx Pause AsymDir
3050 * 0 0 0 0
3051 * 1 0 1 1
3052 * 0 1 0 1
3053 * 1 1 1 1
3054 * and then use the ethtool rx/tx enablement status to mask the
3055 * rx/tx pause resolution.
3056 */
3057 linkmode_set_pause(config->advertising, pause->tx_pause,
3058 pause->rx_pause);
3059
3060 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
3061 (!(pause_state & MLO_PAUSE_AN) &&
3062 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
3063
3064 config->pause = pause_state;
3065
3066 /* Update our in-band advertisement, triggering a renegotiation if
3067 * the advertisement changed.
3068 */
3069 if (!pl->phydev)
3070 phylink_change_inband_advert(pl);
3071
3072 mutex_unlock(&pl->state_mutex);
3073
3074 /* If we have a PHY, a change of the pause frame advertisement will
3075 * cause phylib to renegotiate (if AN is enabled) which will in turn
3076 * call our phylink_phy_change() and trigger a resolve. Note that
3077 * we can't hold our state mutex while calling phy_set_asym_pause().
3078 */
3079 if (pl->phydev)
3080 phy_set_asym_pause(pl->phydev, pause->rx_pause,
3081 pause->tx_pause);
3082
3083 /* If the manual pause settings changed, make sure we trigger a
3084 * resolve to update their state; we can not guarantee that the
3085 * link will cycle.
3086 */
3087 if (manual_changed) {
3088 pl->link_failed = true;
3089 phylink_run_resolve(pl);
3090 }
3091
3092 return 0;
3093 }
3094 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
3095
3096 /**
3097 * phylink_get_eee_err() - read the energy efficient ethernet error
3098 * counter
3099 * @pl: a pointer to a &struct phylink returned from phylink_create().
3100 *
3101 * Read the Energy Efficient Ethernet error counter from the PHY associated
3102 * with the phylink instance specified by @pl.
3103 *
3104 * Returns positive error counter value, or negative error code.
3105 */
phylink_get_eee_err(struct phylink * pl)3106 int phylink_get_eee_err(struct phylink *pl)
3107 {
3108 int ret = 0;
3109
3110 ASSERT_RTNL();
3111
3112 if (pl->phydev)
3113 ret = phy_get_eee_err(pl->phydev);
3114
3115 return ret;
3116 }
3117 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
3118
3119 /**
3120 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
3121 * @pl: a pointer to a &struct phylink returned from phylink_create()
3122 * @eee: a pointer to a &struct ethtool_keee for the read parameters
3123 */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_keee * eee)3124 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
3125 {
3126 int ret = -EOPNOTSUPP;
3127
3128 ASSERT_RTNL();
3129
3130 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee)
3131 return ret;
3132
3133 if (pl->phydev) {
3134 ret = phy_ethtool_get_eee(pl->phydev, eee);
3135 /* Restrict supported linkmode mask */
3136 if (ret == 0 && pl->mac_supports_eee_ops)
3137 linkmode_and(eee->supported, eee->supported,
3138 pl->supported_lpi);
3139 }
3140
3141 return ret;
3142 }
3143 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
3144
3145 /**
3146 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
3147 * @pl: a pointer to a &struct phylink returned from phylink_create()
3148 * @eee: a pointer to a &struct ethtool_keee for the desired parameters
3149 */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_keee * eee)3150 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
3151 {
3152 bool mac_eee = pl->mac_supports_eee;
3153 int ret = -EOPNOTSUPP;
3154
3155 ASSERT_RTNL();
3156
3157 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n",
3158 mac_eee ? "supports" : "does not support",
3159 eee->eee_enabled ? ", enabled" : "",
3160 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised,
3161 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer);
3162
3163 if (pl->mac_supports_eee_ops && !mac_eee)
3164 return ret;
3165
3166 if (pl->phydev) {
3167 /* Restrict advertisement mask */
3168 if (pl->mac_supports_eee_ops)
3169 linkmode_and(eee->advertised, eee->advertised,
3170 pl->supported_lpi);
3171 ret = phy_ethtool_set_eee(pl->phydev, eee);
3172 if (ret == 0)
3173 eee_to_eeecfg(&pl->eee_cfg, eee);
3174 }
3175
3176 return ret;
3177 }
3178 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
3179
3180 /* This emulates MII registers for a fixed-mode phy operating as per the
3181 * passed in state. "aneg" defines if we report negotiation is possible.
3182 *
3183 * FIXME: should deal with negotiation state too.
3184 */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)3185 static int phylink_mii_emul_read(unsigned int reg,
3186 struct phylink_link_state *state)
3187 {
3188 struct fixed_phy_status fs;
3189 unsigned long *lpa = state->lp_advertising;
3190 int val;
3191
3192 fs.link = state->link;
3193 fs.speed = state->speed;
3194 fs.duplex = state->duplex;
3195 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
3196 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
3197
3198 val = swphy_read_reg(reg, &fs);
3199 if (reg == MII_BMSR) {
3200 if (!state->an_complete)
3201 val &= ~BMSR_ANEGCOMPLETE;
3202 }
3203 return val;
3204 }
3205
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)3206 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
3207 unsigned int reg)
3208 {
3209 struct phy_device *phydev = pl->phydev;
3210 int prtad, devad;
3211
3212 if (mdio_phy_id_is_c45(phy_id)) {
3213 prtad = mdio_phy_id_prtad(phy_id);
3214 devad = mdio_phy_id_devad(phy_id);
3215 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3216 reg);
3217 }
3218
3219 if (phydev->is_c45) {
3220 switch (reg) {
3221 case MII_BMCR:
3222 case MII_BMSR:
3223 case MII_PHYSID1:
3224 case MII_PHYSID2:
3225 devad = __ffs(phydev->c45_ids.mmds_present);
3226 break;
3227 case MII_ADVERTISE:
3228 case MII_LPA:
3229 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3230 return -EINVAL;
3231 devad = MDIO_MMD_AN;
3232 if (reg == MII_ADVERTISE)
3233 reg = MDIO_AN_ADVERTISE;
3234 else
3235 reg = MDIO_AN_LPA;
3236 break;
3237 default:
3238 return -EINVAL;
3239 }
3240 prtad = phy_id;
3241 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3242 reg);
3243 }
3244
3245 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
3246 }
3247
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3248 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
3249 unsigned int reg, unsigned int val)
3250 {
3251 struct phy_device *phydev = pl->phydev;
3252 int prtad, devad;
3253
3254 if (mdio_phy_id_is_c45(phy_id)) {
3255 prtad = mdio_phy_id_prtad(phy_id);
3256 devad = mdio_phy_id_devad(phy_id);
3257 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
3258 reg, val);
3259 }
3260
3261 if (phydev->is_c45) {
3262 switch (reg) {
3263 case MII_BMCR:
3264 case MII_BMSR:
3265 case MII_PHYSID1:
3266 case MII_PHYSID2:
3267 devad = __ffs(phydev->c45_ids.mmds_present);
3268 break;
3269 case MII_ADVERTISE:
3270 case MII_LPA:
3271 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3272 return -EINVAL;
3273 devad = MDIO_MMD_AN;
3274 if (reg == MII_ADVERTISE)
3275 reg = MDIO_AN_ADVERTISE;
3276 else
3277 reg = MDIO_AN_LPA;
3278 break;
3279 default:
3280 return -EINVAL;
3281 }
3282 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
3283 reg, val);
3284 }
3285
3286 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
3287 }
3288
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)3289 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
3290 unsigned int reg)
3291 {
3292 struct phylink_link_state state;
3293 int val = 0xffff;
3294
3295 switch (pl->act_link_an_mode) {
3296 case MLO_AN_FIXED:
3297 if (phy_id == 0) {
3298 phylink_get_fixed_state(pl, &state);
3299 val = phylink_mii_emul_read(reg, &state);
3300 }
3301 break;
3302
3303 case MLO_AN_PHY:
3304 return -EOPNOTSUPP;
3305
3306 case MLO_AN_INBAND:
3307 if (phy_id == 0) {
3308 phylink_mac_pcs_get_state(pl, &state);
3309 val = phylink_mii_emul_read(reg, &state);
3310 }
3311 break;
3312 }
3313
3314 return val & 0xffff;
3315 }
3316
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3317 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3318 unsigned int reg, unsigned int val)
3319 {
3320 switch (pl->act_link_an_mode) {
3321 case MLO_AN_FIXED:
3322 break;
3323
3324 case MLO_AN_PHY:
3325 return -EOPNOTSUPP;
3326
3327 case MLO_AN_INBAND:
3328 break;
3329 }
3330
3331 return 0;
3332 }
3333
3334 /**
3335 * phylink_mii_ioctl() - generic mii ioctl interface
3336 * @pl: a pointer to a &struct phylink returned from phylink_create()
3337 * @ifr: a pointer to a &struct ifreq for socket ioctls
3338 * @cmd: ioctl cmd to execute
3339 *
3340 * Perform the specified MII ioctl on the PHY attached to the phylink instance
3341 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3342 *
3343 * Returns: zero on success or negative error code.
3344 *
3345 * %SIOCGMIIPHY:
3346 * read register from the current PHY.
3347 * %SIOCGMIIREG:
3348 * read register from the specified PHY.
3349 * %SIOCSMIIREG:
3350 * set a register on the specified PHY.
3351 */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)3352 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3353 {
3354 struct mii_ioctl_data *mii = if_mii(ifr);
3355 int ret;
3356
3357 ASSERT_RTNL();
3358
3359 if (pl->phydev) {
3360 /* PHYs only exist for MLO_AN_PHY and SGMII */
3361 switch (cmd) {
3362 case SIOCGMIIPHY:
3363 mii->phy_id = pl->phydev->mdio.addr;
3364 fallthrough;
3365
3366 case SIOCGMIIREG:
3367 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3368 if (ret >= 0) {
3369 mii->val_out = ret;
3370 ret = 0;
3371 }
3372 break;
3373
3374 case SIOCSMIIREG:
3375 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3376 mii->val_in);
3377 break;
3378
3379 default:
3380 ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3381 break;
3382 }
3383 } else {
3384 switch (cmd) {
3385 case SIOCGMIIPHY:
3386 mii->phy_id = 0;
3387 fallthrough;
3388
3389 case SIOCGMIIREG:
3390 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3391 if (ret >= 0) {
3392 mii->val_out = ret;
3393 ret = 0;
3394 }
3395 break;
3396
3397 case SIOCSMIIREG:
3398 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3399 mii->val_in);
3400 break;
3401
3402 default:
3403 ret = -EOPNOTSUPP;
3404 break;
3405 }
3406 }
3407
3408 return ret;
3409 }
3410 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3411
3412 /**
3413 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3414 * link partners
3415 * @pl: a pointer to a &struct phylink returned from phylink_create()
3416 * @sync: perform action synchronously
3417 *
3418 * If we have a PHY that is not part of a SFP module, then set the speed
3419 * as described in the phy_speed_down() function. Please see this function
3420 * for a description of the @sync parameter.
3421 *
3422 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3423 */
phylink_speed_down(struct phylink * pl,bool sync)3424 int phylink_speed_down(struct phylink *pl, bool sync)
3425 {
3426 int ret = 0;
3427
3428 ASSERT_RTNL();
3429
3430 if (!pl->sfp_bus && pl->phydev)
3431 ret = phy_speed_down(pl->phydev, sync);
3432
3433 return ret;
3434 }
3435 EXPORT_SYMBOL_GPL(phylink_speed_down);
3436
3437 /**
3438 * phylink_speed_up() - restore the advertised speeds prior to the call to
3439 * phylink_speed_down()
3440 * @pl: a pointer to a &struct phylink returned from phylink_create()
3441 *
3442 * If we have a PHY that is not part of a SFP module, then restore the
3443 * PHY speeds as per phy_speed_up().
3444 *
3445 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3446 */
phylink_speed_up(struct phylink * pl)3447 int phylink_speed_up(struct phylink *pl)
3448 {
3449 int ret = 0;
3450
3451 ASSERT_RTNL();
3452
3453 if (!pl->sfp_bus && pl->phydev)
3454 ret = phy_speed_up(pl->phydev);
3455
3456 return ret;
3457 }
3458 EXPORT_SYMBOL_GPL(phylink_speed_up);
3459
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)3460 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3461 {
3462 struct phylink *pl = upstream;
3463
3464 pl->netdev->sfp_bus = bus;
3465 }
3466
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)3467 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3468 {
3469 struct phylink *pl = upstream;
3470
3471 pl->netdev->sfp_bus = NULL;
3472 }
3473
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)3474 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3475 const unsigned long *intf)
3476 {
3477 phy_interface_t interface;
3478 size_t i;
3479
3480 interface = PHY_INTERFACE_MODE_NA;
3481 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3482 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3483 interface = phylink_sfp_interface_preference[i];
3484 break;
3485 }
3486
3487 return interface;
3488 }
3489
phylink_sfp_set_config(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,bool changed)3490 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported,
3491 struct phylink_link_state *state,
3492 bool changed)
3493 {
3494 u8 mode = MLO_AN_INBAND;
3495
3496 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3497 phylink_an_mode_str(mode), phy_modes(state->interface),
3498 __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3499
3500 if (!linkmode_equal(pl->supported, supported)) {
3501 linkmode_copy(pl->supported, supported);
3502 changed = true;
3503 }
3504
3505 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3506 linkmode_copy(pl->link_config.advertising, state->advertising);
3507 changed = true;
3508 }
3509
3510 if (pl->req_link_an_mode != mode ||
3511 pl->link_config.interface != state->interface) {
3512 pl->req_link_an_mode = mode;
3513 pl->link_config.interface = state->interface;
3514
3515 changed = true;
3516
3517 phylink_info(pl, "switched to %s/%s link mode\n",
3518 phylink_an_mode_str(mode),
3519 phy_modes(state->interface));
3520 }
3521
3522 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3523 &pl->phylink_disable_state))
3524 phylink_mac_initial_config(pl, false);
3525 }
3526
phylink_sfp_config_phy(struct phylink * pl,struct phy_device * phy)3527 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)
3528 {
3529 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3530 struct phylink_link_state config;
3531 int ret;
3532
3533 linkmode_copy(support, phy->supported);
3534
3535 memset(&config, 0, sizeof(config));
3536 linkmode_copy(config.advertising, phy->advertising);
3537 config.interface = PHY_INTERFACE_MODE_NA;
3538 config.speed = SPEED_UNKNOWN;
3539 config.duplex = DUPLEX_UNKNOWN;
3540 config.pause = MLO_PAUSE_AN;
3541
3542 /* Ignore errors if we're expecting a PHY to attach later */
3543 ret = phylink_validate(pl, support, &config);
3544 if (ret) {
3545 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3546 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3547 ERR_PTR(ret));
3548 return ret;
3549 }
3550
3551 config.interface = phylink_sfp_select_interface(pl, config.advertising);
3552 if (config.interface == PHY_INTERFACE_MODE_NA)
3553 return -EINVAL;
3554
3555 /* Attach the PHY so that the PHY is present when we do the major
3556 * configuration step.
3557 */
3558 ret = phylink_attach_phy(pl, phy, config.interface);
3559 if (ret < 0)
3560 return ret;
3561
3562 /* This will validate the configuration for us. */
3563 ret = phylink_bringup_phy(pl, phy, config.interface);
3564 if (ret < 0) {
3565 phy_detach(phy);
3566 return ret;
3567 }
3568
3569 pl->link_port = pl->sfp_port;
3570
3571 phylink_sfp_set_config(pl, support, &config, true);
3572
3573 return 0;
3574 }
3575
phylink_sfp_config_optical(struct phylink * pl)3576 static int phylink_sfp_config_optical(struct phylink *pl)
3577 {
3578 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3579 DECLARE_PHY_INTERFACE_MASK(interfaces);
3580 struct phylink_link_state config;
3581 phy_interface_t interface;
3582 int ret;
3583
3584 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3585 (int)PHY_INTERFACE_MODE_MAX,
3586 pl->config->supported_interfaces,
3587 (int)PHY_INTERFACE_MODE_MAX,
3588 pl->sfp_interfaces);
3589
3590 /* Find the union of the supported interfaces by the PCS/MAC and
3591 * the SFP module.
3592 */
3593 phy_interface_and(interfaces, pl->config->supported_interfaces,
3594 pl->sfp_interfaces);
3595 if (phy_interface_empty(interfaces)) {
3596 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3597 return -EINVAL;
3598 }
3599
3600 memset(&config, 0, sizeof(config));
3601 linkmode_copy(support, pl->sfp_support);
3602 linkmode_copy(config.advertising, pl->sfp_support);
3603 config.speed = SPEED_UNKNOWN;
3604 config.duplex = DUPLEX_UNKNOWN;
3605 config.pause = MLO_PAUSE_AN;
3606
3607 /* For all the interfaces that are supported, reduce the sfp_support
3608 * mask to only those link modes that can be supported.
3609 */
3610 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3611 interfaces);
3612 if (ret) {
3613 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3614 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3615 return ret;
3616 }
3617
3618 interface = phylink_choose_sfp_interface(pl, interfaces);
3619 if (interface == PHY_INTERFACE_MODE_NA) {
3620 phylink_err(pl, "failed to select SFP interface\n");
3621 return -EINVAL;
3622 }
3623
3624 phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3625 phy_modes(interface));
3626
3627 if (!phylink_validate_pcs_inband_autoneg(pl, interface,
3628 config.advertising)) {
3629 phylink_err(pl, "autoneg setting not compatible with PCS");
3630 return -EINVAL;
3631 }
3632
3633 config.interface = interface;
3634
3635 /* Ignore errors if we're expecting a PHY to attach later */
3636 ret = phylink_validate(pl, support, &config);
3637 if (ret) {
3638 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3639 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3640 ERR_PTR(ret));
3641 return ret;
3642 }
3643
3644 pl->link_port = pl->sfp_port;
3645
3646 phylink_sfp_set_config(pl, pl->sfp_support, &config, false);
3647
3648 return 0;
3649 }
3650
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3651 static int phylink_sfp_module_insert(void *upstream,
3652 const struct sfp_eeprom_id *id)
3653 {
3654 struct phylink *pl = upstream;
3655
3656 ASSERT_RTNL();
3657
3658 linkmode_zero(pl->sfp_support);
3659 phy_interface_zero(pl->sfp_interfaces);
3660 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3661 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3662
3663 /* If this module may have a PHY connecting later, defer until later */
3664 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3665 if (pl->sfp_may_have_phy)
3666 return 0;
3667
3668 return phylink_sfp_config_optical(pl);
3669 }
3670
phylink_sfp_module_start(void * upstream)3671 static int phylink_sfp_module_start(void *upstream)
3672 {
3673 struct phylink *pl = upstream;
3674
3675 /* If this SFP module has a PHY, start the PHY now. */
3676 if (pl->phydev) {
3677 phy_start(pl->phydev);
3678 return 0;
3679 }
3680
3681 /* If the module may have a PHY but we didn't detect one we
3682 * need to configure the MAC here.
3683 */
3684 if (!pl->sfp_may_have_phy)
3685 return 0;
3686
3687 return phylink_sfp_config_optical(pl);
3688 }
3689
phylink_sfp_module_stop(void * upstream)3690 static void phylink_sfp_module_stop(void *upstream)
3691 {
3692 struct phylink *pl = upstream;
3693
3694 /* If this SFP module has a PHY, stop it. */
3695 if (pl->phydev)
3696 phy_stop(pl->phydev);
3697 }
3698
phylink_sfp_link_down(void * upstream)3699 static void phylink_sfp_link_down(void *upstream)
3700 {
3701 struct phylink *pl = upstream;
3702
3703 ASSERT_RTNL();
3704
3705 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3706 }
3707
phylink_sfp_link_up(void * upstream)3708 static void phylink_sfp_link_up(void *upstream)
3709 {
3710 struct phylink *pl = upstream;
3711
3712 ASSERT_RTNL();
3713
3714 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3715 }
3716
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3717 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3718 {
3719 struct phylink *pl = upstream;
3720
3721 if (!phy->drv) {
3722 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n",
3723 phydev_name(phy), (unsigned long)phy->phy_id);
3724 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n");
3725 return -EINVAL;
3726 }
3727
3728 /*
3729 * This is the new way of dealing with flow control for PHYs,
3730 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3731 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3732 * using our validate call to the MAC, we rely upon the MAC
3733 * clearing the bits from both supported and advertising fields.
3734 */
3735 phy_support_asym_pause(phy);
3736
3737 /* Set the PHY's host supported interfaces */
3738 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3739 pl->config->supported_interfaces);
3740
3741 /* Do the initial configuration */
3742 return phylink_sfp_config_phy(pl, phy);
3743 }
3744
phylink_sfp_disconnect_phy(void * upstream,struct phy_device * phydev)3745 static void phylink_sfp_disconnect_phy(void *upstream,
3746 struct phy_device *phydev)
3747 {
3748 phylink_disconnect_phy(upstream);
3749 }
3750
3751 static const struct sfp_upstream_ops sfp_phylink_ops = {
3752 .attach = phylink_sfp_attach,
3753 .detach = phylink_sfp_detach,
3754 .module_insert = phylink_sfp_module_insert,
3755 .module_start = phylink_sfp_module_start,
3756 .module_stop = phylink_sfp_module_stop,
3757 .link_up = phylink_sfp_link_up,
3758 .link_down = phylink_sfp_link_down,
3759 .connect_phy = phylink_sfp_connect_phy,
3760 .disconnect_phy = phylink_sfp_disconnect_phy,
3761 };
3762
3763 /* Helpers for MAC drivers */
3764
3765 static struct {
3766 int bit;
3767 int speed;
3768 } phylink_c73_priority_resolution[] = {
3769 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3770 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3771 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3772 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3773 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3774 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3775 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3776 /* 5GBASE-KR not supported */
3777 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3778 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3779 };
3780
phylink_resolve_c73(struct phylink_link_state * state)3781 void phylink_resolve_c73(struct phylink_link_state *state)
3782 {
3783 int i;
3784
3785 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3786 int bit = phylink_c73_priority_resolution[i].bit;
3787 if (linkmode_test_bit(bit, state->advertising) &&
3788 linkmode_test_bit(bit, state->lp_advertising))
3789 break;
3790 }
3791
3792 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3793 state->speed = phylink_c73_priority_resolution[i].speed;
3794 state->duplex = DUPLEX_FULL;
3795 } else {
3796 /* negotiation failure */
3797 state->link = false;
3798 }
3799
3800 phylink_resolve_an_pause(state);
3801 }
3802 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3803
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3804 static void phylink_decode_c37_word(struct phylink_link_state *state,
3805 uint16_t config_reg, int speed)
3806 {
3807 int fd_bit;
3808
3809 if (speed == SPEED_2500)
3810 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3811 else
3812 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3813
3814 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3815
3816 if (linkmode_test_bit(fd_bit, state->advertising) &&
3817 linkmode_test_bit(fd_bit, state->lp_advertising)) {
3818 state->speed = speed;
3819 state->duplex = DUPLEX_FULL;
3820 } else {
3821 /* negotiation failure */
3822 state->link = false;
3823 }
3824
3825 phylink_resolve_an_pause(state);
3826 }
3827
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3828 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3829 uint16_t config_reg)
3830 {
3831 if (!(config_reg & LPA_SGMII_LINK)) {
3832 state->link = false;
3833 return;
3834 }
3835
3836 switch (config_reg & LPA_SGMII_SPD_MASK) {
3837 case LPA_SGMII_10:
3838 state->speed = SPEED_10;
3839 break;
3840 case LPA_SGMII_100:
3841 state->speed = SPEED_100;
3842 break;
3843 case LPA_SGMII_1000:
3844 state->speed = SPEED_1000;
3845 break;
3846 default:
3847 state->link = false;
3848 return;
3849 }
3850 if (config_reg & LPA_SGMII_FULL_DUPLEX)
3851 state->duplex = DUPLEX_FULL;
3852 else
3853 state->duplex = DUPLEX_HALF;
3854 }
3855
3856 /**
3857 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3858 * @state: a pointer to a struct phylink_link_state.
3859 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3860 *
3861 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3862 * code word. Decode the USXGMII code word and populate the corresponding fields
3863 * (speed, duplex) into the phylink_link_state structure.
3864 */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3865 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3866 uint16_t lpa)
3867 {
3868 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3869 case MDIO_USXGMII_10:
3870 state->speed = SPEED_10;
3871 break;
3872 case MDIO_USXGMII_100:
3873 state->speed = SPEED_100;
3874 break;
3875 case MDIO_USXGMII_1000:
3876 state->speed = SPEED_1000;
3877 break;
3878 case MDIO_USXGMII_2500:
3879 state->speed = SPEED_2500;
3880 break;
3881 case MDIO_USXGMII_5000:
3882 state->speed = SPEED_5000;
3883 break;
3884 case MDIO_USXGMII_10G:
3885 state->speed = SPEED_10000;
3886 break;
3887 default:
3888 state->link = false;
3889 return;
3890 }
3891
3892 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3893 state->duplex = DUPLEX_FULL;
3894 else
3895 state->duplex = DUPLEX_HALF;
3896 }
3897 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3898
3899 /**
3900 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3901 * @state: a pointer to a struct phylink_link_state.
3902 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3903 *
3904 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3905 * code word. Decode the USGMII code word and populate the corresponding fields
3906 * (speed, duplex) into the phylink_link_state structure. The structure for this
3907 * word is the same as the USXGMII word, except it only supports speeds up to
3908 * 1Gbps.
3909 */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)3910 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3911 uint16_t lpa)
3912 {
3913 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3914 case MDIO_USXGMII_10:
3915 state->speed = SPEED_10;
3916 break;
3917 case MDIO_USXGMII_100:
3918 state->speed = SPEED_100;
3919 break;
3920 case MDIO_USXGMII_1000:
3921 state->speed = SPEED_1000;
3922 break;
3923 default:
3924 state->link = false;
3925 return;
3926 }
3927
3928 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3929 state->duplex = DUPLEX_FULL;
3930 else
3931 state->duplex = DUPLEX_HALF;
3932 }
3933
3934 /**
3935 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3936 * @state: a pointer to a &struct phylink_link_state.
3937 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
3938 * @bmsr: The value of the %MII_BMSR register
3939 * @lpa: The value of the %MII_LPA register
3940 *
3941 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3942 * clause 37 negotiation and/or SGMII control.
3943 *
3944 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3945 * the phylink @state structure. This is suitable to be used for implementing
3946 * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3947 * accessing @bmsr and @lpa cannot be done with MDIO directly.
3948 */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,unsigned int neg_mode,u16 bmsr,u16 lpa)3949 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3950 unsigned int neg_mode, u16 bmsr, u16 lpa)
3951 {
3952 state->link = !!(bmsr & BMSR_LSTATUS);
3953 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3954
3955 /* If the link is down, the advertisement data is undefined. */
3956 if (!state->link)
3957 return;
3958
3959 switch (state->interface) {
3960 case PHY_INTERFACE_MODE_1000BASEX:
3961 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
3962 phylink_decode_c37_word(state, lpa, SPEED_1000);
3963 } else {
3964 state->speed = SPEED_1000;
3965 state->duplex = DUPLEX_FULL;
3966 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
3967 }
3968 break;
3969
3970 case PHY_INTERFACE_MODE_2500BASEX:
3971 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
3972 phylink_decode_c37_word(state, lpa, SPEED_2500);
3973 } else {
3974 state->speed = SPEED_2500;
3975 state->duplex = DUPLEX_FULL;
3976 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
3977 }
3978 break;
3979
3980 case PHY_INTERFACE_MODE_SGMII:
3981 case PHY_INTERFACE_MODE_QSGMII:
3982 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3983 phylink_decode_sgmii_word(state, lpa);
3984 break;
3985
3986 case PHY_INTERFACE_MODE_QUSGMII:
3987 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3988 phylink_decode_usgmii_word(state, lpa);
3989 break;
3990
3991 default:
3992 state->link = false;
3993 break;
3994 }
3995 }
3996 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3997
3998 /**
3999 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
4000 * @pcs: a pointer to a &struct mdio_device.
4001 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
4002 * @state: a pointer to a &struct phylink_link_state.
4003 *
4004 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4005 * clause 37 negotiation and/or SGMII control.
4006 *
4007 * Read the MAC PCS state from the MII device configured in @config and
4008 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
4009 * the phylink @state structure. This is suitable to be directly plugged
4010 * into the pcs_get_state() member of the struct phylink_pcs_ops
4011 * structure.
4012 */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,unsigned int neg_mode,struct phylink_link_state * state)4013 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
4014 unsigned int neg_mode,
4015 struct phylink_link_state *state)
4016 {
4017 int bmsr, lpa;
4018
4019 bmsr = mdiodev_read(pcs, MII_BMSR);
4020 lpa = mdiodev_read(pcs, MII_LPA);
4021 if (bmsr < 0 || lpa < 0) {
4022 state->link = false;
4023 return;
4024 }
4025
4026 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa);
4027 }
4028 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
4029
4030 /**
4031 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
4032 * advertisement
4033 * @interface: the PHY interface mode being configured
4034 * @advertising: the ethtool advertisement mask
4035 *
4036 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4037 * clause 37 negotiation and/or SGMII control.
4038 *
4039 * Encode the clause 37 PCS advertisement as specified by @interface and
4040 * @advertising.
4041 *
4042 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
4043 */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)4044 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
4045 const unsigned long *advertising)
4046 {
4047 u16 adv;
4048
4049 switch (interface) {
4050 case PHY_INTERFACE_MODE_1000BASEX:
4051 case PHY_INTERFACE_MODE_2500BASEX:
4052 adv = ADVERTISE_1000XFULL;
4053 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
4054 advertising))
4055 adv |= ADVERTISE_1000XPAUSE;
4056 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
4057 advertising))
4058 adv |= ADVERTISE_1000XPSE_ASYM;
4059 return adv;
4060 case PHY_INTERFACE_MODE_SGMII:
4061 case PHY_INTERFACE_MODE_QSGMII:
4062 return 0x0001;
4063 default:
4064 /* Nothing to do for other modes */
4065 return -EINVAL;
4066 }
4067 }
4068 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
4069
4070 /**
4071 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
4072 * @pcs: a pointer to a &struct mdio_device.
4073 * @interface: the PHY interface mode being configured
4074 * @advertising: the ethtool advertisement mask
4075 * @neg_mode: PCS negotiation mode
4076 *
4077 * Configure a Clause 22 PCS PHY with the appropriate negotiation
4078 * parameters for the @mode, @interface and @advertising parameters.
4079 * Returns negative error number on failure, zero if the advertisement
4080 * has not changed, or positive if there is a change.
4081 */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising,unsigned int neg_mode)4082 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
4083 phy_interface_t interface,
4084 const unsigned long *advertising,
4085 unsigned int neg_mode)
4086 {
4087 bool changed = 0;
4088 u16 bmcr;
4089 int ret, adv;
4090
4091 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
4092 if (adv >= 0) {
4093 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
4094 MII_ADVERTISE, 0xffff, adv);
4095 if (ret < 0)
4096 return ret;
4097 changed = ret;
4098 }
4099
4100 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4101 bmcr = BMCR_ANENABLE;
4102 else
4103 bmcr = 0;
4104
4105 /* Configure the inband state. Ensure ISOLATE bit is disabled */
4106 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
4107 if (ret < 0)
4108 return ret;
4109
4110 return changed;
4111 }
4112 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
4113
4114 /**
4115 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
4116 * @pcs: a pointer to a &struct mdio_device.
4117 *
4118 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4119 * clause 37 negotiation.
4120 *
4121 * Restart the clause 37 negotiation with the link partner. This is
4122 * suitable to be directly plugged into the pcs_get_state() member
4123 * of the struct phylink_pcs_ops structure.
4124 */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)4125 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
4126 {
4127 int val = mdiodev_read(pcs, MII_BMCR);
4128
4129 if (val >= 0) {
4130 val |= BMCR_ANRESTART;
4131
4132 mdiodev_write(pcs, MII_BMCR, val);
4133 }
4134 }
4135 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
4136
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)4137 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
4138 struct phylink_link_state *state)
4139 {
4140 struct mii_bus *bus = pcs->bus;
4141 int addr = pcs->addr;
4142 int stat;
4143
4144 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
4145 if (stat < 0) {
4146 state->link = false;
4147 return;
4148 }
4149
4150 state->link = !!(stat & MDIO_STAT1_LSTATUS);
4151 if (!state->link)
4152 return;
4153
4154 switch (state->interface) {
4155 case PHY_INTERFACE_MODE_10GBASER:
4156 state->speed = SPEED_10000;
4157 state->duplex = DUPLEX_FULL;
4158 break;
4159
4160 default:
4161 break;
4162 }
4163 }
4164 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
4165
phylink_init(void)4166 static int __init phylink_init(void)
4167 {
4168 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
4169 __set_bit(phylink_sfp_interface_preference[i],
4170 phylink_sfp_interfaces);
4171
4172 return 0;
4173 }
4174
4175 module_init(phylink_init);
4176
4177 MODULE_LICENSE("GPL v2");
4178 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
4179