1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * ad525x_dpot: Driver for the Analog Devices digital potentiometers
4 * Copyright (c) 2009-2010 Analog Devices, Inc.
5 * Author: Michael Hennerich <michael.hennerich@analog.com>
6 *
7 * DEVID #Wipers #Positions Resistor Options (kOhm)
8 * AD5258 1 64 1, 10, 50, 100
9 * AD5259 1 256 5, 10, 50, 100
10 * AD5251 2 64 1, 10, 50, 100
11 * AD5252 2 256 1, 10, 50, 100
12 * AD5255 3 512 25, 250
13 * AD5253 4 64 1, 10, 50, 100
14 * AD5254 4 256 1, 10, 50, 100
15 * AD5160 1 256 5, 10, 50, 100
16 * AD5161 1 256 5, 10, 50, 100
17 * AD5162 2 256 2.5, 10, 50, 100
18 * AD5165 1 256 100
19 * AD5200 1 256 10, 50
20 * AD5201 1 33 10, 50
21 * AD5203 4 64 10, 100
22 * AD5204 4 256 10, 50, 100
23 * AD5206 6 256 10, 50, 100
24 * AD5207 2 256 10, 50, 100
25 * AD5231 1 1024 10, 50, 100
26 * AD5232 2 256 10, 50, 100
27 * AD5233 4 64 10, 50, 100
28 * AD5235 2 1024 25, 250
29 * AD5260 1 256 20, 50, 200
30 * AD5262 2 256 20, 50, 200
31 * AD5263 4 256 20, 50, 200
32 * AD5290 1 256 10, 50, 100
33 * AD5291 1 256 20, 50, 100 (20-TP)
34 * AD5292 1 1024 20, 50, 100 (20-TP)
35 * AD5293 1 1024 20, 50, 100
36 * AD7376 1 128 10, 50, 100, 1M
37 * AD8400 1 256 1, 10, 50, 100
38 * AD8402 2 256 1, 10, 50, 100
39 * AD8403 4 256 1, 10, 50, 100
40 * ADN2850 3 512 25, 250
41 * AD5241 1 256 10, 100, 1M
42 * AD5246 1 128 5, 10, 50, 100
43 * AD5247 1 128 5, 10, 50, 100
44 * AD5245 1 256 5, 10, 50, 100
45 * AD5243 2 256 2.5, 10, 50, 100
46 * AD5248 2 256 2.5, 10, 50, 100
47 * AD5242 2 256 20, 50, 200
48 * AD5280 1 256 20, 50, 200
49 * AD5282 2 256 20, 50, 200
50 * ADN2860 3 512 25, 250
51 * AD5273 1 64 1, 10, 50, 100 (OTP)
52 * AD5171 1 64 5, 10, 50, 100 (OTP)
53 * AD5170 1 256 2.5, 10, 50, 100 (OTP)
54 * AD5172 2 256 2.5, 10, 50, 100 (OTP)
55 * AD5173 2 256 2.5, 10, 50, 100 (OTP)
56 * AD5270 1 1024 20, 50, 100 (50-TP)
57 * AD5271 1 256 20, 50, 100 (50-TP)
58 * AD5272 1 1024 20, 50, 100 (50-TP)
59 * AD5274 1 256 20, 50, 100 (50-TP)
60 *
61 * See Documentation/misc-devices/ad525x_dpot.rst for more info.
62 *
63 * derived from ad5258.c
64 * Copyright (c) 2009 Cyber Switching, Inc.
65 * Author: Chris Verges <chrisv@cyberswitching.com>
66 *
67 * derived from ad5252.c
68 * Copyright (c) 2006-2011 Michael Hennerich <michael.hennerich@analog.com>
69 */
70
71 #include <linux/module.h>
72 #include <linux/device.h>
73 #include <linux/kernel.h>
74 #include <linux/delay.h>
75 #include <linux/slab.h>
76 #include <linux/string_choices.h>
77
78 #include "ad525x_dpot.h"
79
80 /*
81 * Client data (each client gets its own)
82 */
83
84 struct dpot_data {
85 struct ad_dpot_bus_data bdata;
86 struct mutex update_lock;
87 unsigned int rdac_mask;
88 unsigned int max_pos;
89 unsigned long devid;
90 unsigned int uid;
91 unsigned int feat;
92 unsigned int wipers;
93 u16 rdac_cache[MAX_RDACS];
94 DECLARE_BITMAP(otp_en_mask, MAX_RDACS);
95 };
96
dpot_read_d8(struct dpot_data * dpot)97 static inline int dpot_read_d8(struct dpot_data *dpot)
98 {
99 return dpot->bdata.bops->read_d8(dpot->bdata.client);
100 }
101
dpot_read_r8d8(struct dpot_data * dpot,u8 reg)102 static inline int dpot_read_r8d8(struct dpot_data *dpot, u8 reg)
103 {
104 return dpot->bdata.bops->read_r8d8(dpot->bdata.client, reg);
105 }
106
dpot_read_r8d16(struct dpot_data * dpot,u8 reg)107 static inline int dpot_read_r8d16(struct dpot_data *dpot, u8 reg)
108 {
109 return dpot->bdata.bops->read_r8d16(dpot->bdata.client, reg);
110 }
111
dpot_write_d8(struct dpot_data * dpot,u8 val)112 static inline int dpot_write_d8(struct dpot_data *dpot, u8 val)
113 {
114 return dpot->bdata.bops->write_d8(dpot->bdata.client, val);
115 }
116
dpot_write_r8d8(struct dpot_data * dpot,u8 reg,u16 val)117 static inline int dpot_write_r8d8(struct dpot_data *dpot, u8 reg, u16 val)
118 {
119 return dpot->bdata.bops->write_r8d8(dpot->bdata.client, reg, val);
120 }
121
dpot_write_r8d16(struct dpot_data * dpot,u8 reg,u16 val)122 static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val)
123 {
124 return dpot->bdata.bops->write_r8d16(dpot->bdata.client, reg, val);
125 }
126
dpot_read_spi(struct dpot_data * dpot,u8 reg)127 static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
128 {
129 unsigned int ctrl = 0;
130 int value;
131
132 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
133
134 if (dpot->feat & F_RDACS_WONLY)
135 return dpot->rdac_cache[reg & DPOT_RDAC_MASK];
136 if (dpot->uid == DPOT_UID(AD5291_ID) ||
137 dpot->uid == DPOT_UID(AD5292_ID) ||
138 dpot->uid == DPOT_UID(AD5293_ID)) {
139
140 value = dpot_read_r8d8(dpot,
141 DPOT_AD5291_READ_RDAC << 2);
142
143 if (value < 0)
144 return value;
145
146 if (dpot->uid == DPOT_UID(AD5291_ID))
147 value = value >> 2;
148
149 return value;
150 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
151 dpot->uid == DPOT_UID(AD5271_ID)) {
152
153 value = dpot_read_r8d8(dpot,
154 DPOT_AD5270_1_2_4_READ_RDAC << 2);
155
156 if (value < 0)
157 return value;
158
159 if (dpot->uid == DPOT_UID(AD5271_ID))
160 value = value >> 2;
161
162 return value;
163 }
164
165 ctrl = DPOT_SPI_READ_RDAC;
166 } else if (reg & DPOT_ADDR_EEPROM) {
167 ctrl = DPOT_SPI_READ_EEPROM;
168 }
169
170 if (dpot->feat & F_SPI_16BIT)
171 return dpot_read_r8d8(dpot, ctrl);
172 else if (dpot->feat & F_SPI_24BIT)
173 return dpot_read_r8d16(dpot, ctrl);
174
175 return -EFAULT;
176 }
177
dpot_read_i2c(struct dpot_data * dpot,u8 reg)178 static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
179 {
180 int value;
181 unsigned int ctrl = 0;
182
183 switch (dpot->uid) {
184 case DPOT_UID(AD5246_ID):
185 case DPOT_UID(AD5247_ID):
186 return dpot_read_d8(dpot);
187 case DPOT_UID(AD5245_ID):
188 case DPOT_UID(AD5241_ID):
189 case DPOT_UID(AD5242_ID):
190 case DPOT_UID(AD5243_ID):
191 case DPOT_UID(AD5248_ID):
192 case DPOT_UID(AD5280_ID):
193 case DPOT_UID(AD5282_ID):
194 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
195 0 : DPOT_AD5282_RDAC_AB;
196 return dpot_read_r8d8(dpot, ctrl);
197 case DPOT_UID(AD5170_ID):
198 case DPOT_UID(AD5171_ID):
199 case DPOT_UID(AD5273_ID):
200 return dpot_read_d8(dpot);
201 case DPOT_UID(AD5172_ID):
202 case DPOT_UID(AD5173_ID):
203 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
204 0 : DPOT_AD5172_3_A0;
205 return dpot_read_r8d8(dpot, ctrl);
206 case DPOT_UID(AD5272_ID):
207 case DPOT_UID(AD5274_ID):
208 dpot_write_r8d8(dpot,
209 (DPOT_AD5270_1_2_4_READ_RDAC << 2), 0);
210
211 value = dpot_read_r8d16(dpot, DPOT_AD5270_1_2_4_RDAC << 2);
212 if (value < 0)
213 return value;
214 /*
215 * AD5272/AD5274 returns high byte first, however
216 * underling smbus expects low byte first.
217 */
218 value = swab16(value);
219
220 if (dpot->uid == DPOT_UID(AD5274_ID))
221 value = value >> 2;
222 return value;
223 default:
224 if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256))
225 return dpot_read_r8d16(dpot, (reg & 0xF8) |
226 ((reg & 0x7) << 1));
227 else
228 return dpot_read_r8d8(dpot, reg);
229 }
230 }
231
dpot_read(struct dpot_data * dpot,u8 reg)232 static s32 dpot_read(struct dpot_data *dpot, u8 reg)
233 {
234 if (dpot->feat & F_SPI)
235 return dpot_read_spi(dpot, reg);
236 else
237 return dpot_read_i2c(dpot, reg);
238 }
239
dpot_write_spi(struct dpot_data * dpot,u8 reg,u16 value)240 static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
241 {
242 unsigned int val = 0;
243
244 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD | DPOT_ADDR_OTP))) {
245 if (dpot->feat & F_RDACS_WONLY)
246 dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value;
247
248 if (dpot->feat & F_AD_APPDATA) {
249 if (dpot->feat & F_SPI_8BIT) {
250 val = ((reg & DPOT_RDAC_MASK) <<
251 DPOT_MAX_POS(dpot->devid)) |
252 value;
253 return dpot_write_d8(dpot, val);
254 } else if (dpot->feat & F_SPI_16BIT) {
255 val = ((reg & DPOT_RDAC_MASK) <<
256 DPOT_MAX_POS(dpot->devid)) |
257 value;
258 return dpot_write_r8d8(dpot, val >> 8,
259 val & 0xFF);
260 } else
261 BUG();
262 } else {
263 if (dpot->uid == DPOT_UID(AD5291_ID) ||
264 dpot->uid == DPOT_UID(AD5292_ID) ||
265 dpot->uid == DPOT_UID(AD5293_ID)) {
266
267 dpot_write_r8d8(dpot, DPOT_AD5291_CTRLREG << 2,
268 DPOT_AD5291_UNLOCK_CMD);
269
270 if (dpot->uid == DPOT_UID(AD5291_ID))
271 value = value << 2;
272
273 return dpot_write_r8d8(dpot,
274 (DPOT_AD5291_RDAC << 2) |
275 (value >> 8), value & 0xFF);
276 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
277 dpot->uid == DPOT_UID(AD5271_ID)) {
278 dpot_write_r8d8(dpot,
279 DPOT_AD5270_1_2_4_CTRLREG << 2,
280 DPOT_AD5270_1_2_4_UNLOCK_CMD);
281
282 if (dpot->uid == DPOT_UID(AD5271_ID))
283 value = value << 2;
284
285 return dpot_write_r8d8(dpot,
286 (DPOT_AD5270_1_2_4_RDAC << 2) |
287 (value >> 8), value & 0xFF);
288 }
289 val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK);
290 }
291 } else if (reg & DPOT_ADDR_EEPROM) {
292 val = DPOT_SPI_EEPROM | (reg & DPOT_RDAC_MASK);
293 } else if (reg & DPOT_ADDR_CMD) {
294 switch (reg) {
295 case DPOT_DEC_ALL_6DB:
296 val = DPOT_SPI_DEC_ALL_6DB;
297 break;
298 case DPOT_INC_ALL_6DB:
299 val = DPOT_SPI_INC_ALL_6DB;
300 break;
301 case DPOT_DEC_ALL:
302 val = DPOT_SPI_DEC_ALL;
303 break;
304 case DPOT_INC_ALL:
305 val = DPOT_SPI_INC_ALL;
306 break;
307 }
308 } else if (reg & DPOT_ADDR_OTP) {
309 if (dpot->uid == DPOT_UID(AD5291_ID) ||
310 dpot->uid == DPOT_UID(AD5292_ID)) {
311 return dpot_write_r8d8(dpot,
312 DPOT_AD5291_STORE_XTPM << 2, 0);
313 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
314 dpot->uid == DPOT_UID(AD5271_ID)) {
315 return dpot_write_r8d8(dpot,
316 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
317 }
318 } else
319 BUG();
320
321 if (dpot->feat & F_SPI_16BIT)
322 return dpot_write_r8d8(dpot, val, value);
323 else if (dpot->feat & F_SPI_24BIT)
324 return dpot_write_r8d16(dpot, val, value);
325
326 return -EFAULT;
327 }
328
dpot_write_i2c(struct dpot_data * dpot,u8 reg,u16 value)329 static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
330 {
331 /* Only write the instruction byte for certain commands */
332 unsigned int tmp = 0, ctrl = 0;
333
334 switch (dpot->uid) {
335 case DPOT_UID(AD5246_ID):
336 case DPOT_UID(AD5247_ID):
337 return dpot_write_d8(dpot, value);
338
339 case DPOT_UID(AD5245_ID):
340 case DPOT_UID(AD5241_ID):
341 case DPOT_UID(AD5242_ID):
342 case DPOT_UID(AD5243_ID):
343 case DPOT_UID(AD5248_ID):
344 case DPOT_UID(AD5280_ID):
345 case DPOT_UID(AD5282_ID):
346 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
347 0 : DPOT_AD5282_RDAC_AB;
348 return dpot_write_r8d8(dpot, ctrl, value);
349 case DPOT_UID(AD5171_ID):
350 case DPOT_UID(AD5273_ID):
351 if (reg & DPOT_ADDR_OTP) {
352 tmp = dpot_read_d8(dpot);
353 if (tmp >> 6) /* Ready to Program? */
354 return -EFAULT;
355 ctrl = DPOT_AD5273_FUSE;
356 }
357 return dpot_write_r8d8(dpot, ctrl, value);
358 case DPOT_UID(AD5172_ID):
359 case DPOT_UID(AD5173_ID):
360 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
361 0 : DPOT_AD5172_3_A0;
362 if (reg & DPOT_ADDR_OTP) {
363 tmp = dpot_read_r8d16(dpot, ctrl);
364 if (tmp >> 14) /* Ready to Program? */
365 return -EFAULT;
366 ctrl |= DPOT_AD5170_2_3_FUSE;
367 }
368 return dpot_write_r8d8(dpot, ctrl, value);
369 case DPOT_UID(AD5170_ID):
370 if (reg & DPOT_ADDR_OTP) {
371 tmp = dpot_read_r8d16(dpot, tmp);
372 if (tmp >> 14) /* Ready to Program? */
373 return -EFAULT;
374 ctrl = DPOT_AD5170_2_3_FUSE;
375 }
376 return dpot_write_r8d8(dpot, ctrl, value);
377 case DPOT_UID(AD5272_ID):
378 case DPOT_UID(AD5274_ID):
379 dpot_write_r8d8(dpot, DPOT_AD5270_1_2_4_CTRLREG << 2,
380 DPOT_AD5270_1_2_4_UNLOCK_CMD);
381
382 if (reg & DPOT_ADDR_OTP)
383 return dpot_write_r8d8(dpot,
384 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
385
386 if (dpot->uid == DPOT_UID(AD5274_ID))
387 value = value << 2;
388
389 return dpot_write_r8d8(dpot, (DPOT_AD5270_1_2_4_RDAC << 2) |
390 (value >> 8), value & 0xFF);
391 default:
392 if (reg & DPOT_ADDR_CMD)
393 return dpot_write_d8(dpot, reg);
394
395 if (dpot->max_pos > 256)
396 return dpot_write_r8d16(dpot, (reg & 0xF8) |
397 ((reg & 0x7) << 1), value);
398 else
399 /* All other registers require instruction + data bytes */
400 return dpot_write_r8d8(dpot, reg, value);
401 }
402 }
403
dpot_write(struct dpot_data * dpot,u8 reg,u16 value)404 static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value)
405 {
406 if (dpot->feat & F_SPI)
407 return dpot_write_spi(dpot, reg, value);
408 else
409 return dpot_write_i2c(dpot, reg, value);
410 }
411
412 /* sysfs functions */
413
sysfs_show_reg(struct device * dev,struct device_attribute * attr,char * buf,u32 reg)414 static ssize_t sysfs_show_reg(struct device *dev,
415 struct device_attribute *attr,
416 char *buf, u32 reg)
417 {
418 struct dpot_data *data = dev_get_drvdata(dev);
419 s32 value;
420
421 if (reg & DPOT_ADDR_OTP_EN)
422 return sprintf(buf, "%s\n", str_enabled_disabled(
423 test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask)));
424
425 mutex_lock(&data->update_lock);
426 value = dpot_read(data, reg);
427 mutex_unlock(&data->update_lock);
428
429 if (value < 0)
430 return -EINVAL;
431 /*
432 * Let someone else deal with converting this ...
433 * the tolerance is a two-byte value where the MSB
434 * is a sign + integer value, and the LSB is a
435 * decimal value. See page 18 of the AD5258
436 * datasheet (Rev. A) for more details.
437 */
438
439 if (reg & DPOT_REG_TOL)
440 return sprintf(buf, "0x%04x\n", value & 0xFFFF);
441 else
442 return sprintf(buf, "%u\n", value & data->rdac_mask);
443 }
444
sysfs_set_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t count,u32 reg)445 static ssize_t sysfs_set_reg(struct device *dev,
446 struct device_attribute *attr,
447 const char *buf, size_t count, u32 reg)
448 {
449 struct dpot_data *data = dev_get_drvdata(dev);
450 unsigned long value;
451 int err;
452
453 if (reg & DPOT_ADDR_OTP_EN) {
454 if (sysfs_streq(buf, "enabled"))
455 set_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
456 else
457 clear_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
458
459 return count;
460 }
461
462 if ((reg & DPOT_ADDR_OTP) &&
463 !test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask))
464 return -EPERM;
465
466 err = kstrtoul(buf, 10, &value);
467 if (err)
468 return err;
469
470 if (value > data->rdac_mask)
471 value = data->rdac_mask;
472
473 mutex_lock(&data->update_lock);
474 dpot_write(data, reg, value);
475 if (reg & DPOT_ADDR_EEPROM)
476 msleep(26); /* Sleep while the EEPROM updates */
477 else if (reg & DPOT_ADDR_OTP)
478 msleep(400); /* Sleep while the OTP updates */
479 mutex_unlock(&data->update_lock);
480
481 return count;
482 }
483
sysfs_do_cmd(struct device * dev,struct device_attribute * attr,const char * buf,size_t count,u32 reg)484 static ssize_t sysfs_do_cmd(struct device *dev,
485 struct device_attribute *attr,
486 const char *buf, size_t count, u32 reg)
487 {
488 struct dpot_data *data = dev_get_drvdata(dev);
489
490 mutex_lock(&data->update_lock);
491 dpot_write(data, reg, 0);
492 mutex_unlock(&data->update_lock);
493
494 return count;
495 }
496
497 /* ------------------------------------------------------------------------- */
498
499 #define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \
500 show_##_name(struct device *dev, \
501 struct device_attribute *attr, char *buf) \
502 { \
503 return sysfs_show_reg(dev, attr, buf, _reg); \
504 }
505
506 #define DPOT_DEVICE_SET(_name, _reg) static ssize_t \
507 set_##_name(struct device *dev, \
508 struct device_attribute *attr, \
509 const char *buf, size_t count) \
510 { \
511 return sysfs_set_reg(dev, attr, buf, count, _reg); \
512 }
513
514 #define DPOT_DEVICE_SHOW_SET(name, reg) \
515 DPOT_DEVICE_SHOW(name, reg) \
516 DPOT_DEVICE_SET(name, reg) \
517 static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, set_##name)
518
519 #define DPOT_DEVICE_SHOW_ONLY(name, reg) \
520 DPOT_DEVICE_SHOW(name, reg) \
521 static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, NULL)
522
523 DPOT_DEVICE_SHOW_SET(rdac0, DPOT_ADDR_RDAC | DPOT_RDAC0);
524 DPOT_DEVICE_SHOW_SET(eeprom0, DPOT_ADDR_EEPROM | DPOT_RDAC0);
525 DPOT_DEVICE_SHOW_ONLY(tolerance0, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC0);
526 DPOT_DEVICE_SHOW_SET(otp0, DPOT_ADDR_OTP | DPOT_RDAC0);
527 DPOT_DEVICE_SHOW_SET(otp0en, DPOT_ADDR_OTP_EN | DPOT_RDAC0);
528
529 DPOT_DEVICE_SHOW_SET(rdac1, DPOT_ADDR_RDAC | DPOT_RDAC1);
530 DPOT_DEVICE_SHOW_SET(eeprom1, DPOT_ADDR_EEPROM | DPOT_RDAC1);
531 DPOT_DEVICE_SHOW_ONLY(tolerance1, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC1);
532 DPOT_DEVICE_SHOW_SET(otp1, DPOT_ADDR_OTP | DPOT_RDAC1);
533 DPOT_DEVICE_SHOW_SET(otp1en, DPOT_ADDR_OTP_EN | DPOT_RDAC1);
534
535 DPOT_DEVICE_SHOW_SET(rdac2, DPOT_ADDR_RDAC | DPOT_RDAC2);
536 DPOT_DEVICE_SHOW_SET(eeprom2, DPOT_ADDR_EEPROM | DPOT_RDAC2);
537 DPOT_DEVICE_SHOW_ONLY(tolerance2, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC2);
538 DPOT_DEVICE_SHOW_SET(otp2, DPOT_ADDR_OTP | DPOT_RDAC2);
539 DPOT_DEVICE_SHOW_SET(otp2en, DPOT_ADDR_OTP_EN | DPOT_RDAC2);
540
541 DPOT_DEVICE_SHOW_SET(rdac3, DPOT_ADDR_RDAC | DPOT_RDAC3);
542 DPOT_DEVICE_SHOW_SET(eeprom3, DPOT_ADDR_EEPROM | DPOT_RDAC3);
543 DPOT_DEVICE_SHOW_ONLY(tolerance3, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC3);
544 DPOT_DEVICE_SHOW_SET(otp3, DPOT_ADDR_OTP | DPOT_RDAC3);
545 DPOT_DEVICE_SHOW_SET(otp3en, DPOT_ADDR_OTP_EN | DPOT_RDAC3);
546
547 DPOT_DEVICE_SHOW_SET(rdac4, DPOT_ADDR_RDAC | DPOT_RDAC4);
548 DPOT_DEVICE_SHOW_SET(eeprom4, DPOT_ADDR_EEPROM | DPOT_RDAC4);
549 DPOT_DEVICE_SHOW_ONLY(tolerance4, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC4);
550 DPOT_DEVICE_SHOW_SET(otp4, DPOT_ADDR_OTP | DPOT_RDAC4);
551 DPOT_DEVICE_SHOW_SET(otp4en, DPOT_ADDR_OTP_EN | DPOT_RDAC4);
552
553 DPOT_DEVICE_SHOW_SET(rdac5, DPOT_ADDR_RDAC | DPOT_RDAC5);
554 DPOT_DEVICE_SHOW_SET(eeprom5, DPOT_ADDR_EEPROM | DPOT_RDAC5);
555 DPOT_DEVICE_SHOW_ONLY(tolerance5, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC5);
556 DPOT_DEVICE_SHOW_SET(otp5, DPOT_ADDR_OTP | DPOT_RDAC5);
557 DPOT_DEVICE_SHOW_SET(otp5en, DPOT_ADDR_OTP_EN | DPOT_RDAC5);
558
559 static const struct attribute *dpot_attrib_wipers[] = {
560 &dev_attr_rdac0.attr,
561 &dev_attr_rdac1.attr,
562 &dev_attr_rdac2.attr,
563 &dev_attr_rdac3.attr,
564 &dev_attr_rdac4.attr,
565 &dev_attr_rdac5.attr,
566 NULL
567 };
568
569 static const struct attribute *dpot_attrib_eeprom[] = {
570 &dev_attr_eeprom0.attr,
571 &dev_attr_eeprom1.attr,
572 &dev_attr_eeprom2.attr,
573 &dev_attr_eeprom3.attr,
574 &dev_attr_eeprom4.attr,
575 &dev_attr_eeprom5.attr,
576 NULL
577 };
578
579 static const struct attribute *dpot_attrib_otp[] = {
580 &dev_attr_otp0.attr,
581 &dev_attr_otp1.attr,
582 &dev_attr_otp2.attr,
583 &dev_attr_otp3.attr,
584 &dev_attr_otp4.attr,
585 &dev_attr_otp5.attr,
586 NULL
587 };
588
589 static const struct attribute *dpot_attrib_otp_en[] = {
590 &dev_attr_otp0en.attr,
591 &dev_attr_otp1en.attr,
592 &dev_attr_otp2en.attr,
593 &dev_attr_otp3en.attr,
594 &dev_attr_otp4en.attr,
595 &dev_attr_otp5en.attr,
596 NULL
597 };
598
599 static const struct attribute *dpot_attrib_tolerance[] = {
600 &dev_attr_tolerance0.attr,
601 &dev_attr_tolerance1.attr,
602 &dev_attr_tolerance2.attr,
603 &dev_attr_tolerance3.attr,
604 &dev_attr_tolerance4.attr,
605 &dev_attr_tolerance5.attr,
606 NULL
607 };
608
609 /* ------------------------------------------------------------------------- */
610
611 #define DPOT_DEVICE_DO_CMD(_name, _cmd) static ssize_t \
612 set_##_name(struct device *dev, \
613 struct device_attribute *attr, \
614 const char *buf, size_t count) \
615 { \
616 return sysfs_do_cmd(dev, attr, buf, count, _cmd); \
617 } \
618 static DEVICE_ATTR(_name, S_IWUSR | S_IRUGO, NULL, set_##_name)
619
620 DPOT_DEVICE_DO_CMD(inc_all, DPOT_INC_ALL);
621 DPOT_DEVICE_DO_CMD(dec_all, DPOT_DEC_ALL);
622 DPOT_DEVICE_DO_CMD(inc_all_6db, DPOT_INC_ALL_6DB);
623 DPOT_DEVICE_DO_CMD(dec_all_6db, DPOT_DEC_ALL_6DB);
624
625 static struct attribute *ad525x_attributes_commands[] = {
626 &dev_attr_inc_all.attr,
627 &dev_attr_dec_all.attr,
628 &dev_attr_inc_all_6db.attr,
629 &dev_attr_dec_all_6db.attr,
630 NULL
631 };
632
633 static const struct attribute_group ad525x_group_commands = {
634 .attrs = ad525x_attributes_commands,
635 };
636
ad_dpot_add_files(struct device * dev,unsigned int features,unsigned int rdac)637 static int ad_dpot_add_files(struct device *dev,
638 unsigned int features, unsigned int rdac)
639 {
640 int err = sysfs_create_file(&dev->kobj,
641 dpot_attrib_wipers[rdac]);
642 if (features & F_CMD_EEP)
643 err |= sysfs_create_file(&dev->kobj,
644 dpot_attrib_eeprom[rdac]);
645 if (features & F_CMD_TOL)
646 err |= sysfs_create_file(&dev->kobj,
647 dpot_attrib_tolerance[rdac]);
648 if (features & F_CMD_OTP) {
649 err |= sysfs_create_file(&dev->kobj,
650 dpot_attrib_otp_en[rdac]);
651 err |= sysfs_create_file(&dev->kobj,
652 dpot_attrib_otp[rdac]);
653 }
654
655 if (err)
656 dev_err(dev, "failed to register sysfs hooks for RDAC%d\n",
657 rdac);
658
659 return err;
660 }
661
ad_dpot_remove_files(struct device * dev,unsigned int features,unsigned int rdac)662 static inline void ad_dpot_remove_files(struct device *dev,
663 unsigned int features, unsigned int rdac)
664 {
665 sysfs_remove_file(&dev->kobj,
666 dpot_attrib_wipers[rdac]);
667 if (features & F_CMD_EEP)
668 sysfs_remove_file(&dev->kobj,
669 dpot_attrib_eeprom[rdac]);
670 if (features & F_CMD_TOL)
671 sysfs_remove_file(&dev->kobj,
672 dpot_attrib_tolerance[rdac]);
673 if (features & F_CMD_OTP) {
674 sysfs_remove_file(&dev->kobj,
675 dpot_attrib_otp_en[rdac]);
676 sysfs_remove_file(&dev->kobj,
677 dpot_attrib_otp[rdac]);
678 }
679 }
680
ad_dpot_probe(struct device * dev,struct ad_dpot_bus_data * bdata,unsigned long devid,const char * name)681 int ad_dpot_probe(struct device *dev,
682 struct ad_dpot_bus_data *bdata, unsigned long devid,
683 const char *name)
684 {
685
686 struct dpot_data *data;
687 int i, err = 0;
688
689 data = kzalloc(sizeof(struct dpot_data), GFP_KERNEL);
690 if (!data) {
691 err = -ENOMEM;
692 goto exit;
693 }
694
695 dev_set_drvdata(dev, data);
696 mutex_init(&data->update_lock);
697
698 data->bdata = *bdata;
699 data->devid = devid;
700
701 data->max_pos = 1 << DPOT_MAX_POS(devid);
702 data->rdac_mask = data->max_pos - 1;
703 data->feat = DPOT_FEAT(devid);
704 data->uid = DPOT_UID(devid);
705 data->wipers = DPOT_WIPERS(devid);
706
707 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
708 if (data->wipers & (1 << i)) {
709 err = ad_dpot_add_files(dev, data->feat, i);
710 if (err)
711 goto exit_remove_files;
712 /* power-up midscale */
713 if (data->feat & F_RDACS_WONLY)
714 data->rdac_cache[i] = data->max_pos / 2;
715 }
716
717 if (data->feat & F_CMD_INC)
718 err = sysfs_create_group(&dev->kobj, &ad525x_group_commands);
719
720 if (err) {
721 dev_err(dev, "failed to register sysfs hooks\n");
722 goto exit_free;
723 }
724
725 dev_info(dev, "%s %d-Position Digital Potentiometer registered\n",
726 name, data->max_pos);
727
728 return 0;
729
730 exit_remove_files:
731 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
732 if (data->wipers & (1 << i))
733 ad_dpot_remove_files(dev, data->feat, i);
734
735 exit_free:
736 kfree(data);
737 dev_set_drvdata(dev, NULL);
738 exit:
739 dev_err(dev, "failed to create client for %s ID 0x%lX\n",
740 name, devid);
741 return err;
742 }
743 EXPORT_SYMBOL(ad_dpot_probe);
744
ad_dpot_remove(struct device * dev)745 void ad_dpot_remove(struct device *dev)
746 {
747 struct dpot_data *data = dev_get_drvdata(dev);
748 int i;
749
750 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
751 if (data->wipers & (1 << i))
752 ad_dpot_remove_files(dev, data->feat, i);
753
754 kfree(data);
755 }
756 EXPORT_SYMBOL(ad_dpot_remove);
757
758
759 MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>, "
760 "Michael Hennerich <michael.hennerich@analog.com>");
761 MODULE_DESCRIPTION("Digital potentiometer driver");
762 MODULE_LICENSE("GPL");
763