1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Texas Instruments ADS1119 ADC driver.
4 *
5 * Copyright 2024 Toradex
6 */
7
8 #include <linux/bits.h>
9 #include <linux/bitfield.h>
10 #include <linux/completion.h>
11 #include <linux/delay.h>
12 #include <linux/dev_printk.h>
13 #include <linux/err.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/interrupt.h>
16 #include <linux/iopoll.h>
17 #include <linux/i2c.h>
18 #include <linux/kernel.h>
19 #include <linux/math.h>
20 #include <linux/module.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/units.h>
24
25 #include <linux/iio/iio.h>
26 #include <linux/iio/buffer.h>
27 #include <linux/iio/trigger.h>
28 #include <linux/iio/triggered_buffer.h>
29 #include <linux/iio/trigger_consumer.h>
30
31 #define ADS1119_CMD_RESET 0x06
32 #define ADS1119_CMD_POWERDOWN 0x02
33 #define ADS1119_CMD_START_SYNC 0x08
34 #define ADS1119_CMD_RDATA 0x10
35 #define ADS1119_CMD_RREG_CONFIG 0x20
36 #define ADS1119_CMD_RREG_STATUS 0x24
37 #define ADS1119_CMD_WREG 0x40
38
39 #define ADS1119_CMD_RREG(reg) (0x20 | (reg) << 2)
40
41 /* Config register */
42 #define ADS1119_REG_CONFIG 0x00
43 #define ADS1119_CONFIG_VREF_FIELD BIT(0)
44 #define ADS1119_CONFIG_CM_FIELD BIT(1)
45 #define ADS1119_CONFIG_DR_FIELD GENMASK(3, 2)
46 #define ADS1119_CONFIG_GAIN_FIELD BIT(4)
47 #define ADS1119_CONFIG_MUX_FIELD GENMASK(7, 5)
48
49 #define ADS1119_VREF_INTERNAL 0
50 #define ADS1119_VREF_EXTERNAL 1
51 #define ADS1119_VREF_INTERNAL_VAL 2048000
52
53 #define ADS1119_CM_SINGLE 0
54 #define ADS1119_CM_CONTINUOUS 1
55
56 #define ADS1119_DR_20_SPS 0
57 #define ADS1119_DR_90_SPS 1
58 #define ADS1119_DR_330_SPS 2
59 #define ADS1119_DR_1000_SPS 3
60
61 #define ADS1119_GAIN_1 0
62 #define ADS1119_GAIN_4 1
63
64 #define ADS1119_MUX_AIN0_AIN1 0
65 #define ADS1119_MUX_AIN2_AIN3 1
66 #define ADS1119_MUX_AIN1_AIN2 2
67 #define ADS1119_MUX_AIN0 3
68 #define ADS1119_MUX_AIN1 4
69 #define ADS1119_MUX_AIN2 5
70 #define ADS1119_MUX_AIN3 6
71 #define ADS1119_MUX_SHORTED 7
72
73 /* Status register */
74 #define ADS1119_REG_STATUS 0x01
75 #define ADS1119_STATUS_DRDY_FIELD BIT(7)
76
77 #define ADS1119_DEFAULT_GAIN 1
78 #define ADS1119_DEFAULT_DATARATE 20
79
80 #define ADS1119_SUSPEND_DELAY 2000
81
82 /* Timeout based on the minimum sample rate of 20 SPS (50000us) */
83 #define ADS1119_MAX_DRDY_TIMEOUT 85000
84
85 #define ADS1119_MAX_CHANNELS 7
86 #define ADS1119_MAX_SINGLE_CHANNELS 4
87
88 struct ads1119_channel_config {
89 int gain;
90 int datarate;
91 int mux;
92 };
93
94 struct ads1119_state {
95 struct completion completion;
96 struct i2c_client *client;
97 struct gpio_desc *reset_gpio;
98 struct iio_trigger *trig;
99 struct ads1119_channel_config *channels_cfg;
100 unsigned int num_channels_cfg;
101 unsigned int cached_config;
102 int vref_uV;
103 };
104
105 static const char * const ads1119_power_supplies[] = {
106 "avdd", "dvdd"
107 };
108
109 static const int ads1119_available_datarates[] = {
110 20, 90, 330, 1000,
111 };
112
113 static const int ads1119_available_gains[] = {
114 1, 1,
115 1, 4,
116 };
117
ads1119_upd_cfg_reg(struct ads1119_state * st,unsigned int fields,unsigned int val)118 static int ads1119_upd_cfg_reg(struct ads1119_state *st, unsigned int fields,
119 unsigned int val)
120 {
121 unsigned int config = st->cached_config;
122 int ret;
123
124 config &= ~fields;
125 config |= val;
126
127 ret = i2c_smbus_write_byte_data(st->client, ADS1119_CMD_WREG, config);
128 if (ret)
129 return ret;
130
131 st->cached_config = config;
132
133 return 0;
134 }
135
ads1119_data_ready(struct ads1119_state * st)136 static bool ads1119_data_ready(struct ads1119_state *st)
137 {
138 int status;
139
140 status = i2c_smbus_read_byte_data(st->client, ADS1119_CMD_RREG_STATUS);
141 if (status < 0)
142 return false;
143
144 return FIELD_GET(ADS1119_STATUS_DRDY_FIELD, status);
145 }
146
ads1119_reset(struct ads1119_state * st)147 static int ads1119_reset(struct ads1119_state *st)
148 {
149 st->cached_config = 0;
150
151 if (!st->reset_gpio)
152 return i2c_smbus_write_byte(st->client, ADS1119_CMD_RESET);
153
154 gpiod_set_value_cansleep(st->reset_gpio, 1);
155 udelay(1);
156 gpiod_set_value_cansleep(st->reset_gpio, 0);
157 udelay(1);
158
159 return 0;
160 }
161
ads1119_set_conv_mode(struct ads1119_state * st,bool continuous)162 static int ads1119_set_conv_mode(struct ads1119_state *st, bool continuous)
163 {
164 unsigned int mode;
165
166 if (continuous)
167 mode = ADS1119_CM_CONTINUOUS;
168 else
169 mode = ADS1119_CM_SINGLE;
170
171 return ads1119_upd_cfg_reg(st, ADS1119_CONFIG_CM_FIELD,
172 FIELD_PREP(ADS1119_CONFIG_CM_FIELD, mode));
173 }
174
ads1119_get_hw_gain(int gain)175 static int ads1119_get_hw_gain(int gain)
176 {
177 if (gain == 4)
178 return ADS1119_GAIN_4;
179 else
180 return ADS1119_GAIN_1;
181 }
182
ads1119_get_hw_datarate(int datarate)183 static int ads1119_get_hw_datarate(int datarate)
184 {
185 switch (datarate) {
186 case 90:
187 return ADS1119_DR_90_SPS;
188 case 330:
189 return ADS1119_DR_330_SPS;
190 case 1000:
191 return ADS1119_DR_1000_SPS;
192 case 20:
193 default:
194 return ADS1119_DR_20_SPS;
195 }
196 }
197
ads1119_configure_channel(struct ads1119_state * st,int mux,int gain,int datarate)198 static int ads1119_configure_channel(struct ads1119_state *st, int mux,
199 int gain, int datarate)
200 {
201 int ret;
202
203 ret = ads1119_upd_cfg_reg(st, ADS1119_CONFIG_MUX_FIELD,
204 FIELD_PREP(ADS1119_CONFIG_MUX_FIELD, mux));
205 if (ret)
206 return ret;
207
208 ret = ads1119_upd_cfg_reg(st, ADS1119_CONFIG_GAIN_FIELD,
209 FIELD_PREP(ADS1119_CONFIG_GAIN_FIELD,
210 ads1119_get_hw_gain(gain)));
211 if (ret)
212 return ret;
213
214 return ads1119_upd_cfg_reg(st, ADS1119_CONFIG_DR_FIELD,
215 FIELD_PREP(ADS1119_CONFIG_DR_FIELD,
216 ads1119_get_hw_datarate(datarate)));
217 }
218
ads1119_poll_data_ready(struct ads1119_state * st,struct iio_chan_spec const * chan)219 static int ads1119_poll_data_ready(struct ads1119_state *st,
220 struct iio_chan_spec const *chan)
221 {
222 unsigned int datarate = st->channels_cfg[chan->address].datarate;
223 unsigned long wait_time;
224 bool data_ready;
225
226 /* Poll 5 times more than the data rate */
227 wait_time = DIV_ROUND_CLOSEST(MICRO, 5 * datarate);
228
229 return read_poll_timeout(ads1119_data_ready, data_ready,
230 data_ready, wait_time,
231 ADS1119_MAX_DRDY_TIMEOUT, false, st);
232 }
233
ads1119_read_data(struct ads1119_state * st,struct iio_chan_spec const * chan,unsigned int * val)234 static int ads1119_read_data(struct ads1119_state *st,
235 struct iio_chan_spec const *chan,
236 unsigned int *val)
237 {
238 unsigned int timeout;
239 int ret = 0;
240
241 timeout = msecs_to_jiffies(ADS1119_MAX_DRDY_TIMEOUT);
242
243 if (!st->client->irq) {
244 ret = ads1119_poll_data_ready(st, chan);
245 if (ret)
246 return ret;
247 } else if (!wait_for_completion_timeout(&st->completion, timeout)) {
248 return -ETIMEDOUT;
249 }
250
251 ret = i2c_smbus_read_word_swapped(st->client, ADS1119_CMD_RDATA);
252 if (ret < 0)
253 return ret;
254
255 *val = ret;
256
257 return 0;
258 }
259
ads1119_single_conversion(struct ads1119_state * st,struct iio_chan_spec const * chan,int * val,bool calib_offset)260 static int ads1119_single_conversion(struct ads1119_state *st,
261 struct iio_chan_spec const *chan,
262 int *val,
263 bool calib_offset)
264 {
265 struct device *dev = &st->client->dev;
266 int mux = st->channels_cfg[chan->address].mux;
267 int gain = st->channels_cfg[chan->address].gain;
268 int datarate = st->channels_cfg[chan->address].datarate;
269 unsigned int sample;
270 int ret;
271
272 if (calib_offset)
273 mux = ADS1119_MUX_SHORTED;
274
275 ret = pm_runtime_resume_and_get(dev);
276 if (ret)
277 goto pdown;
278
279 ret = ads1119_configure_channel(st, mux, gain, datarate);
280 if (ret)
281 goto pdown;
282
283 ret = i2c_smbus_write_byte(st->client, ADS1119_CMD_START_SYNC);
284 if (ret)
285 goto pdown;
286
287 ret = ads1119_read_data(st, chan, &sample);
288 if (ret)
289 goto pdown;
290
291 *val = sign_extend32(sample, chan->scan_type.realbits - 1);
292 ret = IIO_VAL_INT;
293 pdown:
294 pm_runtime_put_autosuspend(dev);
295 return ret;
296 }
297
ads1119_validate_datarate(struct ads1119_state * st,int datarate)298 static int ads1119_validate_datarate(struct ads1119_state *st, int datarate)
299 {
300 switch (datarate) {
301 case 20:
302 case 90:
303 case 330:
304 case 1000:
305 return datarate;
306 default:
307 return -EINVAL;
308 }
309 }
310
ads1119_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)311 static int ads1119_read_avail(struct iio_dev *indio_dev,
312 struct iio_chan_spec const *chan,
313 const int **vals, int *type, int *length,
314 long mask)
315 {
316 switch (mask) {
317 case IIO_CHAN_INFO_SCALE:
318 *type = IIO_VAL_FRACTIONAL;
319 *vals = ads1119_available_gains;
320 *length = ARRAY_SIZE(ads1119_available_gains);
321 return IIO_AVAIL_LIST;
322 case IIO_CHAN_INFO_SAMP_FREQ:
323 *type = IIO_VAL_INT;
324 *vals = ads1119_available_datarates;
325 *length = ARRAY_SIZE(ads1119_available_datarates);
326 return IIO_AVAIL_LIST;
327 default:
328 return -EINVAL;
329 }
330 }
331
ads1119_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)332 static int ads1119_read_raw(struct iio_dev *indio_dev,
333 struct iio_chan_spec const *chan, int *val,
334 int *val2, long mask)
335 {
336 struct ads1119_state *st = iio_priv(indio_dev);
337 unsigned int index = chan->address;
338 int ret;
339
340 if (index >= st->num_channels_cfg)
341 return -EINVAL;
342
343 switch (mask) {
344 case IIO_CHAN_INFO_RAW:
345 if (!iio_device_claim_direct(indio_dev))
346 return -EBUSY;
347 ret = ads1119_single_conversion(st, chan, val, false);
348 iio_device_release_direct(indio_dev);
349 return ret;
350 case IIO_CHAN_INFO_OFFSET:
351 if (!iio_device_claim_direct(indio_dev))
352 return -EBUSY;
353 ret = ads1119_single_conversion(st, chan, val, true);
354 iio_device_release_direct(indio_dev);
355 return ret;
356 case IIO_CHAN_INFO_SCALE:
357 *val = st->vref_uV / 1000;
358 *val /= st->channels_cfg[index].gain;
359 *val2 = chan->scan_type.realbits - 1;
360 return IIO_VAL_FRACTIONAL_LOG2;
361 case IIO_CHAN_INFO_SAMP_FREQ:
362 *val = st->channels_cfg[index].datarate;
363 return IIO_VAL_INT;
364 default:
365 return -EINVAL;
366 }
367 }
368
ads1119_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)369 static int ads1119_write_raw(struct iio_dev *indio_dev,
370 struct iio_chan_spec const *chan, int val,
371 int val2, long mask)
372 {
373 struct ads1119_state *st = iio_priv(indio_dev);
374 unsigned int index = chan->address;
375 int ret;
376
377 if (index >= st->num_channels_cfg)
378 return -EINVAL;
379
380 switch (mask) {
381 case IIO_CHAN_INFO_SCALE:
382 ret = MICRO / ((val * MICRO) + val2);
383 if (ret != 1 && ret != 4)
384 return -EINVAL;
385
386 st->channels_cfg[index].gain = ret;
387 return 0;
388 case IIO_CHAN_INFO_SAMP_FREQ:
389 ret = ads1119_validate_datarate(st, val);
390 if (ret < 0)
391 return ret;
392
393 st->channels_cfg[index].datarate = ret;
394 return 0;
395 default:
396 return -EINVAL;
397 }
398 }
399
ads1119_debugfs_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)400 static int ads1119_debugfs_reg_access(struct iio_dev *indio_dev,
401 unsigned int reg, unsigned int writeval,
402 unsigned int *readval)
403 {
404 struct ads1119_state *st = iio_priv(indio_dev);
405 int ret;
406
407 if (reg > ADS1119_REG_STATUS)
408 return -EINVAL;
409
410 if (readval) {
411 ret = i2c_smbus_read_byte_data(st->client,
412 ADS1119_CMD_RREG(reg));
413 if (ret < 0)
414 return ret;
415
416 *readval = ret;
417 return 0;
418 }
419
420 if (reg > ADS1119_REG_CONFIG)
421 return -EINVAL;
422
423 return i2c_smbus_write_byte_data(st->client, ADS1119_CMD_WREG,
424 writeval);
425 }
426
427 static const struct iio_info ads1119_info = {
428 .read_avail = ads1119_read_avail,
429 .read_raw = ads1119_read_raw,
430 .write_raw = ads1119_write_raw,
431 .debugfs_reg_access = ads1119_debugfs_reg_access,
432 };
433
ads1119_triggered_buffer_preenable(struct iio_dev * indio_dev)434 static int ads1119_triggered_buffer_preenable(struct iio_dev *indio_dev)
435 {
436 struct ads1119_state *st = iio_priv(indio_dev);
437 struct device *dev = &st->client->dev;
438 unsigned int index;
439 int ret;
440
441 index = find_first_bit(indio_dev->active_scan_mask,
442 iio_get_masklength(indio_dev));
443
444 ret = ads1119_set_conv_mode(st, true);
445 if (ret)
446 return ret;
447
448 ret = ads1119_configure_channel(st,
449 st->channels_cfg[index].mux,
450 st->channels_cfg[index].gain,
451 st->channels_cfg[index].datarate);
452 if (ret)
453 return ret;
454
455 ret = pm_runtime_resume_and_get(dev);
456 if (ret)
457 return ret;
458
459 return i2c_smbus_write_byte(st->client, ADS1119_CMD_START_SYNC);
460 }
461
ads1119_triggered_buffer_postdisable(struct iio_dev * indio_dev)462 static int ads1119_triggered_buffer_postdisable(struct iio_dev *indio_dev)
463 {
464 struct ads1119_state *st = iio_priv(indio_dev);
465 struct device *dev = &st->client->dev;
466 int ret;
467
468 ret = ads1119_set_conv_mode(st, false);
469 if (ret)
470 return ret;
471
472 pm_runtime_put_autosuspend(dev);
473
474 return 0;
475 }
476
477 static const struct iio_buffer_setup_ops ads1119_buffer_setup_ops = {
478 .preenable = ads1119_triggered_buffer_preenable,
479 .postdisable = ads1119_triggered_buffer_postdisable,
480 .validate_scan_mask = &iio_validate_scan_mask_onehot,
481 };
482
483 static const struct iio_trigger_ops ads1119_trigger_ops = {
484 .validate_device = &iio_trigger_validate_own_device,
485 };
486
ads1119_irq_handler(int irq,void * dev_id)487 static irqreturn_t ads1119_irq_handler(int irq, void *dev_id)
488 {
489 struct iio_dev *indio_dev = dev_id;
490 struct ads1119_state *st = iio_priv(indio_dev);
491
492 if (iio_buffer_enabled(indio_dev) && iio_trigger_using_own(indio_dev))
493 iio_trigger_poll(indio_dev->trig);
494 else
495 complete(&st->completion);
496
497 return IRQ_HANDLED;
498 }
499
ads1119_trigger_handler(int irq,void * private)500 static irqreturn_t ads1119_trigger_handler(int irq, void *private)
501 {
502 struct iio_poll_func *pf = private;
503 struct iio_dev *indio_dev = pf->indio_dev;
504 struct ads1119_state *st = iio_priv(indio_dev);
505 struct {
506 s16 sample;
507 aligned_s64 timestamp;
508 } scan = { };
509 unsigned int index;
510 int ret;
511
512 if (!iio_trigger_using_own(indio_dev)) {
513 index = find_first_bit(indio_dev->active_scan_mask,
514 iio_get_masklength(indio_dev));
515
516 ret = ads1119_poll_data_ready(st, &indio_dev->channels[index]);
517 if (ret) {
518 dev_err(&st->client->dev,
519 "Failed to poll data on trigger (%d)\n", ret);
520 goto done;
521 }
522 }
523
524 ret = i2c_smbus_read_word_swapped(st->client, ADS1119_CMD_RDATA);
525 if (ret < 0) {
526 dev_err(&st->client->dev,
527 "Failed to read data on trigger (%d)\n", ret);
528 goto done;
529 }
530
531 scan.sample = ret;
532
533 iio_push_to_buffers_with_ts(indio_dev, &scan, sizeof(scan),
534 iio_get_time_ns(indio_dev));
535 done:
536 iio_trigger_notify_done(indio_dev->trig);
537 return IRQ_HANDLED;
538 }
539
ads1119_init(struct ads1119_state * st,bool vref_external)540 static int ads1119_init(struct ads1119_state *st, bool vref_external)
541 {
542 int ret;
543
544 ret = ads1119_reset(st);
545 if (ret)
546 return ret;
547
548 if (vref_external)
549 return ads1119_upd_cfg_reg(st,
550 ADS1119_CONFIG_VREF_FIELD,
551 FIELD_PREP(ADS1119_CONFIG_VREF_FIELD,
552 ADS1119_VREF_EXTERNAL));
553 return 0;
554 }
555
ads1119_map_analog_inputs_mux(int ain_pos,int ain_neg,bool differential)556 static int ads1119_map_analog_inputs_mux(int ain_pos, int ain_neg,
557 bool differential)
558 {
559 if (ain_pos >= ADS1119_MAX_SINGLE_CHANNELS)
560 return -EINVAL;
561
562 if (!differential)
563 return ADS1119_MUX_AIN0 + ain_pos;
564
565 if (ain_pos == 0 && ain_neg == 1)
566 return ADS1119_MUX_AIN0_AIN1;
567 else if (ain_pos == 1 && ain_neg == 2)
568 return ADS1119_MUX_AIN1_AIN2;
569 else if (ain_pos == 2 && ain_neg == 3)
570 return ADS1119_MUX_AIN2_AIN3;
571
572 return -EINVAL;
573 }
574
ads1119_alloc_and_config_channels(struct iio_dev * indio_dev)575 static int ads1119_alloc_and_config_channels(struct iio_dev *indio_dev)
576 {
577 const struct iio_chan_spec ads1119_channel =
578 (const struct iio_chan_spec) {
579 .type = IIO_VOLTAGE,
580 .indexed = 1,
581 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
582 BIT(IIO_CHAN_INFO_SCALE) |
583 BIT(IIO_CHAN_INFO_OFFSET) |
584 BIT(IIO_CHAN_INFO_SAMP_FREQ),
585 .info_mask_shared_by_all_available =
586 BIT(IIO_CHAN_INFO_SCALE) |
587 BIT(IIO_CHAN_INFO_SAMP_FREQ),
588 .scan_type = {
589 .sign = 's',
590 .realbits = 16,
591 .storagebits = 16,
592 .endianness = IIO_CPU,
593 },
594 };
595 const struct iio_chan_spec ads1119_ts = IIO_CHAN_SOFT_TIMESTAMP(0);
596 struct ads1119_state *st = iio_priv(indio_dev);
597 struct iio_chan_spec *iio_channels, *chan;
598 struct device *dev = &st->client->dev;
599 unsigned int num_channels, i;
600 bool differential;
601 u32 ain[2];
602 int ret;
603
604 st->num_channels_cfg = device_get_child_node_count(dev);
605 if (st->num_channels_cfg > ADS1119_MAX_CHANNELS)
606 return dev_err_probe(dev, -EINVAL,
607 "Too many channels %d, max is %d\n",
608 st->num_channels_cfg,
609 ADS1119_MAX_CHANNELS);
610
611 st->channels_cfg = devm_kcalloc(dev, st->num_channels_cfg,
612 sizeof(*st->channels_cfg), GFP_KERNEL);
613 if (!st->channels_cfg)
614 return -ENOMEM;
615
616 /* Allocate one more iio channel for the timestamp */
617 num_channels = st->num_channels_cfg + 1;
618 iio_channels = devm_kcalloc(dev, num_channels, sizeof(*iio_channels),
619 GFP_KERNEL);
620 if (!iio_channels)
621 return -ENOMEM;
622
623 i = 0;
624
625 device_for_each_child_node_scoped(dev, child) {
626 chan = &iio_channels[i];
627
628 differential = fwnode_property_present(child, "diff-channels");
629 if (differential)
630 ret = fwnode_property_read_u32_array(child,
631 "diff-channels",
632 ain, 2);
633 else
634 ret = fwnode_property_read_u32(child, "single-channel",
635 &ain[0]);
636
637 if (ret)
638 return dev_err_probe(dev, ret,
639 "Failed to get channel property\n");
640
641 ret = ads1119_map_analog_inputs_mux(ain[0], ain[1],
642 differential);
643 if (ret < 0)
644 return dev_err_probe(dev, ret,
645 "Invalid channel value\n");
646
647 st->channels_cfg[i].mux = ret;
648 st->channels_cfg[i].gain = ADS1119_DEFAULT_GAIN;
649 st->channels_cfg[i].datarate = ADS1119_DEFAULT_DATARATE;
650
651 *chan = ads1119_channel;
652 chan->channel = ain[0];
653 chan->address = i;
654 chan->scan_index = i;
655
656 if (differential) {
657 chan->channel2 = ain[1];
658 chan->differential = 1;
659 }
660
661 dev_dbg(dev, "channel: index %d, mux %d\n", i,
662 st->channels_cfg[i].mux);
663
664 i++;
665 }
666
667 iio_channels[i] = ads1119_ts;
668 iio_channels[i].address = i;
669 iio_channels[i].scan_index = i;
670
671 indio_dev->channels = iio_channels;
672 indio_dev->num_channels = num_channels;
673
674 return 0;
675 }
676
ads1119_powerdown(void * data)677 static void ads1119_powerdown(void *data)
678 {
679 struct ads1119_state *st = data;
680
681 i2c_smbus_write_byte(st->client, ADS1119_CMD_POWERDOWN);
682 }
683
ads1119_probe(struct i2c_client * client)684 static int ads1119_probe(struct i2c_client *client)
685 {
686 struct iio_dev *indio_dev;
687 struct ads1119_state *st;
688 struct device *dev = &client->dev;
689 bool vref_external = true;
690 int ret;
691
692 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
693 if (!indio_dev)
694 return -ENOMEM;
695
696 st = iio_priv(indio_dev);
697 st->client = client;
698
699 indio_dev->name = "ads1119";
700 indio_dev->info = &ads1119_info;
701 indio_dev->modes = INDIO_DIRECT_MODE;
702
703 i2c_set_clientdata(client, indio_dev);
704
705 ret = devm_regulator_bulk_get_enable(dev,
706 ARRAY_SIZE(ads1119_power_supplies),
707 ads1119_power_supplies);
708 if (ret)
709 return dev_err_probe(dev, ret,
710 "Failed to get and enable supplies\n");
711
712 st->vref_uV = devm_regulator_get_enable_read_voltage(dev, "vref");
713 if (st->vref_uV == -ENODEV) {
714 vref_external = false;
715 st->vref_uV = ADS1119_VREF_INTERNAL_VAL;
716 } else if (st->vref_uV < 0) {
717 return dev_err_probe(dev, st->vref_uV, "Failed to get vref\n");
718 }
719
720 st->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
721 if (IS_ERR(st->reset_gpio))
722 return dev_err_probe(dev, PTR_ERR(st->reset_gpio),
723 "Failed to get reset gpio\n");
724
725 ret = ads1119_alloc_and_config_channels(indio_dev);
726 if (ret)
727 return ret;
728
729 init_completion(&st->completion);
730
731 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
732 ads1119_trigger_handler,
733 &ads1119_buffer_setup_ops);
734 if (ret)
735 return dev_err_probe(dev, ret, "Failed to setup IIO buffer\n");
736
737 if (client->irq > 0) {
738 ret = devm_request_threaded_irq(dev, client->irq,
739 ads1119_irq_handler,
740 NULL, IRQF_ONESHOT,
741 "ads1119", indio_dev);
742 if (ret)
743 return dev_err_probe(dev, ret,
744 "Failed to allocate irq\n");
745
746 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
747 indio_dev->name,
748 iio_device_id(indio_dev));
749 if (!st->trig)
750 return -ENOMEM;
751
752 st->trig->ops = &ads1119_trigger_ops;
753 iio_trigger_set_drvdata(st->trig, indio_dev);
754
755 ret = devm_iio_trigger_register(dev, st->trig);
756 if (ret)
757 return dev_err_probe(dev, ret,
758 "Failed to register IIO trigger\n");
759 }
760
761 ret = ads1119_init(st, vref_external);
762 if (ret)
763 return dev_err_probe(dev, ret,
764 "Failed to initialize device\n");
765
766 pm_runtime_set_autosuspend_delay(dev, ADS1119_SUSPEND_DELAY);
767 pm_runtime_use_autosuspend(dev);
768 pm_runtime_mark_last_busy(dev);
769 pm_runtime_set_active(dev);
770
771 ret = devm_pm_runtime_enable(dev);
772 if (ret)
773 return dev_err_probe(dev, ret, "Failed to enable pm runtime\n");
774
775 ret = devm_add_action_or_reset(dev, ads1119_powerdown, st);
776 if (ret)
777 return ret;
778
779 return devm_iio_device_register(dev, indio_dev);
780 }
781
ads1119_runtime_suspend(struct device * dev)782 static int ads1119_runtime_suspend(struct device *dev)
783 {
784 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
785 struct ads1119_state *st = iio_priv(indio_dev);
786
787 return i2c_smbus_write_byte(st->client, ADS1119_CMD_POWERDOWN);
788 }
789
790 /*
791 * The ADS1119 does not require a resume function because it automatically
792 * powers on after a reset.
793 * After a power down command, the ADS1119 can still communicate but turns off
794 * its analog parts. To resume from power down, the device will power up again
795 * upon receiving a start/sync command.
796 */
797 static DEFINE_RUNTIME_DEV_PM_OPS(ads1119_pm_ops, ads1119_runtime_suspend,
798 NULL, NULL);
799
800 static const struct of_device_id __maybe_unused ads1119_of_match[] = {
801 { .compatible = "ti,ads1119" },
802 { }
803 };
804 MODULE_DEVICE_TABLE(of, ads1119_of_match);
805
806 static const struct i2c_device_id ads1119_id[] = {
807 { "ads1119" },
808 { }
809 };
810 MODULE_DEVICE_TABLE(i2c, ads1119_id);
811
812 static struct i2c_driver ads1119_driver = {
813 .driver = {
814 .name = "ads1119",
815 .of_match_table = ads1119_of_match,
816 .pm = pm_ptr(&ads1119_pm_ops),
817 },
818 .probe = ads1119_probe,
819 .id_table = ads1119_id,
820 };
821 module_i2c_driver(ads1119_driver);
822
823 MODULE_AUTHOR("João Paulo Gonçalves <joao.goncalves@toradex.com>");
824 MODULE_DESCRIPTION("Texas Instruments ADS1119 ADC Driver");
825 MODULE_LICENSE("GPL");
826