1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4  *          monitoring
5  * Copyright (C) 2003-2010  Jean Delvare <jdelvare@suse.de>
6  *
7  * Based on the lm83 driver. The LM90 is a sensor chip made by National
8  * Semiconductor. It reports up to two temperatures (its own plus up to
9  * one external one) with a 0.125 deg resolution (1 deg for local
10  * temperature) and a 3-4 deg accuracy.
11  *
12  * This driver also supports the LM89 and LM99, two other sensor chips
13  * made by National Semiconductor. Both have an increased remote
14  * temperature measurement accuracy (1 degree), and the LM99
15  * additionally shifts remote temperatures (measured and limits) by 16
16  * degrees, which allows for higher temperatures measurement.
17  * Note that there is no way to differentiate between both chips.
18  * When device is auto-detected, the driver will assume an LM99.
19  *
20  * This driver also supports the LM86, another sensor chip made by
21  * National Semiconductor. It is exactly similar to the LM90 except it
22  * has a higher accuracy.
23  *
24  * This driver also supports the ADM1032, a sensor chip made by Analog
25  * Devices. That chip is similar to the LM90, with a few differences
26  * that are not handled by this driver. Among others, it has a higher
27  * accuracy than the LM90, much like the LM86 does.
28  *
29  * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
30  * chips made by Maxim. These chips are similar to the LM86.
31  * Note that there is no easy way to differentiate between the three
32  * variants. We use the device address to detect MAX6659, which will result
33  * in a detection as max6657 if it is on address 0x4c. The extra address
34  * and features of the MAX6659 are only supported if the chip is configured
35  * explicitly as max6659, or if its address is not 0x4c.
36  * These chips lack the remote temperature offset feature.
37  *
38  * This driver also supports the MAX6654 chip made by Maxim. This chip can be
39  * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
40  * to MAX6657/MAX6658/MAX6659, but does not support critical temperature
41  * limits. Extended range is available by setting the configuration register
42  * accordingly, and is done during initialization. Extended precision is only
43  * available at conversion rates of 1 Hz and slower. Note that extended
44  * precision is not enabled by default, as this driver initializes all chips
45  * to 2 Hz by design. The driver also supports MAX6690, which is practically
46  * identical to MAX6654.
47  *
48  * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
49  * MAX6692 chips made by Maxim.  These are again similar to the LM86,
50  * but they use unsigned temperature values and can report temperatures
51  * from 0 to 145 degrees.
52  *
53  * This driver also supports the MAX6680 and MAX6681, two other sensor
54  * chips made by Maxim. These are quite similar to the other Maxim
55  * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
56  * be treated identically.
57  *
58  * This driver also supports the MAX6695 and MAX6696, two other sensor
59  * chips made by Maxim. These are also quite similar to other Maxim
60  * chips, but support three temperature sensors instead of two. MAX6695
61  * and MAX6696 only differ in the pinout so they can be treated identically.
62  *
63  * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
64  * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
65  * and extended mode. They are mostly compatible with LM90 except for a data
66  * format difference for the temperature value registers.
67  *
68  * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices
69  * / ON Semiconductor. The chips are similar to ADT7461 but support two external
70  * temperature sensors.
71  *
72  * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor.
73  * The chips are similar to ADT7461/ADT7461A but have full PEC support
74  * (undocumented).
75  *
76  * This driver also supports the SA56004 from Philips. This device is
77  * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
78  *
79  * This driver also supports the G781 from GMT. This device is compatible
80  * with the ADM1032.
81  *
82  * This driver also supports TMP451 and TMP461 from Texas Instruments.
83  * Those devices are supported in both compatibility and extended mode.
84  * They are mostly compatible with ADT7461 except for local temperature
85  * low byte register and max conversion rate.
86  *
87  * This driver also supports MAX1617 and various clones such as G767
88  * and NE1617. Such clones will be detected as MAX1617.
89  *
90  * This driver also supports NE1618 from Philips. It is similar to NE1617
91  * but supports 11 bit external temperature values.
92  *
93  * This driver also supports NCT7716, NCT7717 and NCT7718 from Nuvoton.
94  * The NCT7716 is similar to NCT7717 but has one more address support.
95  *
96  * Since the LM90 was the first chipset supported by this driver, most
97  * comments will refer to this chipset, but are actually general and
98  * concern all supported chipsets, unless mentioned otherwise.
99  */
100 
101 #include <linux/bits.h>
102 #include <linux/device.h>
103 #include <linux/err.h>
104 #include <linux/i2c.h>
105 #include <linux/init.h>
106 #include <linux/interrupt.h>
107 #include <linux/jiffies.h>
108 #include <linux/hwmon.h>
109 #include <linux/kstrtox.h>
110 #include <linux/module.h>
111 #include <linux/mutex.h>
112 #include <linux/of.h>
113 #include <linux/regulator/consumer.h>
114 #include <linux/slab.h>
115 #include <linux/workqueue.h>
116 
117 /* The maximum number of channels currently supported */
118 #define MAX_CHANNELS	3
119 
120 /*
121  * Addresses to scan
122  * Address is fully defined internally and cannot be changed except for
123  * MAX6659, MAX6680 and MAX6681.
124  * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
125  * MAX6657, MAX6658, NCT1008, NCT7718 and W83L771 have address 0x4c.
126  * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
127  * have address 0x4d.
128  * MAX6647 has address 0x4e.
129  * MAX6659 can have address 0x4c, 0x4d or 0x4e.
130  * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
131  * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
132  * NCT7716 can have address 0x48 or 0x49.
133  * NCT7717 has address 0x48.
134  * SA56004 can have address 0x48 through 0x4F.
135  */
136 
137 static const unsigned short normal_i2c[] = {
138 	0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
139 	0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
140 
141 enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481,
142 	g781, lm84, lm90, lm99,
143 	max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696,
144 	nct210, nct72, nct7716, nct7717, nct7718, ne1618, sa56004, tmp451, tmp461, w83l771,
145 };
146 
147 /*
148  * The LM90 registers
149  */
150 
151 #define LM90_REG_MAN_ID			0xFE
152 #define LM90_REG_CHIP_ID		0xFF
153 #define LM90_REG_CONFIG1		0x03
154 #define LM90_REG_CONFIG2		0xBF
155 #define LM90_REG_CONVRATE		0x04
156 #define LM90_REG_STATUS			0x02
157 #define LM90_REG_LOCAL_TEMP		0x00
158 #define LM90_REG_LOCAL_HIGH		0x05
159 #define LM90_REG_LOCAL_LOW		0x06
160 #define LM90_REG_LOCAL_CRIT		0x20
161 #define LM90_REG_REMOTE_TEMPH		0x01
162 #define LM90_REG_REMOTE_TEMPL		0x10
163 #define LM90_REG_REMOTE_OFFSH		0x11
164 #define LM90_REG_REMOTE_OFFSL		0x12
165 #define LM90_REG_REMOTE_HIGHH		0x07
166 #define LM90_REG_REMOTE_HIGHL		0x13
167 #define LM90_REG_REMOTE_LOWH		0x08
168 #define LM90_REG_REMOTE_LOWL		0x14
169 #define LM90_REG_REMOTE_CRIT		0x19
170 #define LM90_REG_TCRIT_HYST		0x21
171 
172 /* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
173 
174 #define MAX6657_REG_LOCAL_TEMPL		0x11
175 #define MAX6696_REG_STATUS2		0x12
176 #define MAX6659_REG_REMOTE_EMERG	0x16
177 #define MAX6659_REG_LOCAL_EMERG		0x17
178 
179 /*  SA56004 registers */
180 
181 #define SA56004_REG_LOCAL_TEMPL		0x22
182 
183 #define LM90_MAX_CONVRATE_MS	16000	/* Maximum conversion rate in ms */
184 
185 /* TMP451/TMP461 registers */
186 #define TMP451_REG_LOCAL_TEMPL		0x15
187 #define TMP451_REG_CONALERT		0x22
188 
189 #define TMP461_REG_CHEN			0x16
190 #define TMP461_REG_DFC			0x24
191 
192 /* ADT7481 registers */
193 #define ADT7481_REG_STATUS2		0x23
194 #define ADT7481_REG_CONFIG2		0x24
195 
196 #define ADT7481_REG_MAN_ID		0x3e
197 #define ADT7481_REG_CHIP_ID		0x3d
198 
199 /* NCT7716/7717/7718 registers */
200 #define NCT7716_REG_CHIP_ID		0xFD
201 
202 /* Device features */
203 #define LM90_HAVE_EXTENDED_TEMP	BIT(0)	/* extended temperature support	*/
204 #define LM90_HAVE_OFFSET	BIT(1)	/* temperature offset register	*/
205 #define LM90_HAVE_UNSIGNED_TEMP	BIT(2)	/* temperatures are unsigned	*/
206 #define LM90_HAVE_REM_LIMIT_EXT	BIT(3)	/* extended remote limit	*/
207 #define LM90_HAVE_EMERGENCY	BIT(4)	/* 3rd upper (emergency) limit	*/
208 #define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm		*/
209 #define LM90_HAVE_TEMP3		BIT(6)	/* 3rd temperature sensor	*/
210 #define LM90_HAVE_BROKEN_ALERT	BIT(7)	/* Broken alert			*/
211 #define LM90_PAUSE_FOR_CONFIG	BIT(8)	/* Pause conversion for config	*/
212 #define LM90_HAVE_CRIT		BIT(9)	/* Chip supports CRIT/OVERT register	*/
213 #define LM90_HAVE_CRIT_ALRM_SWP	BIT(10)	/* critical alarm bits swapped	*/
214 #define LM90_HAVE_PEC		BIT(11)	/* Chip supports PEC		*/
215 #define LM90_HAVE_PARTIAL_PEC	BIT(12)	/* Partial PEC support (adm1032)*/
216 #define LM90_HAVE_ALARMS	BIT(13)	/* Create 'alarms' attribute	*/
217 #define LM90_HAVE_EXT_UNSIGNED	BIT(14)	/* extended unsigned temperature*/
218 #define LM90_HAVE_LOW		BIT(15)	/* low limits			*/
219 #define LM90_HAVE_CONVRATE	BIT(16)	/* conversion rate		*/
220 #define LM90_HAVE_REMOTE_EXT	BIT(17)	/* extended remote temperature	*/
221 #define LM90_HAVE_FAULTQUEUE	BIT(18)	/* configurable samples count	*/
222 
223 /* LM90 status */
224 #define LM90_STATUS_LTHRM	BIT(0)	/* local THERM limit tripped */
225 #define LM90_STATUS_RTHRM	BIT(1)	/* remote THERM limit tripped */
226 #define LM90_STATUS_ROPEN	BIT(2)	/* remote is an open circuit */
227 #define LM90_STATUS_RLOW	BIT(3)	/* remote low temp limit tripped */
228 #define LM90_STATUS_RHIGH	BIT(4)	/* remote high temp limit tripped */
229 #define LM90_STATUS_LLOW	BIT(5)	/* local low temp limit tripped */
230 #define LM90_STATUS_LHIGH	BIT(6)	/* local high temp limit tripped */
231 #define LM90_STATUS_BUSY	BIT(7)	/* conversion is ongoing */
232 
233 /* MAX6695/6696 and ADT7481 2nd status register */
234 #define MAX6696_STATUS2_R2THRM	BIT(1)	/* remote2 THERM limit tripped */
235 #define MAX6696_STATUS2_R2OPEN	BIT(2)	/* remote2 is an open circuit */
236 #define MAX6696_STATUS2_R2LOW	BIT(3)	/* remote2 low temp limit tripped */
237 #define MAX6696_STATUS2_R2HIGH	BIT(4)	/* remote2 high temp limit tripped */
238 #define MAX6696_STATUS2_ROT2	BIT(5)	/* remote emergency limit tripped */
239 #define MAX6696_STATUS2_R2OT2	BIT(6)	/* remote2 emergency limit tripped */
240 #define MAX6696_STATUS2_LOT2	BIT(7)	/* local emergency limit tripped */
241 
242 /*
243  * Driver data (common to all clients)
244  */
245 
246 static const struct i2c_device_id lm90_id[] = {
247 	{ "adm1020", max1617 },
248 	{ "adm1021", max1617 },
249 	{ "adm1023", adm1023 },
250 	{ "adm1032", adm1032 },
251 	{ "adt7421", adt7461a },
252 	{ "adt7461", adt7461 },
253 	{ "adt7461a", adt7461a },
254 	{ "adt7481", adt7481 },
255 	{ "adt7482", adt7481 },
256 	{ "adt7483a", adt7481 },
257 	{ "g781", g781 },
258 	{ "gl523sm", max1617 },
259 	{ "lm84", lm84 },
260 	{ "lm86", lm90 },
261 	{ "lm89", lm90 },
262 	{ "lm90", lm90 },
263 	{ "lm99", lm99 },
264 	{ "max1617", max1617 },
265 	{ "max6642", max6642 },
266 	{ "max6646", max6646 },
267 	{ "max6647", max6646 },
268 	{ "max6648", max6648 },
269 	{ "max6649", max6646 },
270 	{ "max6654", max6654 },
271 	{ "max6657", max6657 },
272 	{ "max6658", max6657 },
273 	{ "max6659", max6659 },
274 	{ "max6680", max6680 },
275 	{ "max6681", max6680 },
276 	{ "max6690", max6654 },
277 	{ "max6692", max6648 },
278 	{ "max6695", max6696 },
279 	{ "max6696", max6696 },
280 	{ "mc1066", max1617 },
281 	{ "nct1008", adt7461a },
282 	{ "nct210", nct210 },
283 	{ "nct214", nct72 },
284 	{ "nct218", nct72 },
285 	{ "nct72", nct72 },
286 	{ "nct7716", nct7716 },
287 	{ "nct7717", nct7717 },
288 	{ "nct7718", nct7718 },
289 	{ "ne1618", ne1618 },
290 	{ "w83l771", w83l771 },
291 	{ "sa56004", sa56004 },
292 	{ "thmc10", max1617 },
293 	{ "tmp451", tmp451 },
294 	{ "tmp461", tmp461 },
295 	{ }
296 };
297 MODULE_DEVICE_TABLE(i2c, lm90_id);
298 
299 static const struct of_device_id __maybe_unused lm90_of_match[] = {
300 	{
301 		.compatible = "adi,adm1032",
302 		.data = (void *)adm1032
303 	},
304 	{
305 		.compatible = "adi,adt7461",
306 		.data = (void *)adt7461
307 	},
308 	{
309 		.compatible = "adi,adt7461a",
310 		.data = (void *)adt7461a
311 	},
312 	{
313 		.compatible = "adi,adt7481",
314 		.data = (void *)adt7481
315 	},
316 	{
317 		.compatible = "gmt,g781",
318 		.data = (void *)g781
319 	},
320 	{
321 		.compatible = "national,lm90",
322 		.data = (void *)lm90
323 	},
324 	{
325 		.compatible = "national,lm86",
326 		.data = (void *)lm90
327 	},
328 	{
329 		.compatible = "national,lm89",
330 		.data = (void *)lm90
331 	},
332 	{
333 		.compatible = "national,lm99",
334 		.data = (void *)lm99
335 	},
336 	{
337 		.compatible = "dallas,max6646",
338 		.data = (void *)max6646
339 	},
340 	{
341 		.compatible = "dallas,max6647",
342 		.data = (void *)max6646
343 	},
344 	{
345 		.compatible = "dallas,max6649",
346 		.data = (void *)max6646
347 	},
348 	{
349 		.compatible = "dallas,max6654",
350 		.data = (void *)max6654
351 	},
352 	{
353 		.compatible = "dallas,max6657",
354 		.data = (void *)max6657
355 	},
356 	{
357 		.compatible = "dallas,max6658",
358 		.data = (void *)max6657
359 	},
360 	{
361 		.compatible = "dallas,max6659",
362 		.data = (void *)max6659
363 	},
364 	{
365 		.compatible = "dallas,max6680",
366 		.data = (void *)max6680
367 	},
368 	{
369 		.compatible = "dallas,max6681",
370 		.data = (void *)max6680
371 	},
372 	{
373 		.compatible = "dallas,max6695",
374 		.data = (void *)max6696
375 	},
376 	{
377 		.compatible = "dallas,max6696",
378 		.data = (void *)max6696
379 	},
380 	{
381 		.compatible = "onnn,nct1008",
382 		.data = (void *)adt7461a
383 	},
384 	{
385 		.compatible = "onnn,nct214",
386 		.data = (void *)nct72
387 	},
388 	{
389 		.compatible = "onnn,nct218",
390 		.data = (void *)nct72
391 	},
392 	{
393 		.compatible = "onnn,nct72",
394 		.data = (void *)nct72
395 	},
396 	{
397 		.compatible = "nuvoton,nct7716",
398 		.data = (void *)nct7716
399 	},
400 	{
401 		.compatible = "nuvoton,nct7717",
402 		.data = (void *)nct7717
403 	},
404 	{
405 		.compatible = "nuvoton,nct7718",
406 		.data = (void *)nct7718
407 	},
408 	{
409 		.compatible = "winbond,w83l771",
410 		.data = (void *)w83l771
411 	},
412 	{
413 		.compatible = "nxp,sa56004",
414 		.data = (void *)sa56004
415 	},
416 	{
417 		.compatible = "ti,tmp451",
418 		.data = (void *)tmp451
419 	},
420 	{
421 		.compatible = "ti,tmp461",
422 		.data = (void *)tmp461
423 	},
424 	{ },
425 };
426 MODULE_DEVICE_TABLE(of, lm90_of_match);
427 
428 /*
429  * chip type specific parameters
430  */
431 struct lm90_params {
432 	u32 flags;		/* Capabilities */
433 	u16 alert_alarms;	/* Which alarm bits trigger ALERT# */
434 				/* Upper 8 bits for max6695/96 */
435 	u8 max_convrate;	/* Maximum conversion rate register value */
436 	u8 resolution;		/* 16-bit resolution (default 11 bit) */
437 	u8 reg_status2;		/* 2nd status register (optional) */
438 	u8 reg_local_ext;	/* Extended local temp register (optional) */
439 	u8 faultqueue_mask;	/* fault queue bit mask */
440 	u8 faultqueue_depth;	/* fault queue depth if mask is used */
441 };
442 
443 static const struct lm90_params lm90_params[] = {
444 	[adm1023] = {
445 		.flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT
446 		  | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
447 		  | LM90_HAVE_REMOTE_EXT,
448 		.alert_alarms = 0x7c,
449 		.resolution = 8,
450 		.max_convrate = 7,
451 	},
452 	[adm1032] = {
453 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
454 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
455 		  | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS
456 		  | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
457 		  | LM90_HAVE_FAULTQUEUE,
458 		.alert_alarms = 0x7c,
459 		.max_convrate = 10,
460 	},
461 	[adt7461] = {
462 		/*
463 		 * Standard temperature range is supposed to be unsigned,
464 		 * but that does not match reality. Negative temperatures
465 		 * are always reported.
466 		 */
467 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
468 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
469 		  | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC
470 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
471 		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
472 		.alert_alarms = 0x7c,
473 		.max_convrate = 10,
474 		.resolution = 10,
475 	},
476 	[adt7461a] = {
477 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
478 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
479 		  | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS
480 		  | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
481 		  | LM90_HAVE_FAULTQUEUE,
482 		.alert_alarms = 0x7c,
483 		.max_convrate = 10,
484 	},
485 	[adt7481] = {
486 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
487 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
488 		  | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC
489 		  | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW
490 		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
491 		  | LM90_HAVE_FAULTQUEUE,
492 		.alert_alarms = 0x1c7c,
493 		.max_convrate = 11,
494 		.resolution = 10,
495 		.reg_status2 = ADT7481_REG_STATUS2,
496 	},
497 	[g781] = {
498 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
499 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
500 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
501 		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
502 		.alert_alarms = 0x7c,
503 		.max_convrate = 7,
504 	},
505 	[lm84] = {
506 		.flags = LM90_HAVE_ALARMS,
507 		.resolution = 8,
508 	},
509 	[lm90] = {
510 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
511 		  | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
512 		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
513 		  | LM90_HAVE_FAULTQUEUE,
514 		.alert_alarms = 0x7b,
515 		.max_convrate = 9,
516 		.faultqueue_mask = BIT(0),
517 		.faultqueue_depth = 3,
518 	},
519 	[lm99] = {
520 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
521 		  | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
522 		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
523 		  | LM90_HAVE_FAULTQUEUE,
524 		.alert_alarms = 0x7b,
525 		.max_convrate = 9,
526 		.faultqueue_mask = BIT(0),
527 		.faultqueue_depth = 3,
528 	},
529 	[max1617] = {
530 		.flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT |
531 		  LM90_HAVE_LOW | LM90_HAVE_ALARMS,
532 		.alert_alarms = 0x78,
533 		.resolution = 8,
534 		.max_convrate = 7,
535 	},
536 	[max6642] = {
537 		.flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED
538 		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
539 		.alert_alarms = 0x50,
540 		.resolution = 10,
541 		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
542 		.faultqueue_mask = BIT(4),
543 		.faultqueue_depth = 2,
544 	},
545 	[max6646] = {
546 		.flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT
547 		  | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW
548 		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
549 		.alert_alarms = 0x7c,
550 		.max_convrate = 6,
551 		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
552 	},
553 	[max6648] = {
554 		.flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT
555 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW
556 		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
557 		.alert_alarms = 0x7c,
558 		.max_convrate = 6,
559 		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
560 	},
561 	[max6654] = {
562 		.flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
563 		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
564 		.alert_alarms = 0x7c,
565 		.max_convrate = 7,
566 		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
567 	},
568 	[max6657] = {
569 		.flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT
570 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
571 		  | LM90_HAVE_REMOTE_EXT,
572 		.alert_alarms = 0x7c,
573 		.max_convrate = 8,
574 		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
575 	},
576 	[max6659] = {
577 		.flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT
578 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
579 		  | LM90_HAVE_REMOTE_EXT,
580 		.alert_alarms = 0x7c,
581 		.max_convrate = 8,
582 		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
583 	},
584 	[max6680] = {
585 		/*
586 		 * Apparent temperatures of 128 degrees C or higher are reported
587 		 * and treated as negative temperatures (meaning min_alarm will
588 		 * be set).
589 		 */
590 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
591 		  | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT
592 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
593 		  | LM90_HAVE_REMOTE_EXT,
594 		.alert_alarms = 0x7c,
595 		.max_convrate = 7,
596 	},
597 	[max6696] = {
598 		.flags = LM90_HAVE_EMERGENCY
599 		  | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT
600 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
601 		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
602 		.alert_alarms = 0x1c7c,
603 		.max_convrate = 6,
604 		.reg_status2 = MAX6696_REG_STATUS2,
605 		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
606 		.faultqueue_mask = BIT(5),
607 		.faultqueue_depth = 4,
608 	},
609 	[nct72] = {
610 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
611 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
612 		  | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP
613 		  | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
614 		  | LM90_HAVE_FAULTQUEUE,
615 		.alert_alarms = 0x7c,
616 		.max_convrate = 10,
617 		.resolution = 10,
618 	},
619 	[nct210] = {
620 		.flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT
621 		  | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
622 		  | LM90_HAVE_REMOTE_EXT,
623 		.alert_alarms = 0x7c,
624 		.resolution = 11,
625 		.max_convrate = 7,
626 	},
627 	[nct7716] = {
628 		.flags = LM90_HAVE_ALARMS | LM90_HAVE_CONVRATE,
629 		.alert_alarms = 0x40,
630 		.resolution = 8,
631 		.max_convrate = 8,
632 	},
633 	[nct7717] = {
634 		.flags = LM90_HAVE_ALARMS | LM90_HAVE_CONVRATE,
635 		.alert_alarms = 0x40,
636 		.resolution = 8,
637 		.max_convrate = 8,
638 	},
639 	[nct7718] = {
640 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
641 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
642 		  | LM90_HAVE_REMOTE_EXT,
643 		.alert_alarms = 0x7c,
644 		.resolution = 11,
645 		.max_convrate = 8,
646 	},
647 	[ne1618] = {
648 		.flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT
649 		  | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
650 		.alert_alarms = 0x7c,
651 		.resolution = 11,
652 		.max_convrate = 7,
653 	},
654 	[w83l771] = {
655 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
656 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
657 		  | LM90_HAVE_REMOTE_EXT,
658 		.alert_alarms = 0x7c,
659 		.max_convrate = 8,
660 	},
661 	[sa56004] = {
662 		/*
663 		 * Apparent temperatures of 128 degrees C or higher are reported
664 		 * and treated as negative temperatures (meaning min_alarm will
665 		 * be set).
666 		 */
667 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
668 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
669 		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
670 		.alert_alarms = 0x7b,
671 		.max_convrate = 9,
672 		.reg_local_ext = SA56004_REG_LOCAL_TEMPL,
673 		.faultqueue_mask = BIT(0),
674 		.faultqueue_depth = 3,
675 	},
676 	[tmp451] = {
677 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
678 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
679 		  | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW
680 		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
681 		.alert_alarms = 0x7c,
682 		.max_convrate = 9,
683 		.resolution = 12,
684 		.reg_local_ext = TMP451_REG_LOCAL_TEMPL,
685 	},
686 	[tmp461] = {
687 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
688 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
689 		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
690 		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
691 		.alert_alarms = 0x7c,
692 		.max_convrate = 9,
693 		.resolution = 12,
694 		.reg_local_ext = TMP451_REG_LOCAL_TEMPL,
695 	},
696 };
697 
698 /*
699  * temperature register index
700  */
701 enum lm90_temp_reg_index {
702 	LOCAL_LOW = 0,
703 	LOCAL_HIGH,
704 	LOCAL_CRIT,
705 	REMOTE_CRIT,
706 	LOCAL_EMERG,	/* max6659 and max6695/96 */
707 	REMOTE_EMERG,	/* max6659 and max6695/96 */
708 	REMOTE2_CRIT,	/* max6695/96 only */
709 	REMOTE2_EMERG,	/* max6695/96 only */
710 
711 	REMOTE_TEMP,
712 	REMOTE_LOW,
713 	REMOTE_HIGH,
714 	REMOTE_OFFSET,	/* except max6646, max6657/58/59, and max6695/96 */
715 	LOCAL_TEMP,
716 	REMOTE2_TEMP,	/* max6695/96 only */
717 	REMOTE2_LOW,	/* max6695/96 only */
718 	REMOTE2_HIGH,	/* max6695/96 only */
719 	REMOTE2_OFFSET,
720 
721 	TEMP_REG_NUM
722 };
723 
724 /*
725  * Client data (each client gets its own)
726  */
727 
728 struct lm90_data {
729 	struct i2c_client *client;
730 	struct device *hwmon_dev;
731 	u32 chip_config[2];
732 	u32 channel_config[MAX_CHANNELS + 1];
733 	const char *channel_label[MAX_CHANNELS];
734 	struct hwmon_channel_info chip_info;
735 	struct hwmon_channel_info temp_info;
736 	const struct hwmon_channel_info *info[3];
737 	struct hwmon_chip_info chip;
738 	struct mutex update_lock;
739 	struct delayed_work alert_work;
740 	struct work_struct report_work;
741 	bool valid;		/* true if register values are valid */
742 	bool alarms_valid;	/* true if status register values are valid */
743 	unsigned long last_updated; /* in jiffies */
744 	unsigned long alarms_updated; /* in jiffies */
745 	int kind;
746 	u32 flags;
747 
748 	unsigned int update_interval; /* in milliseconds */
749 
750 	u8 config;		/* Current configuration register value */
751 	u8 config_orig;		/* Original configuration register value */
752 	u8 convrate_orig;	/* Original conversion rate register value */
753 	u8 resolution;		/* temperature resolution in bit */
754 	u16 alert_alarms;	/* Which alarm bits trigger ALERT# */
755 				/* Upper 8 bits for max6695/96 */
756 	u8 max_convrate;	/* Maximum conversion rate */
757 	u8 reg_status2;		/* 2nd status register (optional) */
758 	u8 reg_local_ext;	/* local extension register offset */
759 	u8 reg_remote_ext;	/* remote temperature low byte */
760 	u8 faultqueue_mask;	/* fault queue mask */
761 	u8 faultqueue_depth;	/* fault queue mask */
762 
763 	/* registers values */
764 	u16 temp[TEMP_REG_NUM];
765 	u8 temp_hyst;
766 	u8 conalert;
767 	u16 reported_alarms;	/* alarms reported as sysfs/udev events */
768 	u16 current_alarms;	/* current alarms, reported by chip */
769 	u16 alarms;		/* alarms not yet reported to user */
770 };
771 
772 /*
773  * Support functions
774  */
775 
776 /*
777  * If the chip supports PEC but not on write byte transactions, we need
778  * to explicitly ask for a transaction without PEC.
779  */
lm90_write_no_pec(struct i2c_client * client,u8 value)780 static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value)
781 {
782 	return i2c_smbus_xfer(client->adapter, client->addr,
783 			      client->flags & ~I2C_CLIENT_PEC,
784 			      I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
785 }
786 
787 /*
788  * It is assumed that client->update_lock is held (unless we are in
789  * detection or initialization steps). This matters when PEC is enabled
790  * for chips with partial PEC support, because we don't want the address
791  * pointer to change between the write byte and the read byte transactions.
792  */
lm90_read_reg(struct i2c_client * client,u8 reg)793 static int lm90_read_reg(struct i2c_client *client, u8 reg)
794 {
795 	struct lm90_data *data = i2c_get_clientdata(client);
796 	bool partial_pec = (client->flags & I2C_CLIENT_PEC) &&
797 			(data->flags & LM90_HAVE_PARTIAL_PEC);
798 	int err;
799 
800 	if (partial_pec) {
801 		err = lm90_write_no_pec(client, reg);
802 		if (err)
803 			return err;
804 		return i2c_smbus_read_byte(client);
805 	}
806 	return i2c_smbus_read_byte_data(client, reg);
807 }
808 
809 /*
810  * Return register write address
811  *
812  * The write address for registers 0x03 .. 0x08 is the read address plus 6.
813  * For other registers the write address matches the read address.
814  */
lm90_write_reg_addr(u8 reg)815 static u8 lm90_write_reg_addr(u8 reg)
816 {
817 	if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH)
818 		return reg + 6;
819 	return reg;
820 }
821 
822 /*
823  * Write into LM90 register.
824  * Convert register address to write address if needed, then execute the
825  * operation.
826  */
lm90_write_reg(struct i2c_client * client,u8 reg,u8 val)827 static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val)
828 {
829 	return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val);
830 }
831 
832 /*
833  * Write into 16-bit LM90 register.
834  * Convert register addresses to write address if needed, then execute the
835  * operation.
836  */
lm90_write16(struct i2c_client * client,u8 regh,u8 regl,u16 val)837 static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val)
838 {
839 	int ret;
840 
841 	ret = lm90_write_reg(client, regh, val >> 8);
842 	if (ret < 0 || !regl)
843 		return ret;
844 	return lm90_write_reg(client, regl, val & 0xff);
845 }
846 
lm90_read16(struct i2c_client * client,u8 regh,u8 regl,bool is_volatile)847 static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl,
848 		       bool is_volatile)
849 {
850 	int oldh, newh, l;
851 
852 	oldh = lm90_read_reg(client, regh);
853 	if (oldh < 0)
854 		return oldh;
855 
856 	if (!regl)
857 		return oldh << 8;
858 
859 	l = lm90_read_reg(client, regl);
860 	if (l < 0)
861 		return l;
862 
863 	if (!is_volatile)
864 		return (oldh << 8) | l;
865 
866 	/*
867 	 * For volatile registers we have to use a trick.
868 	 * We have to read two registers to have the sensor temperature,
869 	 * but we have to beware a conversion could occur between the
870 	 * readings. The datasheet says we should either use
871 	 * the one-shot conversion register, which we don't want to do
872 	 * (disables hardware monitoring) or monitor the busy bit, which is
873 	 * impossible (we can't read the values and monitor that bit at the
874 	 * exact same time). So the solution used here is to read the high
875 	 * the high byte again. If the new high byte matches the old one,
876 	 * then we have a valid reading. Otherwise we have to read the low
877 	 * byte again, and now we believe we have a correct reading.
878 	 */
879 	newh = lm90_read_reg(client, regh);
880 	if (newh < 0)
881 		return newh;
882 	if (oldh != newh) {
883 		l = lm90_read_reg(client, regl);
884 		if (l < 0)
885 			return l;
886 	}
887 	return (newh << 8) | l;
888 }
889 
lm90_update_confreg(struct lm90_data * data,u8 config)890 static int lm90_update_confreg(struct lm90_data *data, u8 config)
891 {
892 	if (data->config != config) {
893 		int err;
894 
895 		err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config);
896 		if (err)
897 			return err;
898 		data->config = config;
899 	}
900 	return 0;
901 }
902 
903 /*
904  * client->update_lock must be held when calling this function (unless we are
905  * in detection or initialization steps), and while a remote channel other
906  * than channel 0 is selected. Also, calling code must make sure to re-select
907  * external channel 0 before releasing the lock. This is necessary because
908  * various registers have different meanings as a result of selecting a
909  * non-default remote channel.
910  */
lm90_select_remote_channel(struct lm90_data * data,bool second)911 static int lm90_select_remote_channel(struct lm90_data *data, bool second)
912 {
913 	u8 config = data->config & ~0x08;
914 
915 	if (second)
916 		config |= 0x08;
917 
918 	return lm90_update_confreg(data, config);
919 }
920 
lm90_write_convrate(struct lm90_data * data,int val)921 static int lm90_write_convrate(struct lm90_data *data, int val)
922 {
923 	u8 config = data->config;
924 	int err;
925 
926 	/* Save config and pause conversion */
927 	if (data->flags & LM90_PAUSE_FOR_CONFIG) {
928 		err = lm90_update_confreg(data, config | 0x40);
929 		if (err < 0)
930 			return err;
931 	}
932 
933 	/* Set conv rate */
934 	err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val);
935 
936 	/* Revert change to config */
937 	lm90_update_confreg(data, config);
938 
939 	return err;
940 }
941 
942 /*
943  * Set conversion rate.
944  * client->update_lock must be held when calling this function (unless we are
945  * in detection or initialization steps).
946  */
lm90_set_convrate(struct i2c_client * client,struct lm90_data * data,unsigned int interval)947 static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
948 			     unsigned int interval)
949 {
950 	unsigned int update_interval;
951 	int i, err;
952 
953 	/* Shift calculations to avoid rounding errors */
954 	interval <<= 6;
955 
956 	/* find the nearest update rate */
957 	for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
958 	     i < data->max_convrate; i++, update_interval >>= 1)
959 		if (interval >= update_interval * 3 / 4)
960 			break;
961 
962 	err = lm90_write_convrate(data, i);
963 	data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
964 	return err;
965 }
966 
lm90_set_faultqueue(struct i2c_client * client,struct lm90_data * data,int val)967 static int lm90_set_faultqueue(struct i2c_client *client,
968 			       struct lm90_data *data, int val)
969 {
970 	int err;
971 
972 	if (data->faultqueue_mask) {
973 		err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ?
974 					  data->config & ~data->faultqueue_mask :
975 					  data->config | data->faultqueue_mask);
976 	} else {
977 		static const u8 values[4] = {0, 2, 6, 0x0e};
978 
979 		data->conalert = (data->conalert & 0xf1) | values[val - 1];
980 		err = lm90_write_reg(data->client, TMP451_REG_CONALERT,
981 				     data->conalert);
982 	}
983 
984 	return err;
985 }
986 
lm90_update_limits(struct device * dev)987 static int lm90_update_limits(struct device *dev)
988 {
989 	struct lm90_data *data = dev_get_drvdata(dev);
990 	struct i2c_client *client = data->client;
991 	int val;
992 
993 	if (data->flags & LM90_HAVE_CRIT) {
994 		val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT);
995 		if (val < 0)
996 			return val;
997 		data->temp[LOCAL_CRIT] = val << 8;
998 
999 		val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
1000 		if (val < 0)
1001 			return val;
1002 		data->temp[REMOTE_CRIT] = val << 8;
1003 
1004 		val = lm90_read_reg(client, LM90_REG_TCRIT_HYST);
1005 		if (val < 0)
1006 			return val;
1007 		data->temp_hyst = val;
1008 	}
1009 	if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) {
1010 		val = lm90_read_reg(client, TMP451_REG_CONALERT);
1011 		if (val < 0)
1012 			return val;
1013 		data->conalert = val;
1014 	}
1015 
1016 	val = lm90_read16(client, LM90_REG_REMOTE_LOWH,
1017 			  (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0,
1018 			  false);
1019 	if (val < 0)
1020 		return val;
1021 	data->temp[REMOTE_LOW] = val;
1022 
1023 	val = lm90_read16(client, LM90_REG_REMOTE_HIGHH,
1024 			  (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0,
1025 			  false);
1026 	if (val < 0)
1027 		return val;
1028 	data->temp[REMOTE_HIGH] = val;
1029 
1030 	if (data->flags & LM90_HAVE_OFFSET) {
1031 		val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
1032 				  LM90_REG_REMOTE_OFFSL, false);
1033 		if (val < 0)
1034 			return val;
1035 		data->temp[REMOTE_OFFSET] = val;
1036 	}
1037 
1038 	if (data->flags & LM90_HAVE_EMERGENCY) {
1039 		val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG);
1040 		if (val < 0)
1041 			return val;
1042 		data->temp[LOCAL_EMERG] = val << 8;
1043 
1044 		val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1045 		if (val < 0)
1046 			return val;
1047 		data->temp[REMOTE_EMERG] = val << 8;
1048 	}
1049 
1050 	if (data->flags & LM90_HAVE_TEMP3) {
1051 		val = lm90_select_remote_channel(data, true);
1052 		if (val < 0)
1053 			return val;
1054 
1055 		val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
1056 		if (val < 0)
1057 			return val;
1058 		data->temp[REMOTE2_CRIT] = val << 8;
1059 
1060 		if (data->flags & LM90_HAVE_EMERGENCY) {
1061 			val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1062 			if (val < 0)
1063 				return val;
1064 			data->temp[REMOTE2_EMERG] = val << 8;
1065 		}
1066 
1067 		val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH);
1068 		if (val < 0)
1069 			return val;
1070 		data->temp[REMOTE2_LOW] = val << 8;
1071 
1072 		val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH);
1073 		if (val < 0)
1074 			return val;
1075 		data->temp[REMOTE2_HIGH] = val << 8;
1076 
1077 		if (data->flags & LM90_HAVE_OFFSET) {
1078 			val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
1079 					  LM90_REG_REMOTE_OFFSL, false);
1080 			if (val < 0)
1081 				return val;
1082 			data->temp[REMOTE2_OFFSET] = val;
1083 		}
1084 
1085 		lm90_select_remote_channel(data, false);
1086 	}
1087 
1088 	return 0;
1089 }
1090 
lm90_report_alarms(struct work_struct * work)1091 static void lm90_report_alarms(struct work_struct *work)
1092 {
1093 	struct lm90_data *data = container_of(work, struct lm90_data, report_work);
1094 	u16 cleared_alarms, new_alarms, current_alarms;
1095 	struct device *hwmon_dev = data->hwmon_dev;
1096 	struct device *dev = &data->client->dev;
1097 	int st, st2;
1098 
1099 	current_alarms = data->current_alarms;
1100 	cleared_alarms = data->reported_alarms & ~current_alarms;
1101 	new_alarms = current_alarms & ~data->reported_alarms;
1102 
1103 	if (!cleared_alarms && !new_alarms)
1104 		return;
1105 
1106 	st = new_alarms & 0xff;
1107 	st2 = new_alarms >> 8;
1108 
1109 	if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1110 	    (st2 & MAX6696_STATUS2_LOT2))
1111 		dev_dbg(dev, "temp%d out of range, please check!\n", 1);
1112 	if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1113 	    (st2 & MAX6696_STATUS2_ROT2))
1114 		dev_dbg(dev, "temp%d out of range, please check!\n", 2);
1115 	if (st & LM90_STATUS_ROPEN)
1116 		dev_dbg(dev, "temp%d diode open, please check!\n", 2);
1117 	if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1118 		   MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1119 		dev_dbg(dev, "temp%d out of range, please check!\n", 3);
1120 	if (st2 & MAX6696_STATUS2_R2OPEN)
1121 		dev_dbg(dev, "temp%d diode open, please check!\n", 3);
1122 
1123 	st |= cleared_alarms & 0xff;
1124 	st2 |= cleared_alarms >> 8;
1125 
1126 	if (st & LM90_STATUS_LLOW)
1127 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0);
1128 	if (st & LM90_STATUS_RLOW)
1129 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1);
1130 	if (st2 & MAX6696_STATUS2_R2LOW)
1131 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2);
1132 
1133 	if (st & LM90_STATUS_LHIGH)
1134 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0);
1135 	if (st & LM90_STATUS_RHIGH)
1136 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1);
1137 	if (st2 & MAX6696_STATUS2_R2HIGH)
1138 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2);
1139 
1140 	if (st & LM90_STATUS_LTHRM)
1141 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0);
1142 	if (st & LM90_STATUS_RTHRM)
1143 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1);
1144 	if (st2 & MAX6696_STATUS2_R2THRM)
1145 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2);
1146 
1147 	if (st2 & MAX6696_STATUS2_LOT2)
1148 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0);
1149 	if (st2 & MAX6696_STATUS2_ROT2)
1150 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1);
1151 	if (st2 & MAX6696_STATUS2_R2OT2)
1152 		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2);
1153 
1154 	data->reported_alarms = current_alarms;
1155 }
1156 
lm90_update_alarms_locked(struct lm90_data * data,bool force)1157 static int lm90_update_alarms_locked(struct lm90_data *data, bool force)
1158 {
1159 	if (force || !data->alarms_valid ||
1160 	    time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) {
1161 		struct i2c_client *client = data->client;
1162 		bool check_enable;
1163 		u16 alarms;
1164 		int val;
1165 
1166 		data->alarms_valid = false;
1167 
1168 		val = lm90_read_reg(client, LM90_REG_STATUS);
1169 		if (val < 0)
1170 			return val;
1171 		alarms = val & ~LM90_STATUS_BUSY;
1172 
1173 		if (data->reg_status2) {
1174 			val = lm90_read_reg(client, data->reg_status2);
1175 			if (val < 0)
1176 				return val;
1177 			alarms |= val << 8;
1178 		}
1179 		/*
1180 		 * If the update is forced (called from interrupt or alert
1181 		 * handler) and alarm data is valid, the alarms may have been
1182 		 * updated after the last update interval, and the status
1183 		 * register may still be cleared. Only add additional alarms
1184 		 * in this case. Alarms will be cleared later if appropriate.
1185 		 */
1186 		if (force && data->alarms_valid)
1187 			data->current_alarms |= alarms;
1188 		else
1189 			data->current_alarms = alarms;
1190 		data->alarms |= alarms;
1191 
1192 		check_enable = (client->irq || !(data->config_orig & 0x80)) &&
1193 			(data->config & 0x80);
1194 
1195 		if (force || check_enable)
1196 			schedule_work(&data->report_work);
1197 
1198 		/*
1199 		 * Re-enable ALERT# output if it was originally enabled, relevant
1200 		 * alarms are all clear, and alerts are currently disabled.
1201 		 * Otherwise (re)schedule worker if needed.
1202 		 */
1203 		if (check_enable) {
1204 			if (!(data->current_alarms & data->alert_alarms)) {
1205 				dev_dbg(&client->dev, "Re-enabling ALERT#\n");
1206 				lm90_update_confreg(data, data->config & ~0x80);
1207 				/*
1208 				 * We may have been called from the update handler.
1209 				 * If so, the worker, if scheduled, is no longer
1210 				 * needed. Cancel it. Don't synchronize because
1211 				 * it may already be running.
1212 				 */
1213 				cancel_delayed_work(&data->alert_work);
1214 			} else {
1215 				schedule_delayed_work(&data->alert_work,
1216 					max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
1217 			}
1218 		}
1219 		data->alarms_updated = jiffies;
1220 		data->alarms_valid = true;
1221 	}
1222 	return 0;
1223 }
1224 
lm90_update_alarms(struct lm90_data * data,bool force)1225 static int lm90_update_alarms(struct lm90_data *data, bool force)
1226 {
1227 	int err;
1228 
1229 	mutex_lock(&data->update_lock);
1230 	err = lm90_update_alarms_locked(data, force);
1231 	mutex_unlock(&data->update_lock);
1232 
1233 	return err;
1234 }
1235 
lm90_alert_work(struct work_struct * __work)1236 static void lm90_alert_work(struct work_struct *__work)
1237 {
1238 	struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work);
1239 	struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work);
1240 
1241 	/* Nothing to do if alerts are enabled */
1242 	if (!(data->config & 0x80))
1243 		return;
1244 
1245 	lm90_update_alarms(data, true);
1246 }
1247 
lm90_update_device(struct device * dev)1248 static int lm90_update_device(struct device *dev)
1249 {
1250 	struct lm90_data *data = dev_get_drvdata(dev);
1251 	struct i2c_client *client = data->client;
1252 	unsigned long next_update;
1253 	int val;
1254 
1255 	if (!data->valid) {
1256 		val = lm90_update_limits(dev);
1257 		if (val < 0)
1258 			return val;
1259 	}
1260 
1261 	next_update = data->last_updated +
1262 		      msecs_to_jiffies(data->update_interval);
1263 	if (time_after(jiffies, next_update) || !data->valid) {
1264 		dev_dbg(&client->dev, "Updating lm90 data.\n");
1265 
1266 		data->valid = false;
1267 
1268 		val = lm90_read_reg(client, LM90_REG_LOCAL_LOW);
1269 		if (val < 0)
1270 			return val;
1271 		data->temp[LOCAL_LOW] = val << 8;
1272 
1273 		val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH);
1274 		if (val < 0)
1275 			return val;
1276 		data->temp[LOCAL_HIGH] = val << 8;
1277 
1278 		val = lm90_read16(client, LM90_REG_LOCAL_TEMP,
1279 				  data->reg_local_ext, true);
1280 		if (val < 0)
1281 			return val;
1282 		data->temp[LOCAL_TEMP] = val;
1283 		val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1284 				  data->reg_remote_ext, true);
1285 		if (val < 0)
1286 			return val;
1287 		data->temp[REMOTE_TEMP] = val;
1288 
1289 		if (data->flags & LM90_HAVE_TEMP3) {
1290 			val = lm90_select_remote_channel(data, true);
1291 			if (val < 0)
1292 				return val;
1293 
1294 			val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1295 					  data->reg_remote_ext, true);
1296 			if (val < 0) {
1297 				lm90_select_remote_channel(data, false);
1298 				return val;
1299 			}
1300 			data->temp[REMOTE2_TEMP] = val;
1301 
1302 			lm90_select_remote_channel(data, false);
1303 		}
1304 
1305 		val = lm90_update_alarms_locked(data, false);
1306 		if (val < 0)
1307 			return val;
1308 
1309 		data->last_updated = jiffies;
1310 		data->valid = true;
1311 	}
1312 
1313 	return 0;
1314 }
1315 
lm90_temp_get_resolution(struct lm90_data * data,int index)1316 static int lm90_temp_get_resolution(struct lm90_data *data, int index)
1317 {
1318 	switch (index) {
1319 	case REMOTE_TEMP:
1320 		if (data->reg_remote_ext)
1321 			return data->resolution;
1322 		return 8;
1323 	case REMOTE_OFFSET:
1324 	case REMOTE2_OFFSET:
1325 	case REMOTE2_TEMP:
1326 		return data->resolution;
1327 	case LOCAL_TEMP:
1328 		if (data->reg_local_ext)
1329 			return data->resolution;
1330 		return 8;
1331 	case REMOTE_LOW:
1332 	case REMOTE_HIGH:
1333 	case REMOTE2_LOW:
1334 	case REMOTE2_HIGH:
1335 		if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
1336 			return data->resolution;
1337 		return 8;
1338 	default:
1339 		return 8;
1340 	}
1341 }
1342 
lm90_temp_from_reg(u32 flags,u16 regval,u8 resolution)1343 static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution)
1344 {
1345 	int val;
1346 
1347 	if (flags & LM90_HAVE_EXTENDED_TEMP)
1348 		val = regval - 0x4000;
1349 	else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED))
1350 		val = regval;
1351 	else
1352 		val = (s16)regval;
1353 
1354 	return ((val >> (16 - resolution)) * 1000) >> (resolution - 8);
1355 }
1356 
lm90_get_temp(struct lm90_data * data,int index,int channel)1357 static int lm90_get_temp(struct lm90_data *data, int index, int channel)
1358 {
1359 	int temp = lm90_temp_from_reg(data->flags, data->temp[index],
1360 				      lm90_temp_get_resolution(data, index));
1361 
1362 	/* +16 degrees offset for remote temperature on LM99 */
1363 	if (data->kind == lm99 && channel)
1364 		temp += 16000;
1365 
1366 	return temp;
1367 }
1368 
lm90_temp_to_reg(u32 flags,long val,u8 resolution)1369 static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution)
1370 {
1371 	int fraction = resolution > 8 ?
1372 			1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0;
1373 
1374 	if (flags & LM90_HAVE_EXTENDED_TEMP) {
1375 		val = clamp_val(val, -64000, 191000 + fraction);
1376 		val += 64000;
1377 	} else if (flags & LM90_HAVE_EXT_UNSIGNED) {
1378 		val = clamp_val(val, 0, 255000 + fraction);
1379 	} else if (flags & LM90_HAVE_UNSIGNED_TEMP) {
1380 		val = clamp_val(val, 0, 127000 + fraction);
1381 	} else {
1382 		val = clamp_val(val, -128000, 127000 + fraction);
1383 	}
1384 
1385 	return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution);
1386 }
1387 
lm90_set_temp(struct lm90_data * data,int index,int channel,long val)1388 static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val)
1389 {
1390 	static const u8 regs[] = {
1391 		[LOCAL_LOW] = LM90_REG_LOCAL_LOW,
1392 		[LOCAL_HIGH] = LM90_REG_LOCAL_HIGH,
1393 		[LOCAL_CRIT] = LM90_REG_LOCAL_CRIT,
1394 		[REMOTE_CRIT] = LM90_REG_REMOTE_CRIT,
1395 		[LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG,
1396 		[REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG,
1397 		[REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT,
1398 		[REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG,
1399 		[REMOTE_LOW] = LM90_REG_REMOTE_LOWH,
1400 		[REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH,
1401 		[REMOTE2_LOW] = LM90_REG_REMOTE_LOWH,
1402 		[REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH,
1403 	};
1404 	struct i2c_client *client = data->client;
1405 	u8 regh = regs[index];
1406 	u8 regl = 0;
1407 	int err;
1408 
1409 	if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) {
1410 		if (index == REMOTE_LOW || index == REMOTE2_LOW)
1411 			regl = LM90_REG_REMOTE_LOWL;
1412 		else if (index == REMOTE_HIGH || index == REMOTE2_HIGH)
1413 			regl = LM90_REG_REMOTE_HIGHL;
1414 	}
1415 
1416 	/* +16 degrees offset for remote temperature on LM99 */
1417 	if (data->kind == lm99 && channel) {
1418 		/* prevent integer underflow */
1419 		val = max(val, -128000l);
1420 		val -= 16000;
1421 	}
1422 
1423 	data->temp[index] = lm90_temp_to_reg(data->flags, val,
1424 					     lm90_temp_get_resolution(data, index));
1425 
1426 	if (channel > 1)
1427 		lm90_select_remote_channel(data, true);
1428 
1429 	err = lm90_write16(client, regh, regl, data->temp[index]);
1430 
1431 	if (channel > 1)
1432 		lm90_select_remote_channel(data, false);
1433 
1434 	return err;
1435 }
1436 
lm90_get_temphyst(struct lm90_data * data,int index,int channel)1437 static int lm90_get_temphyst(struct lm90_data *data, int index, int channel)
1438 {
1439 	int temp = lm90_get_temp(data, index, channel);
1440 
1441 	return temp - data->temp_hyst * 1000;
1442 }
1443 
lm90_set_temphyst(struct lm90_data * data,long val)1444 static int lm90_set_temphyst(struct lm90_data *data, long val)
1445 {
1446 	int temp = lm90_get_temp(data, LOCAL_CRIT, 0);
1447 
1448 	/* prevent integer overflow/underflow */
1449 	val = clamp_val(val, -128000l, 255000l);
1450 	data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31);
1451 
1452 	return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst);
1453 }
1454 
lm90_get_temp_offset(struct lm90_data * data,int index)1455 static int lm90_get_temp_offset(struct lm90_data *data, int index)
1456 {
1457 	int res = lm90_temp_get_resolution(data, index);
1458 
1459 	return lm90_temp_from_reg(0, data->temp[index], res);
1460 }
1461 
lm90_set_temp_offset(struct lm90_data * data,int index,int channel,long val)1462 static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val)
1463 {
1464 	int err;
1465 
1466 	val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index));
1467 
1468 	/* For ADT7481 we can use the same registers for remote channel 1 and 2 */
1469 	if (channel > 1)
1470 		lm90_select_remote_channel(data, true);
1471 
1472 	err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val);
1473 
1474 	if (channel > 1)
1475 		lm90_select_remote_channel(data, false);
1476 
1477 	if (err)
1478 		return err;
1479 
1480 	data->temp[index] = val;
1481 
1482 	return 0;
1483 }
1484 
1485 static const u8 lm90_temp_index[MAX_CHANNELS] = {
1486 	LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
1487 };
1488 
1489 static const u8 lm90_temp_min_index[MAX_CHANNELS] = {
1490 	LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
1491 };
1492 
1493 static const u8 lm90_temp_max_index[MAX_CHANNELS] = {
1494 	LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
1495 };
1496 
1497 static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {
1498 	LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
1499 };
1500 
1501 static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {
1502 	LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
1503 };
1504 
1505 static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {
1506 	-1, REMOTE_OFFSET, REMOTE2_OFFSET
1507 };
1508 
1509 static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) };
1510 static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) };
1511 static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) };
1512 static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) };
1513 static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) };
1514 static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };
1515 
lm90_temp_read(struct device * dev,u32 attr,int channel,long * val)1516 static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1517 {
1518 	struct lm90_data *data = dev_get_drvdata(dev);
1519 	int err;
1520 	u16 bit;
1521 
1522 	mutex_lock(&data->update_lock);
1523 	err = lm90_update_device(dev);
1524 	mutex_unlock(&data->update_lock);
1525 	if (err)
1526 		return err;
1527 
1528 	switch (attr) {
1529 	case hwmon_temp_input:
1530 		*val = lm90_get_temp(data, lm90_temp_index[channel], channel);
1531 		break;
1532 	case hwmon_temp_min_alarm:
1533 	case hwmon_temp_max_alarm:
1534 	case hwmon_temp_crit_alarm:
1535 	case hwmon_temp_emergency_alarm:
1536 	case hwmon_temp_fault:
1537 		switch (attr) {
1538 		case hwmon_temp_min_alarm:
1539 			bit = lm90_min_alarm_bits[channel];
1540 			break;
1541 		case hwmon_temp_max_alarm:
1542 			bit = lm90_max_alarm_bits[channel];
1543 			break;
1544 		case hwmon_temp_crit_alarm:
1545 			if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)
1546 				bit = lm90_crit_alarm_bits_swapped[channel];
1547 			else
1548 				bit = lm90_crit_alarm_bits[channel];
1549 			break;
1550 		case hwmon_temp_emergency_alarm:
1551 			bit = lm90_emergency_alarm_bits[channel];
1552 			break;
1553 		case hwmon_temp_fault:
1554 			bit = lm90_fault_bits[channel];
1555 			break;
1556 		}
1557 		*val = !!(data->alarms & bit);
1558 		data->alarms &= ~bit;
1559 		data->alarms |= data->current_alarms;
1560 		break;
1561 	case hwmon_temp_min:
1562 		*val = lm90_get_temp(data, lm90_temp_min_index[channel], channel);
1563 		break;
1564 	case hwmon_temp_max:
1565 		*val = lm90_get_temp(data, lm90_temp_max_index[channel], channel);
1566 		break;
1567 	case hwmon_temp_crit:
1568 		*val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel);
1569 		break;
1570 	case hwmon_temp_crit_hyst:
1571 		*val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel);
1572 		break;
1573 	case hwmon_temp_emergency:
1574 		*val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel);
1575 		break;
1576 	case hwmon_temp_emergency_hyst:
1577 		*val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel);
1578 		break;
1579 	case hwmon_temp_offset:
1580 		*val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]);
1581 		break;
1582 	default:
1583 		return -EOPNOTSUPP;
1584 	}
1585 	return 0;
1586 }
1587 
lm90_temp_write(struct device * dev,u32 attr,int channel,long val)1588 static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1589 {
1590 	struct lm90_data *data = dev_get_drvdata(dev);
1591 	int err;
1592 
1593 	mutex_lock(&data->update_lock);
1594 
1595 	err = lm90_update_device(dev);
1596 	if (err)
1597 		goto error;
1598 
1599 	switch (attr) {
1600 	case hwmon_temp_min:
1601 		err = lm90_set_temp(data, lm90_temp_min_index[channel],
1602 				    channel, val);
1603 		break;
1604 	case hwmon_temp_max:
1605 		err = lm90_set_temp(data, lm90_temp_max_index[channel],
1606 				    channel, val);
1607 		break;
1608 	case hwmon_temp_crit:
1609 		err = lm90_set_temp(data, lm90_temp_crit_index[channel],
1610 				    channel, val);
1611 		break;
1612 	case hwmon_temp_crit_hyst:
1613 		err = lm90_set_temphyst(data, val);
1614 		break;
1615 	case hwmon_temp_emergency:
1616 		err = lm90_set_temp(data, lm90_temp_emerg_index[channel],
1617 				    channel, val);
1618 		break;
1619 	case hwmon_temp_offset:
1620 		err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel],
1621 					   channel, val);
1622 		break;
1623 	default:
1624 		err = -EOPNOTSUPP;
1625 		break;
1626 	}
1627 error:
1628 	mutex_unlock(&data->update_lock);
1629 
1630 	return err;
1631 }
1632 
lm90_temp_is_visible(const void * data,u32 attr,int channel)1633 static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
1634 {
1635 	switch (attr) {
1636 	case hwmon_temp_input:
1637 	case hwmon_temp_min_alarm:
1638 	case hwmon_temp_max_alarm:
1639 	case hwmon_temp_crit_alarm:
1640 	case hwmon_temp_emergency_alarm:
1641 	case hwmon_temp_emergency_hyst:
1642 	case hwmon_temp_fault:
1643 	case hwmon_temp_label:
1644 		return 0444;
1645 	case hwmon_temp_min:
1646 	case hwmon_temp_max:
1647 	case hwmon_temp_crit:
1648 	case hwmon_temp_emergency:
1649 	case hwmon_temp_offset:
1650 		return 0644;
1651 	case hwmon_temp_crit_hyst:
1652 		if (channel == 0)
1653 			return 0644;
1654 		return 0444;
1655 	default:
1656 		return 0;
1657 	}
1658 }
1659 
lm90_chip_read(struct device * dev,u32 attr,int channel,long * val)1660 static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
1661 {
1662 	struct lm90_data *data = dev_get_drvdata(dev);
1663 	int err;
1664 
1665 	mutex_lock(&data->update_lock);
1666 	err = lm90_update_device(dev);
1667 	mutex_unlock(&data->update_lock);
1668 	if (err)
1669 		return err;
1670 
1671 	switch (attr) {
1672 	case hwmon_chip_update_interval:
1673 		*val = data->update_interval;
1674 		break;
1675 	case hwmon_chip_alarms:
1676 		*val = data->alarms;
1677 		break;
1678 	case hwmon_chip_temp_samples:
1679 		if (data->faultqueue_mask) {
1680 			*val = (data->config & data->faultqueue_mask) ?
1681 				data->faultqueue_depth : 1;
1682 		} else {
1683 			switch (data->conalert & 0x0e) {
1684 			case 0x0:
1685 			default:
1686 				*val = 1;
1687 				break;
1688 			case 0x2:
1689 				*val = 2;
1690 				break;
1691 			case 0x6:
1692 				*val = 3;
1693 				break;
1694 			case 0xe:
1695 				*val = 4;
1696 				break;
1697 			}
1698 		}
1699 		break;
1700 	default:
1701 		return -EOPNOTSUPP;
1702 	}
1703 
1704 	return 0;
1705 }
1706 
lm90_chip_write(struct device * dev,u32 attr,int channel,long val)1707 static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1708 {
1709 	struct lm90_data *data = dev_get_drvdata(dev);
1710 	struct i2c_client *client = data->client;
1711 	int err;
1712 
1713 	mutex_lock(&data->update_lock);
1714 
1715 	err = lm90_update_device(dev);
1716 	if (err)
1717 		goto error;
1718 
1719 	switch (attr) {
1720 	case hwmon_chip_update_interval:
1721 		err = lm90_set_convrate(client, data,
1722 					clamp_val(val, 0, 100000));
1723 		break;
1724 	case hwmon_chip_temp_samples:
1725 		err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4));
1726 		break;
1727 	default:
1728 		err = -EOPNOTSUPP;
1729 		break;
1730 	}
1731 error:
1732 	mutex_unlock(&data->update_lock);
1733 
1734 	return err;
1735 }
1736 
lm90_chip_is_visible(const void * data,u32 attr,int channel)1737 static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1738 {
1739 	switch (attr) {
1740 	case hwmon_chip_update_interval:
1741 	case hwmon_chip_temp_samples:
1742 		return 0644;
1743 	case hwmon_chip_alarms:
1744 		return 0444;
1745 	default:
1746 		return 0;
1747 	}
1748 }
1749 
lm90_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)1750 static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1751 		     u32 attr, int channel, long *val)
1752 {
1753 	switch (type) {
1754 	case hwmon_chip:
1755 		return lm90_chip_read(dev, attr, channel, val);
1756 	case hwmon_temp:
1757 		return lm90_temp_read(dev, attr, channel, val);
1758 	default:
1759 		return -EOPNOTSUPP;
1760 	}
1761 }
1762 
lm90_read_string(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,const char ** str)1763 static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type,
1764 			    u32 attr, int channel, const char **str)
1765 {
1766 	struct lm90_data *data = dev_get_drvdata(dev);
1767 
1768 	*str = data->channel_label[channel];
1769 
1770 	return 0;
1771 }
1772 
lm90_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)1773 static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1774 		      u32 attr, int channel, long val)
1775 {
1776 	switch (type) {
1777 	case hwmon_chip:
1778 		return lm90_chip_write(dev, attr, channel, val);
1779 	case hwmon_temp:
1780 		return lm90_temp_write(dev, attr, channel, val);
1781 	default:
1782 		return -EOPNOTSUPP;
1783 	}
1784 }
1785 
lm90_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)1786 static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1787 			       u32 attr, int channel)
1788 {
1789 	switch (type) {
1790 	case hwmon_chip:
1791 		return lm90_chip_is_visible(data, attr, channel);
1792 	case hwmon_temp:
1793 		return lm90_temp_is_visible(data, attr, channel);
1794 	default:
1795 		return 0;
1796 	}
1797 }
1798 
lm90_detect_lm84(struct i2c_client * client)1799 static const char *lm90_detect_lm84(struct i2c_client *client)
1800 {
1801 	static const u8 regs[] = {
1802 		LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH,
1803 		LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH
1804 	};
1805 	int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1806 	int reg1, reg2, reg3, reg4;
1807 	bool nonzero = false;
1808 	u8 ff = 0xff;
1809 	int i;
1810 
1811 	if (status < 0 || (status & 0xab))
1812 		return NULL;
1813 
1814 	/*
1815 	 * For LM84, undefined registers return the most recent value.
1816 	 * Repeat several times, each time checking against a different
1817 	 * (presumably) existing register.
1818 	 */
1819 	for (i = 0; i < ARRAY_SIZE(regs); i++) {
1820 		reg1 = i2c_smbus_read_byte_data(client, regs[i]);
1821 		reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL);
1822 		reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1823 		reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1824 
1825 		if (reg1 < 0)
1826 			return NULL;
1827 
1828 		/* If any register has a different value, this is not an LM84 */
1829 		if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1)
1830 			return NULL;
1831 
1832 		nonzero |= reg1 || reg2 || reg3 || reg4;
1833 		ff &= reg1;
1834 	}
1835 	/*
1836 	 * If all registers always returned 0 or 0xff, all bets are off,
1837 	 * and we can not make any predictions about the chip type.
1838 	 */
1839 	return nonzero && ff != 0xff ? "lm84" : NULL;
1840 }
1841 
lm90_detect_max1617(struct i2c_client * client,int config1)1842 static const char *lm90_detect_max1617(struct i2c_client *client, int config1)
1843 {
1844 	int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1845 	int llo, rlo, lhi, rhi;
1846 
1847 	if (status < 0 || (status & 0x03))
1848 		return NULL;
1849 
1850 	if (config1 & 0x3f)
1851 		return NULL;
1852 
1853 	/*
1854 	 * Fail if unsupported registers return anything but 0xff.
1855 	 * The calling code already checked man_id and chip_id.
1856 	 * A byte read operation repeats the most recent read operation
1857 	 * and should also return 0xff.
1858 	 */
1859 	if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff ||
1860 	    i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff ||
1861 	    i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff ||
1862 	    i2c_smbus_read_byte(client) != 0xff)
1863 		return NULL;
1864 
1865 	llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1866 	rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1867 
1868 	lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
1869 	rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH);
1870 
1871 	if (llo < 0 || rlo < 0)
1872 		return NULL;
1873 
1874 	/*
1875 	 * A byte read operation repeats the most recent read and should
1876 	 * return the same value.
1877 	 */
1878 	if (i2c_smbus_read_byte(client) != rhi)
1879 		return NULL;
1880 
1881 	/*
1882 	 * The following two checks are marginal since the checked values
1883 	 * are strictly speaking valid.
1884 	 */
1885 
1886 	/* fail for negative high limits; this also catches read errors */
1887 	if ((s8)lhi < 0 || (s8)rhi < 0)
1888 		return NULL;
1889 
1890 	/* fail if low limits are larger than or equal to high limits */
1891 	if ((s8)llo >= lhi || (s8)rlo >= rhi)
1892 		return NULL;
1893 
1894 	if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1895 		/*
1896 		 * Word read operations return 0xff in second byte
1897 		 */
1898 		if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) !=
1899 						0xffff)
1900 			return NULL;
1901 		if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) !=
1902 						(config1 | 0xff00))
1903 			return NULL;
1904 		if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) !=
1905 						(lhi | 0xff00))
1906 			return NULL;
1907 	}
1908 
1909 	return "max1617";
1910 }
1911 
lm90_detect_national(struct i2c_client * client,int chip_id,int config1,int convrate)1912 static const char *lm90_detect_national(struct i2c_client *client, int chip_id,
1913 					int config1, int convrate)
1914 {
1915 	int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
1916 	int address = client->addr;
1917 	const char *name = NULL;
1918 
1919 	if (config2 < 0)
1920 		return NULL;
1921 
1922 	if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09)
1923 		return NULL;
1924 
1925 	if (address != 0x4c && address != 0x4d)
1926 		return NULL;
1927 
1928 	switch (chip_id & 0xf0) {
1929 	case 0x10:	/* LM86 */
1930 		if (address == 0x4c)
1931 			name = "lm86";
1932 		break;
1933 	case 0x20:	/* LM90 */
1934 		if (address == 0x4c)
1935 			name = "lm90";
1936 		break;
1937 	case 0x30:	/* LM89/LM99 */
1938 		name = "lm99";	/* detect LM89 as LM99 */
1939 		break;
1940 	default:
1941 		break;
1942 	}
1943 
1944 	return name;
1945 }
1946 
lm90_detect_on(struct i2c_client * client,int chip_id,int config1,int convrate)1947 static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1,
1948 				  int convrate)
1949 {
1950 	int address = client->addr;
1951 	const char *name = NULL;
1952 
1953 	switch (chip_id) {
1954 	case 0xca:		/* NCT218 */
1955 		if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
1956 		    convrate <= 0x0a)
1957 			name = "nct218";
1958 		break;
1959 	default:
1960 		break;
1961 	}
1962 	return name;
1963 }
1964 
lm90_detect_analog(struct i2c_client * client,bool common_address,int chip_id,int config1,int convrate)1965 static const char *lm90_detect_analog(struct i2c_client *client, bool common_address,
1966 				      int chip_id, int config1, int convrate)
1967 {
1968 	int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1969 	int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2);
1970 	int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID);
1971 	int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID);
1972 	int address = client->addr;
1973 	const char *name = NULL;
1974 
1975 	if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0)
1976 		return NULL;
1977 
1978 	/*
1979 	 * The following chips should be detected by this function. Known
1980 	 * register values are listed. Registers 0x3d .. 0x3e are undocumented
1981 	 * for most of the chips, yet appear to return a well defined value.
1982 	 * Register 0xff is undocumented for some of the chips. Register 0x3f
1983 	 * is undocumented for all chips, but also returns a well defined value.
1984 	 * Values are as reported from real chips unless mentioned otherwise.
1985 	 * The code below checks values for registers 0x3d, 0x3e, and 0xff,
1986 	 * but not for register 0x3f.
1987 	 *
1988 	 * Chip			Register
1989 	 *		3d	3e	3f	fe	ff	Notes
1990 	 * ----------------------------------------------------------
1991 	 * adm1020	00	00	00	41	39
1992 	 * adm1021	00	00	00	41	03
1993 	 * adm1021a	00	00	00	41	3c
1994 	 * adm1023	00	00	00	41	3c	same as adm1021a
1995 	 * adm1032	00	00	00	41	42
1996 	 *
1997 	 * adt7421	21	41	04	41	04
1998 	 * adt7461	00	00	00	41	51
1999 	 * adt7461a	61	41	05	41	57
2000 	 * adt7481	81	41	02	41	62
2001 	 * adt7482	-	-	-	41	65	datasheet
2002 	 *		82	41	05	41	75	real chip
2003 	 * adt7483	83	41	04	41	94
2004 	 *
2005 	 * nct72	61	41	07	41	55
2006 	 * nct210	00	00	00	41	3f
2007 	 * nct214	61	41	08	41	5a
2008 	 * nct1008	-	-	-	41	57	datasheet rev. 3
2009 	 *		61	41	06	41	54	real chip
2010 	 *
2011 	 * nvt210	-	-	-	41	-	datasheet
2012 	 * nvt211	-	-	-	41	-	datasheet
2013 	 */
2014 	switch (chip_id) {
2015 	case 0x00 ... 0x03:	/* ADM1021 */
2016 	case 0x05 ... 0x0f:
2017 		if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2018 		    !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2019 			name = "adm1021";
2020 		break;
2021 	case 0x04:		/* ADT7421 (undocumented) */
2022 		if (man_id2 == 0x41 && chip_id2 == 0x21 &&
2023 		    (address == 0x4c || address == 0x4d) &&
2024 		    (config1 & 0x0b) == 0x08 && convrate <= 0x0a)
2025 			name = "adt7421";
2026 		break;
2027 	case 0x30 ... 0x38:	/* ADM1021A, ADM1023 */
2028 	case 0x3a ... 0x3e:
2029 		/*
2030 		 * ADM1021A and compatible chips will be mis-detected as
2031 		 * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both
2032 		 * found to have a Chip ID of 0x3c.
2033 		 * ADM1021A does not officially support low byte registers
2034 		 * (0x12 .. 0x14), but a chip labeled ADM1021A does support it.
2035 		 * Official support for the temperature offset high byte
2036 		 * register (0x11) was added to revision F of the ADM1021A
2037 		 * datasheet.
2038 		 * It is currently unknown if there is a means to distinguish
2039 		 * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist
2040 		 * which differ in functionality from ADM1023.
2041 		 */
2042 		if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2043 		    !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2044 			name = "adm1023";
2045 		break;
2046 	case 0x39:		/* ADM1020 (undocumented) */
2047 		if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2048 		    (address == 0x4c || address == 0x4d || address == 0x4e) &&
2049 		    !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2050 			name = "adm1020";
2051 		break;
2052 	case 0x3f:		/* NCT210 */
2053 		if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2054 		    !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2055 			name = "nct210";
2056 		break;
2057 	case 0x40 ... 0x4f:	/* ADM1032 */
2058 		if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2059 		    (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) &&
2060 		    convrate <= 0x0a)
2061 			name = "adm1032";
2062 		break;
2063 	case 0x51:	/* ADT7461 */
2064 		if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2065 		    (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2066 		    convrate <= 0x0a)
2067 			name = "adt7461";
2068 		break;
2069 	case 0x54:	/* NCT1008 */
2070 		if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2071 		    (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2072 		    convrate <= 0x0a)
2073 			name = "nct1008";
2074 		break;
2075 	case 0x55:	/* NCT72 */
2076 		if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2077 		    (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2078 		    convrate <= 0x0a)
2079 			name = "nct72";
2080 		break;
2081 	case 0x57:	/* ADT7461A, NCT1008 (datasheet rev. 3) */
2082 		if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2083 		    (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2084 		    convrate <= 0x0a)
2085 			name = "adt7461a";
2086 		break;
2087 	case 0x5a:	/* NCT214 */
2088 		if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2089 		    common_address && !(config1 & 0x1b) && convrate <= 0x0a)
2090 			name = "nct214";
2091 		break;
2092 	case 0x62:	/* ADT7481, undocumented */
2093 		if (man_id2 == 0x41 && chip_id2 == 0x81 &&
2094 		    (address == 0x4b || address == 0x4c) && !(config1 & 0x10) &&
2095 		    !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) {
2096 			name = "adt7481";
2097 		}
2098 		break;
2099 	case 0x65:	/* ADT7482, datasheet */
2100 	case 0x75:	/* ADT7482, real chip */
2101 		if (man_id2 == 0x41 && chip_id2 == 0x82 &&
2102 		    address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) &&
2103 		    convrate <= 0x0a)
2104 			name = "adt7482";
2105 		break;
2106 	case 0x94:	/* ADT7483 */
2107 		if (man_id2 == 0x41 && chip_id2 == 0x83 &&
2108 		    common_address &&
2109 		    ((address >= 0x18 && address <= 0x1a) ||
2110 		     (address >= 0x29 && address <= 0x2b) ||
2111 		     (address >= 0x4c && address <= 0x4e)) &&
2112 		    !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a)
2113 			name = "adt7483a";
2114 		break;
2115 	default:
2116 		break;
2117 	}
2118 
2119 	return name;
2120 }
2121 
lm90_detect_maxim(struct i2c_client * client,bool common_address,int chip_id,int config1,int convrate)2122 static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address,
2123 				     int chip_id, int config1, int convrate)
2124 {
2125 	int man_id, emerg, emerg2, status2;
2126 	int address = client->addr;
2127 	const char *name = NULL;
2128 
2129 	switch (chip_id) {
2130 	case 0x01:
2131 		if (!common_address)
2132 			break;
2133 
2134 		/*
2135 		 * We read MAX6659_REG_REMOTE_EMERG twice, and re-read
2136 		 * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG
2137 		 * exists, both readings will reflect the same value. Otherwise,
2138 		 * the readings will be different.
2139 		 */
2140 		emerg = i2c_smbus_read_byte_data(client,
2141 						 MAX6659_REG_REMOTE_EMERG);
2142 		man_id = i2c_smbus_read_byte_data(client,
2143 						  LM90_REG_MAN_ID);
2144 		emerg2 = i2c_smbus_read_byte_data(client,
2145 						  MAX6659_REG_REMOTE_EMERG);
2146 		status2 = i2c_smbus_read_byte_data(client,
2147 						   MAX6696_REG_STATUS2);
2148 		if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
2149 			return NULL;
2150 
2151 		/*
2152 		 * Even though MAX6695 and MAX6696 do not have a chip ID
2153 		 * register, reading it returns 0x01. Bit 4 of the config1
2154 		 * register is unused and should return zero when read. Bit 0 of
2155 		 * the status2 register is unused and should return zero when
2156 		 * read.
2157 		 *
2158 		 * MAX6695 and MAX6696 have an additional set of temperature
2159 		 * limit registers. We can detect those chips by checking if
2160 		 * one of those registers exists.
2161 		 */
2162 		if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 &&
2163 		    convrate <= 0x07)
2164 			name = "max6696";
2165 		/*
2166 		 * The chip_id register of the MAX6680 and MAX6681 holds the
2167 		 * revision of the chip. The lowest bit of the config1 register
2168 		 * is unused and should return zero when read, so should the
2169 		 * second to last bit of config1 (software reset). Register
2170 		 * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and
2171 		 * should differ from emerg2, and emerg2 should match man_id
2172 		 * since it does not exist.
2173 		 */
2174 		else if (!(config1 & 0x03) && convrate <= 0x07 &&
2175 			 emerg2 == man_id && emerg2 != status2)
2176 			name = "max6680";
2177 		/*
2178 		 * MAX1617A does not have any extended registers (register
2179 		 * address 0x10 or higher) except for manufacturer and
2180 		 * device ID registers. Unlike other chips of this series,
2181 		 * unsupported registers were observed to return a fixed value
2182 		 * of 0x01.
2183 		 * Note: Multiple chips with different markings labeled as
2184 		 * "MAX1617" (no "A") were observed to report manufacturer ID
2185 		 * 0x4d and device ID 0x01. It is unknown if other variants of
2186 		 * MAX1617/MAX617A with different behavior exist. The detection
2187 		 * code below works for those chips.
2188 		 */
2189 		else if (!(config1 & 0x03f) && convrate <= 0x07 &&
2190 			 emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01)
2191 			name = "max1617";
2192 		break;
2193 	case 0x08:
2194 		/*
2195 		 * The chip_id of the MAX6654 holds the revision of the chip.
2196 		 * The lowest 3 bits of the config1 register are unused and
2197 		 * should return zero when read.
2198 		 */
2199 		if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2200 			name = "max6654";
2201 		break;
2202 	case 0x09:
2203 		/*
2204 		 * The chip_id of the MAX6690 holds the revision of the chip.
2205 		 * The lowest 3 bits of the config1 register are unused and
2206 		 * should return zero when read.
2207 		 * Note that MAX6654 and MAX6690 are practically the same chips.
2208 		 * The only diference is the rated accuracy. Rev. 1 of the
2209 		 * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled
2210 		 * MAX6654 was observed to have a chip ID of 0x09.
2211 		 */
2212 		if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2213 			name = "max6690";
2214 		break;
2215 	case 0x4d:
2216 		/*
2217 		 * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
2218 		 * register. Reading from that address will return the last
2219 		 * read value, which in our case is those of the man_id
2220 		 * register, or 0x4d.
2221 		 * MAX6642 does not have a conversion rate register, nor low
2222 		 * limit registers. Reading from those registers returns the
2223 		 * last read value.
2224 		 *
2225 		 * For MAX6657, MAX6658 and MAX6659, the config1 register lacks
2226 		 * a low nibble, so the value will be those of the previous
2227 		 * read, so in our case again those of the man_id register.
2228 		 * MAX6659 has a third set of upper temperature limit registers.
2229 		 * Those registers also return values on MAX6657 and MAX6658,
2230 		 * thus the only way to detect MAX6659 is by its address.
2231 		 * For this reason it will be mis-detected as MAX6657 if its
2232 		 * address is 0x4c.
2233 		 */
2234 		if (address >= 0x48 && address <= 0x4f && config1 == convrate &&
2235 		    !(config1 & 0x0f)) {
2236 			int regval;
2237 
2238 			/*
2239 			 * We know that this is not a MAX6657/58/59 because its
2240 			 * configuration register has the wrong value and it does
2241 			 * not appear to have a conversion rate register.
2242 			 */
2243 
2244 			/* re-read manufacturer ID to have a good baseline */
2245 			if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d)
2246 				break;
2247 
2248 			/* check various non-existing registers */
2249 			if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d ||
2250 			    i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d ||
2251 			    i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d)
2252 				break;
2253 
2254 			/* check for unused status register bits */
2255 			regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
2256 			if (regval < 0 || (regval & 0x2b))
2257 				break;
2258 
2259 			/* re-check unsupported registers */
2260 			if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval ||
2261 			    i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval ||
2262 			    i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval)
2263 				break;
2264 
2265 			name = "max6642";
2266 		} else if ((address == 0x4c || address == 0x4d || address == 0x4e) &&
2267 			   (config1 & 0x1f) == 0x0d && convrate <= 0x09) {
2268 			if (address == 0x4c)
2269 				name = "max6657";
2270 			else
2271 				name = "max6659";
2272 		}
2273 		break;
2274 	case 0x59:
2275 		/*
2276 		 * The chip_id register of the MAX6646/6647/6649 holds the
2277 		 * revision of the chip. The lowest 6 bits of the config1
2278 		 * register are unused and should return zero when read.
2279 		 * The I2C address of MAX6648/6692 is fixed at 0x4c.
2280 		 * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e,
2281 		 * and MAX6649 is at address 0x4c. A slight difference between
2282 		 * the two sets of chips is that the remote temperature register
2283 		 * reports different values if the DXP pin is open or shorted.
2284 		 * We can use that information to help distinguish between the
2285 		 * chips. MAX6648 will be mis-detected as MAX6649 if the remote
2286 		 * diode is connected, but there isn't really anything we can
2287 		 * do about that.
2288 		 */
2289 		if (!(config1 & 0x3f) && convrate <= 0x07) {
2290 			int temp;
2291 
2292 			switch (address) {
2293 			case 0x4c:
2294 				/*
2295 				 * MAX6649 reports an external temperature
2296 				 * value of 0xff if DXP is open or shorted.
2297 				 * MAX6648 reports 0x80 in that case.
2298 				 */
2299 				temp = i2c_smbus_read_byte_data(client,
2300 								LM90_REG_REMOTE_TEMPH);
2301 				if (temp == 0x80)
2302 					name = "max6648";
2303 				else
2304 					name = "max6649";
2305 				break;
2306 			case 0x4d:
2307 				name = "max6646";
2308 				break;
2309 			case 0x4e:
2310 				name = "max6647";
2311 				break;
2312 			default:
2313 				break;
2314 			}
2315 		}
2316 		break;
2317 	default:
2318 		break;
2319 	}
2320 
2321 	return name;
2322 }
2323 
lm90_detect_nuvoton(struct i2c_client * client,int chip_id,int config1,int convrate)2324 static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id,
2325 				       int config1, int convrate)
2326 {
2327 	int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2328 	int address = client->addr;
2329 	const char *name = NULL;
2330 
2331 	if (config2 < 0)
2332 		return NULL;
2333 
2334 	if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) {
2335 		if (chip_id == 0x01 && convrate <= 0x09) {
2336 			/* W83L771W/G */
2337 			name = "w83l771";
2338 		} else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) {
2339 			/* W83L771AWG/ASG */
2340 			name = "w83l771";
2341 		}
2342 	}
2343 	return name;
2344 }
2345 
lm90_detect_nuvoton_50(struct i2c_client * client,int chip_id,int config1,int convrate)2346 static const char *lm90_detect_nuvoton_50(struct i2c_client *client, int chip_id,
2347 					  int config1, int convrate)
2348 {
2349 	int chip_id2 = i2c_smbus_read_byte_data(client, NCT7716_REG_CHIP_ID);
2350 	int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2351 	int address = client->addr;
2352 	const char *name = NULL;
2353 
2354 	if (chip_id2 < 0 || config2 < 0)
2355 		return NULL;
2356 
2357 	if (chip_id2 != 0x50 || convrate > 0x08)
2358 		return NULL;
2359 
2360 	switch (chip_id) {
2361 	case 0x90:
2362 		if (address == 0x48 && !(config1 & 0x3e) && !(config2 & 0xfe))
2363 			name = "nct7717";
2364 		break;
2365 	case 0x91:
2366 		if ((address == 0x48 || address == 0x49) && !(config1 & 0x3e) &&
2367 		    !(config2 & 0xfe))
2368 			name = "nct7716";
2369 		else if (address == 0x4c && !(config1 & 0x38) && !(config2 & 0xf8))
2370 			name = "nct7718";
2371 		break;
2372 	default:
2373 		break;
2374 	}
2375 	return name;
2376 }
2377 
lm90_detect_nxp(struct i2c_client * client,bool common_address,int chip_id,int config1,int convrate)2378 static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address,
2379 				   int chip_id, int config1, int convrate)
2380 {
2381 	int address = client->addr;
2382 	const char *name = NULL;
2383 	int config2;
2384 
2385 	switch (chip_id) {
2386 	case 0x00:
2387 		config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2388 		if (config2 < 0)
2389 			return NULL;
2390 		if (address >= 0x48 && address <= 0x4f &&
2391 		    !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09)
2392 			name = "sa56004";
2393 		break;
2394 	case 0x80:
2395 		if (common_address && !(config1 & 0x3f) && convrate <= 0x07)
2396 			name = "ne1618";
2397 		break;
2398 	default:
2399 		break;
2400 	}
2401 	return name;
2402 }
2403 
lm90_detect_gmt(struct i2c_client * client,int chip_id,int config1,int convrate)2404 static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id,
2405 				   int config1, int convrate)
2406 {
2407 	int address = client->addr;
2408 
2409 	/*
2410 	 * According to the datasheet, G781 is supposed to be at I2C Address
2411 	 * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C
2412 	 * address 0x4d and have a chip ID of 0x03. However, when support
2413 	 * for G781 was added, chips at 0x4c and 0x4d were found to have a
2414 	 * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with
2415 	 * chip ID 0x03.
2416 	 * To avoid detection failures, accept chip ID 0x01 and 0x03 at both
2417 	 * addresses.
2418 	 * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public
2419 	 * datasheet is not available. Extensive testing suggests that
2420 	 * the chip appears to be fully compatible with G781.
2421 	 * Available register dumps show that G751 also reports manufacturer
2422 	 * ID 0x47 and chip ID 0x01 even though that chip does not officially
2423 	 * support those registers. This makes chip detection somewhat
2424 	 * vulnerable. To improve detection quality, read the offset low byte
2425 	 * and alert fault queue registers and verify that only expected bits
2426 	 * are set.
2427 	 */
2428 	if ((chip_id == 0x01 || chip_id == 0x03) &&
2429 	    (address == 0x4c || address == 0x4d) &&
2430 	    !(config1 & 0x3f) && convrate <= 0x08) {
2431 		int reg;
2432 
2433 		reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL);
2434 		if (reg < 0 || reg & 0x1f)
2435 			return NULL;
2436 		reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT);
2437 		if (reg < 0 || reg & 0xf1)
2438 			return NULL;
2439 
2440 		return "g781";
2441 	}
2442 
2443 	return NULL;
2444 }
2445 
lm90_detect_ti49(struct i2c_client * client,bool common_address,int chip_id,int config1,int convrate)2446 static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address,
2447 				    int chip_id, int config1, int convrate)
2448 {
2449 	if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) {
2450 		/* THMC10: Unsupported registers return 0xff */
2451 		if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff &&
2452 		    i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff)
2453 			return "thmc10";
2454 	}
2455 	return NULL;
2456 }
2457 
lm90_detect_ti(struct i2c_client * client,int chip_id,int config1,int convrate)2458 static const char *lm90_detect_ti(struct i2c_client *client, int chip_id,
2459 				  int config1, int convrate)
2460 {
2461 	int address = client->addr;
2462 	const char *name = NULL;
2463 
2464 	if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) {
2465 		int local_ext, conalert, chen, dfc;
2466 
2467 		local_ext = i2c_smbus_read_byte_data(client,
2468 						     TMP451_REG_LOCAL_TEMPL);
2469 		conalert = i2c_smbus_read_byte_data(client,
2470 						    TMP451_REG_CONALERT);
2471 		chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
2472 		dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
2473 
2474 		if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 &&
2475 		    (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) {
2476 			if (address == 0x4c && !(chen & 0x03))
2477 				name = "tmp451";
2478 			else if (address >= 0x48 && address <= 0x4f)
2479 				name = "tmp461";
2480 		}
2481 	}
2482 
2483 	return name;
2484 }
2485 
2486 /* Return 0 if detection is successful, -ENODEV otherwise */
lm90_detect(struct i2c_client * client,struct i2c_board_info * info)2487 static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info)
2488 {
2489 	struct i2c_adapter *adapter = client->adapter;
2490 	int man_id, chip_id, config1, convrate, lhigh;
2491 	const char *name = NULL;
2492 	int address = client->addr;
2493 	bool common_address =
2494 			(address >= 0x18 && address <= 0x1a) ||
2495 			(address >= 0x29 && address <= 0x2b) ||
2496 			(address >= 0x4c && address <= 0x4e);
2497 
2498 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
2499 		return -ENODEV;
2500 
2501 	/*
2502 	 * Get well defined register value for chips with neither man_id nor
2503 	 * chip_id registers.
2504 	 */
2505 	lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
2506 
2507 	/* detection and identification */
2508 	man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2509 	chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2510 	config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1);
2511 	convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2512 	if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0)
2513 		return -ENODEV;
2514 
2515 	/* Bail out immediately if all register report the same value */
2516 	if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate)
2517 		return -ENODEV;
2518 
2519 	/*
2520 	 * If reading man_id and chip_id both return the same value as lhigh,
2521 	 * the chip may not support those registers and return the most recent read
2522 	 * value. Check again with a different register and handle accordingly.
2523 	 */
2524 	if (man_id == lhigh && chip_id == lhigh) {
2525 		convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2526 		man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2527 		chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2528 		if (convrate < 0 || man_id < 0 || chip_id < 0)
2529 			return -ENODEV;
2530 		if (man_id == convrate && chip_id == convrate)
2531 			man_id = -1;
2532 	}
2533 	switch (man_id) {
2534 	case -1:	/* Chip does not support man_id / chip_id */
2535 		if (common_address && !convrate && !(config1 & 0x7f))
2536 			name = lm90_detect_lm84(client);
2537 		break;
2538 	case 0x01:	/* National Semiconductor */
2539 		name = lm90_detect_national(client, chip_id, config1, convrate);
2540 		break;
2541 	case 0x1a:	/* ON */
2542 		name = lm90_detect_on(client, chip_id, config1, convrate);
2543 		break;
2544 	case 0x23:	/* Genesys Logic */
2545 		if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2546 			name = "gl523sm";
2547 		break;
2548 	case 0x41:	/* Analog Devices */
2549 		name = lm90_detect_analog(client, common_address, chip_id, config1,
2550 					  convrate);
2551 		break;
2552 	case 0x47:	/* GMT */
2553 		name = lm90_detect_gmt(client, chip_id, config1, convrate);
2554 		break;
2555 	case 0x49:	/* TI */
2556 		name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate);
2557 		break;
2558 	case 0x4d:	/* Maxim Integrated */
2559 		name = lm90_detect_maxim(client, common_address, chip_id,
2560 					 config1, convrate);
2561 		break;
2562 	case 0x50:
2563 		name = lm90_detect_nuvoton_50(client, chip_id, config1, convrate);
2564 		break;
2565 	case 0x54:	/* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */
2566 		if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2567 			name = "mc1066";
2568 		break;
2569 	case 0x55:	/* TI */
2570 		name = lm90_detect_ti(client, chip_id, config1, convrate);
2571 		break;
2572 	case 0x5c:	/* Winbond/Nuvoton */
2573 		name = lm90_detect_nuvoton(client, chip_id, config1, convrate);
2574 		break;
2575 	case 0xa1:	/*  NXP Semiconductor/Philips */
2576 		name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate);
2577 		break;
2578 	case 0xff:	/* MAX1617, G767, NE1617 */
2579 		if (common_address && chip_id == 0xff && convrate < 8)
2580 			name = lm90_detect_max1617(client, config1);
2581 		break;
2582 	default:
2583 		break;
2584 	}
2585 
2586 	if (!name) {	/* identification failed */
2587 		dev_dbg(&adapter->dev,
2588 			"Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n",
2589 			client->addr, man_id, chip_id);
2590 		return -ENODEV;
2591 	}
2592 
2593 	strscpy(info->type, name, I2C_NAME_SIZE);
2594 
2595 	return 0;
2596 }
2597 
lm90_restore_conf(void * _data)2598 static void lm90_restore_conf(void *_data)
2599 {
2600 	struct lm90_data *data = _data;
2601 	struct i2c_client *client = data->client;
2602 
2603 	cancel_delayed_work_sync(&data->alert_work);
2604 	cancel_work_sync(&data->report_work);
2605 
2606 	/* Restore initial configuration */
2607 	if (data->flags & LM90_HAVE_CONVRATE)
2608 		lm90_write_convrate(data, data->convrate_orig);
2609 	lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig);
2610 }
2611 
lm90_init_client(struct i2c_client * client,struct lm90_data * data)2612 static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
2613 {
2614 	struct device_node *np = client->dev.of_node;
2615 	int config, convrate;
2616 
2617 	if (data->flags & LM90_HAVE_CONVRATE) {
2618 		convrate = lm90_read_reg(client, LM90_REG_CONVRATE);
2619 		if (convrate < 0)
2620 			return convrate;
2621 		data->convrate_orig = convrate;
2622 		lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
2623 	} else {
2624 		data->update_interval = 500;
2625 	}
2626 
2627 	/*
2628 	 * Start the conversions.
2629 	 */
2630 	config = lm90_read_reg(client, LM90_REG_CONFIG1);
2631 	if (config < 0)
2632 		return config;
2633 	data->config_orig = config;
2634 	data->config = config;
2635 
2636 	/* Check Temperature Range Select */
2637 	if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
2638 		if (of_property_read_bool(np, "ti,extended-range-enable"))
2639 			config |= 0x04;
2640 		if (!(config & 0x04))
2641 			data->flags &= ~LM90_HAVE_EXTENDED_TEMP;
2642 	}
2643 
2644 	/*
2645 	 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
2646 	 * 0.125 degree resolution) and range (0x08, extend range
2647 	 * to -64 degree) mode for the remote temperature sensor.
2648 	 * Note that expeciments with an actual chip do not show a difference
2649 	 * if bit 3 is set or not.
2650 	 */
2651 	if (data->kind == max6680)
2652 		config |= 0x18;
2653 
2654 	/*
2655 	 * Put MAX6654 into extended range (0x20, extend minimum range from
2656 	 * 0 degrees to -64 degrees). Note that extended resolution is not
2657 	 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
2658 	 * slower, which is intentionally not done by default.
2659 	 */
2660 	if (data->kind == max6654)
2661 		config |= 0x20;
2662 
2663 	/*
2664 	 * Select external channel 0 for devices with three sensors
2665 	 */
2666 	if (data->flags & LM90_HAVE_TEMP3)
2667 		config &= ~0x08;
2668 
2669 	/*
2670 	 * Interrupt is enabled by default on reset, but it may be disabled
2671 	 * by bootloader, unmask it.
2672 	 */
2673 	if (client->irq)
2674 		config &= ~0x80;
2675 
2676 	config &= 0xBF;	/* run */
2677 	lm90_update_confreg(data, config);
2678 
2679 	return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
2680 }
2681 
lm90_is_tripped(struct i2c_client * client)2682 static bool lm90_is_tripped(struct i2c_client *client)
2683 {
2684 	struct lm90_data *data = i2c_get_clientdata(client);
2685 	int ret;
2686 
2687 	ret = lm90_update_alarms(data, true);
2688 	if (ret < 0)
2689 		return false;
2690 
2691 	return !!data->current_alarms;
2692 }
2693 
lm90_irq_thread(int irq,void * dev_id)2694 static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
2695 {
2696 	struct i2c_client *client = dev_id;
2697 
2698 	if (lm90_is_tripped(client))
2699 		return IRQ_HANDLED;
2700 	else
2701 		return IRQ_NONE;
2702 }
2703 
lm90_probe_channel_from_dt(struct i2c_client * client,struct device_node * child,struct lm90_data * data)2704 static int lm90_probe_channel_from_dt(struct i2c_client *client,
2705 				      struct device_node *child,
2706 				      struct lm90_data *data)
2707 {
2708 	u32 id;
2709 	s32 val;
2710 	int err;
2711 	struct device *dev = &client->dev;
2712 
2713 	err = of_property_read_u32(child, "reg", &id);
2714 	if (err) {
2715 		dev_err(dev, "missing reg property of %pOFn\n", child);
2716 		return err;
2717 	}
2718 
2719 	if (id >= MAX_CHANNELS) {
2720 		dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child);
2721 		return -EINVAL;
2722 	}
2723 
2724 	err = of_property_read_string(child, "label", &data->channel_label[id]);
2725 	if (err == -ENODATA || err == -EILSEQ) {
2726 		dev_err(dev, "invalid label property in %pOFn\n", child);
2727 		return err;
2728 	}
2729 
2730 	if (data->channel_label[id])
2731 		data->channel_config[id] |= HWMON_T_LABEL;
2732 
2733 	err = of_property_read_s32(child, "temperature-offset-millicelsius", &val);
2734 	if (!err) {
2735 		if (id == 0) {
2736 			dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n");
2737 			return -EINVAL;
2738 		}
2739 
2740 		err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val);
2741 		if (err) {
2742 			dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n",
2743 				val, id, err);
2744 			return err;
2745 		}
2746 	}
2747 
2748 	return 0;
2749 }
2750 
lm90_parse_dt_channel_info(struct i2c_client * client,struct lm90_data * data)2751 static int lm90_parse_dt_channel_info(struct i2c_client *client,
2752 				      struct lm90_data *data)
2753 {
2754 	int err;
2755 	struct device *dev = &client->dev;
2756 	const struct device_node *np = dev->of_node;
2757 
2758 	for_each_child_of_node_scoped(np, child) {
2759 		if (strcmp(child->name, "channel"))
2760 			continue;
2761 
2762 		err = lm90_probe_channel_from_dt(client, child, data);
2763 		if (err)
2764 			return err;
2765 	}
2766 
2767 	return 0;
2768 }
2769 
2770 static const struct hwmon_ops lm90_ops = {
2771 	.is_visible = lm90_is_visible,
2772 	.read = lm90_read,
2773 	.read_string = lm90_read_string,
2774 	.write = lm90_write,
2775 };
2776 
lm90_probe(struct i2c_client * client)2777 static int lm90_probe(struct i2c_client *client)
2778 {
2779 	struct device *dev = &client->dev;
2780 	struct i2c_adapter *adapter = client->adapter;
2781 	struct hwmon_channel_info *info;
2782 	struct device *hwmon_dev;
2783 	struct lm90_data *data;
2784 	int err;
2785 
2786 	err = devm_regulator_get_enable(dev, "vcc");
2787 	if (err)
2788 		return dev_err_probe(dev, err, "Failed to enable regulator\n");
2789 
2790 	data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
2791 	if (!data)
2792 		return -ENOMEM;
2793 
2794 	data->client = client;
2795 	i2c_set_clientdata(client, data);
2796 	mutex_init(&data->update_lock);
2797 	INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work);
2798 	INIT_WORK(&data->report_work, lm90_report_alarms);
2799 
2800 	/* Set the device type */
2801 	data->kind = (uintptr_t)i2c_get_match_data(client);
2802 
2803 	/*
2804 	 * Different devices have different alarm bits triggering the
2805 	 * ALERT# output
2806 	 */
2807 	data->alert_alarms = lm90_params[data->kind].alert_alarms;
2808 	data->resolution = lm90_params[data->kind].resolution ? : 11;
2809 
2810 	/* Set chip capabilities */
2811 	data->flags = lm90_params[data->kind].flags;
2812 
2813 	if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) &&
2814 	    !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC))
2815 		data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC);
2816 
2817 	if ((data->flags & LM90_HAVE_PARTIAL_PEC) &&
2818 	    !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
2819 		data->flags &= ~LM90_HAVE_PARTIAL_PEC;
2820 
2821 	data->chip.ops = &lm90_ops;
2822 	data->chip.info = data->info;
2823 
2824 	data->info[0] = &data->chip_info;
2825 	info = &data->chip_info;
2826 	info->type = hwmon_chip;
2827 	info->config = data->chip_config;
2828 
2829 	data->chip_config[0] = HWMON_C_REGISTER_TZ;
2830 	if (data->flags & LM90_HAVE_ALARMS)
2831 		data->chip_config[0] |= HWMON_C_ALARMS;
2832 	if (data->flags & LM90_HAVE_CONVRATE)
2833 		data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL;
2834 	if (data->flags & LM90_HAVE_FAULTQUEUE)
2835 		data->chip_config[0] |= HWMON_C_TEMP_SAMPLES;
2836 	if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC))
2837 		data->chip_config[0] |= HWMON_C_PEC;
2838 	data->info[1] = &data->temp_info;
2839 
2840 	info = &data->temp_info;
2841 	info->type = hwmon_temp;
2842 	info->config = data->channel_config;
2843 
2844 	data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX |
2845 		HWMON_T_MAX_ALARM;
2846 	data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX |
2847 		HWMON_T_MAX_ALARM | HWMON_T_FAULT;
2848 
2849 	if (data->flags & LM90_HAVE_LOW) {
2850 		data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2851 		data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2852 	}
2853 
2854 	if (data->flags & LM90_HAVE_CRIT) {
2855 		data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2856 		data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2857 	}
2858 
2859 	if (data->flags & LM90_HAVE_OFFSET)
2860 		data->channel_config[1] |= HWMON_T_OFFSET;
2861 
2862 	if (data->flags & LM90_HAVE_EMERGENCY) {
2863 		data->channel_config[0] |= HWMON_T_EMERGENCY |
2864 			HWMON_T_EMERGENCY_HYST;
2865 		data->channel_config[1] |= HWMON_T_EMERGENCY |
2866 			HWMON_T_EMERGENCY_HYST;
2867 	}
2868 
2869 	if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
2870 		data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
2871 		data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
2872 	}
2873 
2874 	if (data->flags & LM90_HAVE_TEMP3) {
2875 		data->channel_config[2] = HWMON_T_INPUT |
2876 			HWMON_T_MIN | HWMON_T_MAX |
2877 			HWMON_T_CRIT | HWMON_T_CRIT_HYST |
2878 			HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
2879 			HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
2880 		if (data->flags & LM90_HAVE_EMERGENCY) {
2881 			data->channel_config[2] |= HWMON_T_EMERGENCY |
2882 				HWMON_T_EMERGENCY_HYST;
2883 		}
2884 		if (data->flags & LM90_HAVE_EMERGENCY_ALARM)
2885 			data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM;
2886 		if (data->flags & LM90_HAVE_OFFSET)
2887 			data->channel_config[2] |= HWMON_T_OFFSET;
2888 	}
2889 
2890 	data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask;
2891 	data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth;
2892 	data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
2893 	if (data->flags & LM90_HAVE_REMOTE_EXT)
2894 		data->reg_remote_ext = LM90_REG_REMOTE_TEMPL;
2895 	data->reg_status2 = lm90_params[data->kind].reg_status2;
2896 
2897 	/* Set maximum conversion rate */
2898 	data->max_convrate = lm90_params[data->kind].max_convrate;
2899 
2900 	/* Parse device-tree channel information */
2901 	if (client->dev.of_node) {
2902 		err = lm90_parse_dt_channel_info(client, data);
2903 		if (err)
2904 			return err;
2905 	}
2906 
2907 	/* Initialize the LM90 chip */
2908 	err = lm90_init_client(client, data);
2909 	if (err < 0) {
2910 		dev_err(dev, "Failed to initialize device\n");
2911 		return err;
2912 	}
2913 
2914 	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
2915 							 data, &data->chip,
2916 							 NULL);
2917 	if (IS_ERR(hwmon_dev))
2918 		return PTR_ERR(hwmon_dev);
2919 
2920 	data->hwmon_dev = hwmon_dev;
2921 
2922 	if (client->irq) {
2923 		dev_dbg(dev, "IRQ: %d\n", client->irq);
2924 		err = devm_request_threaded_irq(dev, client->irq,
2925 						NULL, lm90_irq_thread,
2926 						IRQF_ONESHOT, "lm90", client);
2927 		if (err < 0) {
2928 			dev_err(dev, "cannot request IRQ %d\n", client->irq);
2929 			return err;
2930 		}
2931 	}
2932 
2933 	return 0;
2934 }
2935 
lm90_alert(struct i2c_client * client,enum i2c_alert_protocol type,unsigned int flag)2936 static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
2937 		       unsigned int flag)
2938 {
2939 	if (type != I2C_PROTOCOL_SMBUS_ALERT)
2940 		return;
2941 
2942 	if (lm90_is_tripped(client)) {
2943 		/*
2944 		 * Disable ALERT# output, because these chips don't implement
2945 		 * SMBus alert correctly; they should only hold the alert line
2946 		 * low briefly.
2947 		 */
2948 		struct lm90_data *data = i2c_get_clientdata(client);
2949 
2950 		if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
2951 		    (data->current_alarms & data->alert_alarms)) {
2952 			if (!(data->config & 0x80)) {
2953 				dev_dbg(&client->dev, "Disabling ALERT#\n");
2954 				lm90_update_confreg(data, data->config | 0x80);
2955 			}
2956 			schedule_delayed_work(&data->alert_work,
2957 				max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
2958 		}
2959 	} else {
2960 		dev_dbg(&client->dev, "Everything OK\n");
2961 	}
2962 }
2963 
lm90_suspend(struct device * dev)2964 static int lm90_suspend(struct device *dev)
2965 {
2966 	struct lm90_data *data = dev_get_drvdata(dev);
2967 	struct i2c_client *client = data->client;
2968 
2969 	if (client->irq)
2970 		disable_irq(client->irq);
2971 
2972 	return 0;
2973 }
2974 
lm90_resume(struct device * dev)2975 static int lm90_resume(struct device *dev)
2976 {
2977 	struct lm90_data *data = dev_get_drvdata(dev);
2978 	struct i2c_client *client = data->client;
2979 
2980 	if (client->irq)
2981 		enable_irq(client->irq);
2982 
2983 	return 0;
2984 }
2985 
2986 static DEFINE_SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2987 
2988 static struct i2c_driver lm90_driver = {
2989 	.class		= I2C_CLASS_HWMON,
2990 	.driver = {
2991 		.name	= "lm90",
2992 		.of_match_table = of_match_ptr(lm90_of_match),
2993 		.pm	= pm_sleep_ptr(&lm90_pm_ops),
2994 	},
2995 	.probe		= lm90_probe,
2996 	.alert		= lm90_alert,
2997 	.id_table	= lm90_id,
2998 	.detect		= lm90_detect,
2999 	.address_list	= normal_i2c,
3000 };
3001 
3002 module_i2c_driver(lm90_driver);
3003 
3004 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
3005 MODULE_DESCRIPTION("LM90/ADM1032 driver");
3006 MODULE_LICENSE("GPL");
3007