1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Loongson GPIO Support
4  *
5  * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
6  */
7 
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/module.h>
11 #include <linux/spinlock.h>
12 #include <linux/err.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/platform_device.h>
15 #include <linux/bitops.h>
16 #include <asm/types.h>
17 
18 enum loongson_gpio_mode {
19 	BIT_CTRL_MODE,
20 	BYTE_CTRL_MODE,
21 };
22 
23 struct loongson_gpio_chip_data {
24 	const char		*label;
25 	enum loongson_gpio_mode	mode;
26 	unsigned int		conf_offset;
27 	unsigned int		out_offset;
28 	unsigned int		in_offset;
29 	unsigned int		inten_offset;
30 };
31 
32 struct loongson_gpio_chip {
33 	struct gpio_chip	chip;
34 	spinlock_t		lock;
35 	void __iomem		*reg_base;
36 	const struct loongson_gpio_chip_data *chip_data;
37 };
38 
to_loongson_gpio_chip(struct gpio_chip * chip)39 static inline struct loongson_gpio_chip *to_loongson_gpio_chip(struct gpio_chip *chip)
40 {
41 	return container_of(chip, struct loongson_gpio_chip, chip);
42 }
43 
loongson_commit_direction(struct loongson_gpio_chip * lgpio,unsigned int pin,int input)44 static inline void loongson_commit_direction(struct loongson_gpio_chip *lgpio, unsigned int pin,
45 					     int input)
46 {
47 	u8 bval = input ? 1 : 0;
48 
49 	writeb(bval, lgpio->reg_base + lgpio->chip_data->conf_offset + pin);
50 }
51 
loongson_commit_level(struct loongson_gpio_chip * lgpio,unsigned int pin,int high)52 static void loongson_commit_level(struct loongson_gpio_chip *lgpio, unsigned int pin, int high)
53 {
54 	u8 bval = high ? 1 : 0;
55 
56 	writeb(bval, lgpio->reg_base + lgpio->chip_data->out_offset + pin);
57 }
58 
loongson_gpio_direction_input(struct gpio_chip * chip,unsigned int pin)59 static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned int pin)
60 {
61 	unsigned long flags;
62 	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
63 
64 	spin_lock_irqsave(&lgpio->lock, flags);
65 	loongson_commit_direction(lgpio, pin, 1);
66 	spin_unlock_irqrestore(&lgpio->lock, flags);
67 
68 	return 0;
69 }
70 
loongson_gpio_direction_output(struct gpio_chip * chip,unsigned int pin,int value)71 static int loongson_gpio_direction_output(struct gpio_chip *chip, unsigned int pin, int value)
72 {
73 	unsigned long flags;
74 	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
75 
76 	spin_lock_irqsave(&lgpio->lock, flags);
77 	loongson_commit_level(lgpio, pin, value);
78 	loongson_commit_direction(lgpio, pin, 0);
79 	spin_unlock_irqrestore(&lgpio->lock, flags);
80 
81 	return 0;
82 }
83 
loongson_gpio_get(struct gpio_chip * chip,unsigned int pin)84 static int loongson_gpio_get(struct gpio_chip *chip, unsigned int pin)
85 {
86 	u8  bval;
87 	int val;
88 	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
89 
90 	bval = readb(lgpio->reg_base + lgpio->chip_data->in_offset + pin);
91 	val = bval & 1;
92 
93 	return val;
94 }
95 
loongson_gpio_get_direction(struct gpio_chip * chip,unsigned int pin)96 static int loongson_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
97 {
98 	u8  bval;
99 	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
100 
101 	bval = readb(lgpio->reg_base + lgpio->chip_data->conf_offset + pin);
102 	if (bval & 1)
103 		return GPIO_LINE_DIRECTION_IN;
104 
105 	return GPIO_LINE_DIRECTION_OUT;
106 }
107 
loongson_gpio_set(struct gpio_chip * chip,unsigned int pin,int value)108 static void loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
109 {
110 	unsigned long flags;
111 	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
112 
113 	spin_lock_irqsave(&lgpio->lock, flags);
114 	loongson_commit_level(lgpio, pin, value);
115 	spin_unlock_irqrestore(&lgpio->lock, flags);
116 }
117 
loongson_gpio_to_irq(struct gpio_chip * chip,unsigned int offset)118 static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
119 {
120 	unsigned int u;
121 	struct platform_device *pdev = to_platform_device(chip->parent);
122 	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
123 
124 	if (lgpio->chip_data->mode == BIT_CTRL_MODE) {
125 		/* Get the register index from offset then multiply by bytes per register */
126 		u = readl(lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);
127 		u |= BIT(offset % 32);
128 		writel(u, lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);
129 	} else {
130 		writeb(1, lgpio->reg_base + lgpio->chip_data->inten_offset + offset);
131 	}
132 
133 	return platform_get_irq(pdev, offset);
134 }
135 
loongson_gpio_init(struct device * dev,struct loongson_gpio_chip * lgpio,void __iomem * reg_base)136 static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chip *lgpio,
137 			      void __iomem *reg_base)
138 {
139 	int ret;
140 
141 	lgpio->reg_base = reg_base;
142 	if (lgpio->chip_data->mode == BIT_CTRL_MODE) {
143 		ret = bgpio_init(&lgpio->chip, dev, 8,
144 				lgpio->reg_base + lgpio->chip_data->in_offset,
145 				lgpio->reg_base + lgpio->chip_data->out_offset,
146 				NULL, NULL,
147 				lgpio->reg_base + lgpio->chip_data->conf_offset,
148 				0);
149 		if (ret) {
150 			dev_err(dev, "unable to init generic GPIO\n");
151 			return ret;
152 		}
153 	} else {
154 		lgpio->chip.direction_input = loongson_gpio_direction_input;
155 		lgpio->chip.get = loongson_gpio_get;
156 		lgpio->chip.get_direction = loongson_gpio_get_direction;
157 		lgpio->chip.direction_output = loongson_gpio_direction_output;
158 		lgpio->chip.set = loongson_gpio_set;
159 		lgpio->chip.parent = dev;
160 		spin_lock_init(&lgpio->lock);
161 	}
162 
163 	lgpio->chip.label = lgpio->chip_data->label;
164 	lgpio->chip.can_sleep = false;
165 	if (lgpio->chip_data->inten_offset)
166 		lgpio->chip.to_irq = loongson_gpio_to_irq;
167 
168 	return devm_gpiochip_add_data(dev, &lgpio->chip, lgpio);
169 }
170 
loongson_gpio_probe(struct platform_device * pdev)171 static int loongson_gpio_probe(struct platform_device *pdev)
172 {
173 	void __iomem *reg_base;
174 	struct loongson_gpio_chip *lgpio;
175 	struct device *dev = &pdev->dev;
176 
177 	lgpio = devm_kzalloc(dev, sizeof(*lgpio), GFP_KERNEL);
178 	if (!lgpio)
179 		return -ENOMEM;
180 
181 	lgpio->chip_data = device_get_match_data(dev);
182 
183 	reg_base = devm_platform_ioremap_resource(pdev, 0);
184 	if (IS_ERR(reg_base))
185 		return PTR_ERR(reg_base);
186 
187 	return loongson_gpio_init(dev, lgpio, reg_base);
188 }
189 
190 static const struct loongson_gpio_chip_data loongson_gpio_ls2k_data = {
191 	.label = "ls2k_gpio",
192 	.mode = BIT_CTRL_MODE,
193 	.conf_offset = 0x0,
194 	.in_offset = 0x20,
195 	.out_offset = 0x10,
196 	.inten_offset = 0x30,
197 };
198 
199 static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data0 = {
200 	.label = "ls2k0500_gpio",
201 	.mode = BIT_CTRL_MODE,
202 	.conf_offset = 0x0,
203 	.in_offset = 0x8,
204 	.out_offset = 0x10,
205 	.inten_offset = 0xb0,
206 };
207 
208 static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data1 = {
209 	.label = "ls2k0500_gpio",
210 	.mode = BIT_CTRL_MODE,
211 	.conf_offset = 0x0,
212 	.in_offset = 0x8,
213 	.out_offset = 0x10,
214 	.inten_offset = 0x98,
215 };
216 
217 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data0 = {
218 	.label = "ls2k2000_gpio",
219 	.mode = BIT_CTRL_MODE,
220 	.conf_offset = 0x0,
221 	.in_offset = 0xc,
222 	.out_offset = 0x8,
223 };
224 
225 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data1 = {
226 	.label = "ls2k2000_gpio",
227 	.mode = BIT_CTRL_MODE,
228 	.conf_offset = 0x0,
229 	.in_offset = 0x20,
230 	.out_offset = 0x10,
231 };
232 
233 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data2 = {
234 	.label = "ls2k2000_gpio",
235 	.mode = BIT_CTRL_MODE,
236 	.conf_offset = 0x4,
237 	.in_offset = 0x8,
238 	.out_offset = 0x0,
239 };
240 
241 static const struct loongson_gpio_chip_data loongson_gpio_ls3a5000_data = {
242 	.label = "ls3a5000_gpio",
243 	.mode = BIT_CTRL_MODE,
244 	.conf_offset = 0x0,
245 	.in_offset = 0xc,
246 	.out_offset = 0x8,
247 };
248 
249 static const struct loongson_gpio_chip_data loongson_gpio_ls7a_data = {
250 	.label = "ls7a_gpio",
251 	.mode = BYTE_CTRL_MODE,
252 	.conf_offset = 0x800,
253 	.in_offset = 0xa00,
254 	.out_offset = 0x900,
255 };
256 
257 /* LS7A2000 chipset GPIO */
258 static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data0 = {
259 	.label = "ls7a2000_gpio",
260 	.mode = BYTE_CTRL_MODE,
261 	.conf_offset = 0x800,
262 	.in_offset = 0xa00,
263 	.out_offset = 0x900,
264 };
265 
266 /* LS7A2000 ACPI GPIO */
267 static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data1 = {
268 	.label = "ls7a2000_gpio",
269 	.mode = BYTE_CTRL_MODE,
270 	.conf_offset = 0x4,
271 	.in_offset = 0x8,
272 	.out_offset = 0x0,
273 };
274 
275 /* Loongson-3A6000 node GPIO */
276 static const struct loongson_gpio_chip_data loongson_gpio_ls3a6000_data = {
277 	.label = "ls3a6000_gpio",
278 	.mode = BIT_CTRL_MODE,
279 	.conf_offset = 0x0,
280 	.in_offset = 0xc,
281 	.out_offset = 0x8,
282 };
283 
284 static const struct of_device_id loongson_gpio_of_match[] = {
285 	{
286 		.compatible = "loongson,ls2k-gpio",
287 		.data = &loongson_gpio_ls2k_data,
288 	},
289 	{
290 		.compatible = "loongson,ls2k0500-gpio0",
291 		.data = &loongson_gpio_ls2k0500_data0,
292 	},
293 	{
294 		.compatible = "loongson,ls2k0500-gpio1",
295 		.data = &loongson_gpio_ls2k0500_data1,
296 	},
297 	{
298 		.compatible = "loongson,ls2k2000-gpio0",
299 		.data = &loongson_gpio_ls2k2000_data0,
300 	},
301 	{
302 		.compatible = "loongson,ls2k2000-gpio1",
303 		.data = &loongson_gpio_ls2k2000_data1,
304 	},
305 	{
306 		.compatible = "loongson,ls2k2000-gpio2",
307 		.data = &loongson_gpio_ls2k2000_data2,
308 	},
309 	{
310 		.compatible = "loongson,ls3a5000-gpio",
311 		.data = &loongson_gpio_ls3a5000_data,
312 	},
313 	{
314 		.compatible = "loongson,ls7a-gpio",
315 		.data = &loongson_gpio_ls7a_data,
316 	},
317 	{
318 		.compatible = "loongson,ls7a2000-gpio1",
319 		.data = &loongson_gpio_ls7a2000_data0,
320 	},
321 	{
322 		.compatible = "loongson,ls7a2000-gpio2",
323 		.data = &loongson_gpio_ls7a2000_data1,
324 	},
325 	{
326 		.compatible = "loongson,ls3a6000-gpio",
327 		.data = &loongson_gpio_ls3a6000_data,
328 	},
329 	{}
330 };
331 MODULE_DEVICE_TABLE(of, loongson_gpio_of_match);
332 
333 static const struct acpi_device_id loongson_gpio_acpi_match[] = {
334 	{
335 		.id = "LOON0002",
336 		.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a_data,
337 	},
338 	{
339 		.id = "LOON0007",
340 		.driver_data = (kernel_ulong_t)&loongson_gpio_ls3a5000_data,
341 	},
342 	{
343 		.id = "LOON000A",
344 		.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data0,
345 	},
346 	{
347 		.id = "LOON000B",
348 		.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data1,
349 	},
350 	{
351 		.id = "LOON000C",
352 		.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data2,
353 	},
354 	{
355 		.id = "LOON000D",
356 		.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data0,
357 	},
358 	{
359 		.id = "LOON000E",
360 		.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data1,
361 	},
362 	{
363 		.id = "LOON000F",
364 		.driver_data = (kernel_ulong_t)&loongson_gpio_ls3a6000_data,
365 	},
366 	{}
367 };
368 MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match);
369 
370 static struct platform_driver loongson_gpio_driver = {
371 	.driver = {
372 		.name = "loongson-gpio",
373 		.of_match_table = loongson_gpio_of_match,
374 		.acpi_match_table = loongson_gpio_acpi_match,
375 	},
376 	.probe = loongson_gpio_probe,
377 };
378 
loongson_gpio_setup(void)379 static int __init loongson_gpio_setup(void)
380 {
381 	return platform_driver_register(&loongson_gpio_driver);
382 }
383 postcore_initcall(loongson_gpio_setup);
384 
385 MODULE_DESCRIPTION("Loongson gpio driver");
386 MODULE_LICENSE("GPL");
387