1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Intel La Jolla Cove Adapter USB-GPIO driver
4 *
5 * Copyright (c) 2023, Intel Corporation.
6 */
7
8 #include <linux/acpi.h>
9 #include <linux/auxiliary_bus.h>
10 #include <linux/bitfield.h>
11 #include <linux/bitops.h>
12 #include <linux/dev_printk.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/irq.h>
15 #include <linux/kernel.h>
16 #include <linux/kref.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/types.h>
20 #include <linux/usb/ljca.h>
21
22 /* GPIO commands */
23 #define LJCA_GPIO_CONFIG 1
24 #define LJCA_GPIO_READ 2
25 #define LJCA_GPIO_WRITE 3
26 #define LJCA_GPIO_INT_EVENT 4
27 #define LJCA_GPIO_INT_MASK 5
28 #define LJCA_GPIO_INT_UNMASK 6
29
30 #define LJCA_GPIO_CONF_DISABLE BIT(0)
31 #define LJCA_GPIO_CONF_INPUT BIT(1)
32 #define LJCA_GPIO_CONF_OUTPUT BIT(2)
33 #define LJCA_GPIO_CONF_PULLUP BIT(3)
34 #define LJCA_GPIO_CONF_PULLDOWN BIT(4)
35 #define LJCA_GPIO_CONF_DEFAULT BIT(5)
36 #define LJCA_GPIO_CONF_INTERRUPT BIT(6)
37 #define LJCA_GPIO_INT_TYPE BIT(7)
38
39 #define LJCA_GPIO_CONF_EDGE FIELD_PREP(LJCA_GPIO_INT_TYPE, 1)
40 #define LJCA_GPIO_CONF_LEVEL FIELD_PREP(LJCA_GPIO_INT_TYPE, 0)
41
42 /* Intentional overlap with PULLUP / PULLDOWN */
43 #define LJCA_GPIO_CONF_SET BIT(3)
44 #define LJCA_GPIO_CONF_CLR BIT(4)
45
46 #define LJCA_GPIO_BUF_SIZE 60u
47
48 struct ljca_gpio_op {
49 u8 index;
50 u8 value;
51 } __packed;
52
53 struct ljca_gpio_packet {
54 u8 num;
55 struct ljca_gpio_op item[] __counted_by(num);
56 } __packed;
57
58 struct ljca_gpio_dev {
59 struct ljca_client *ljca;
60 struct gpio_chip gc;
61 struct ljca_gpio_info *gpio_info;
62 DECLARE_BITMAP(unmasked_irqs, LJCA_MAX_GPIO_NUM);
63 DECLARE_BITMAP(enabled_irqs, LJCA_MAX_GPIO_NUM);
64 DECLARE_BITMAP(reenable_irqs, LJCA_MAX_GPIO_NUM);
65 DECLARE_BITMAP(output_enabled, LJCA_MAX_GPIO_NUM);
66 u8 *connect_mode;
67 /* protect irq bus */
68 struct mutex irq_lock;
69 struct work_struct work;
70 /* protect package transfer to hardware */
71 struct mutex trans_lock;
72
73 u8 obuf[LJCA_GPIO_BUF_SIZE];
74 u8 ibuf[LJCA_GPIO_BUF_SIZE];
75 };
76
ljca_gpio_config(struct ljca_gpio_dev * ljca_gpio,u8 gpio_id,u8 config)77 static int ljca_gpio_config(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id,
78 u8 config)
79 {
80 struct ljca_gpio_packet *packet =
81 (struct ljca_gpio_packet *)ljca_gpio->obuf;
82 int ret;
83
84 mutex_lock(&ljca_gpio->trans_lock);
85 packet->num = 1;
86 packet->item[0].index = gpio_id;
87 packet->item[0].value = config | ljca_gpio->connect_mode[gpio_id];
88
89 ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_CONFIG, (u8 *)packet,
90 struct_size(packet, item, packet->num), NULL, 0);
91 mutex_unlock(&ljca_gpio->trans_lock);
92
93 return ret < 0 ? ret : 0;
94 }
95
ljca_gpio_read(struct ljca_gpio_dev * ljca_gpio,u8 gpio_id)96 static int ljca_gpio_read(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id)
97 {
98 struct ljca_gpio_packet *ack_packet =
99 (struct ljca_gpio_packet *)ljca_gpio->ibuf;
100 struct ljca_gpio_packet *packet =
101 (struct ljca_gpio_packet *)ljca_gpio->obuf;
102 int ret;
103
104 mutex_lock(&ljca_gpio->trans_lock);
105 packet->num = 1;
106 packet->item[0].index = gpio_id;
107 ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_READ, (u8 *)packet,
108 struct_size(packet, item, packet->num),
109 ljca_gpio->ibuf, LJCA_GPIO_BUF_SIZE);
110
111 if (ret <= 0 || ack_packet->num != packet->num) {
112 dev_err(&ljca_gpio->ljca->auxdev.dev,
113 "read package error, gpio_id: %u num: %u ret: %d\n",
114 gpio_id, ack_packet->num, ret);
115 ret = ret < 0 ? ret : -EIO;
116 }
117 mutex_unlock(&ljca_gpio->trans_lock);
118
119 return ret < 0 ? ret : ack_packet->item[0].value > 0;
120 }
121
ljca_gpio_write(struct ljca_gpio_dev * ljca_gpio,u8 gpio_id,int value)122 static int ljca_gpio_write(struct ljca_gpio_dev *ljca_gpio, u8 gpio_id, int value)
123 {
124 struct ljca_gpio_packet *packet =
125 (struct ljca_gpio_packet *)ljca_gpio->obuf;
126 int ret;
127
128 mutex_lock(&ljca_gpio->trans_lock);
129 packet->num = 1;
130 packet->item[0].index = gpio_id;
131 packet->item[0].value = value & 1;
132
133 ret = ljca_transfer(ljca_gpio->ljca, LJCA_GPIO_WRITE, (u8 *)packet,
134 struct_size(packet, item, packet->num), NULL, 0);
135 mutex_unlock(&ljca_gpio->trans_lock);
136
137 return ret < 0 ? ret : 0;
138 }
139
ljca_gpio_get_value(struct gpio_chip * chip,unsigned int offset)140 static int ljca_gpio_get_value(struct gpio_chip *chip, unsigned int offset)
141 {
142 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
143
144 return ljca_gpio_read(ljca_gpio, offset);
145 }
146
ljca_gpio_set_value(struct gpio_chip * chip,unsigned int offset,int val)147 static int ljca_gpio_set_value(struct gpio_chip *chip, unsigned int offset,
148 int val)
149 {
150 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
151 int ret;
152
153 ret = ljca_gpio_write(ljca_gpio, offset, val);
154 if (ret)
155 dev_err(chip->parent,
156 "set value failed offset: %u val: %d ret: %d\n",
157 offset, val, ret);
158
159 return ret;
160 }
161
ljca_gpio_direction_input(struct gpio_chip * chip,unsigned int offset)162 static int ljca_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
163 {
164 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
165 u8 config = LJCA_GPIO_CONF_INPUT | LJCA_GPIO_CONF_CLR;
166 int ret;
167
168 ret = ljca_gpio_config(ljca_gpio, offset, config);
169 if (ret)
170 return ret;
171
172 clear_bit(offset, ljca_gpio->output_enabled);
173
174 return 0;
175 }
176
ljca_gpio_direction_output(struct gpio_chip * chip,unsigned int offset,int val)177 static int ljca_gpio_direction_output(struct gpio_chip *chip,
178 unsigned int offset, int val)
179 {
180 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
181 u8 config = LJCA_GPIO_CONF_OUTPUT | LJCA_GPIO_CONF_CLR;
182 int ret;
183
184 ret = ljca_gpio_config(ljca_gpio, offset, config);
185 if (ret)
186 return ret;
187
188 ret = ljca_gpio_set_value(chip, offset, val);
189 if (ret)
190 return ret;
191
192 set_bit(offset, ljca_gpio->output_enabled);
193
194 return 0;
195 }
196
ljca_gpio_get_direction(struct gpio_chip * chip,unsigned int offset)197 static int ljca_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
198 {
199 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
200
201 if (test_bit(offset, ljca_gpio->output_enabled))
202 return GPIO_LINE_DIRECTION_OUT;
203
204 return GPIO_LINE_DIRECTION_IN;
205 }
206
ljca_gpio_set_config(struct gpio_chip * chip,unsigned int offset,unsigned long config)207 static int ljca_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
208 unsigned long config)
209 {
210 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
211
212 ljca_gpio->connect_mode[offset] = 0;
213 switch (pinconf_to_config_param(config)) {
214 case PIN_CONFIG_BIAS_PULL_UP:
215 ljca_gpio->connect_mode[offset] |= LJCA_GPIO_CONF_PULLUP;
216 break;
217 case PIN_CONFIG_BIAS_PULL_DOWN:
218 ljca_gpio->connect_mode[offset] |= LJCA_GPIO_CONF_PULLDOWN;
219 break;
220 case PIN_CONFIG_DRIVE_PUSH_PULL:
221 case PIN_CONFIG_PERSIST_STATE:
222 break;
223 default:
224 return -ENOTSUPP;
225 }
226
227 return 0;
228 }
229
ljca_gpio_init_valid_mask(struct gpio_chip * chip,unsigned long * valid_mask,unsigned int ngpios)230 static int ljca_gpio_init_valid_mask(struct gpio_chip *chip,
231 unsigned long *valid_mask,
232 unsigned int ngpios)
233 {
234 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);
235
236 WARN_ON_ONCE(ngpios != ljca_gpio->gpio_info->num);
237 bitmap_copy(valid_mask, ljca_gpio->gpio_info->valid_pin_map, ngpios);
238
239 return 0;
240 }
241
ljca_gpio_irq_init_valid_mask(struct gpio_chip * chip,unsigned long * valid_mask,unsigned int ngpios)242 static void ljca_gpio_irq_init_valid_mask(struct gpio_chip *chip,
243 unsigned long *valid_mask,
244 unsigned int ngpios)
245 {
246 ljca_gpio_init_valid_mask(chip, valid_mask, ngpios);
247 }
248
ljca_enable_irq(struct ljca_gpio_dev * ljca_gpio,int gpio_id,bool enable)249 static int ljca_enable_irq(struct ljca_gpio_dev *ljca_gpio, int gpio_id,
250 bool enable)
251 {
252 struct ljca_gpio_packet *packet =
253 (struct ljca_gpio_packet *)ljca_gpio->obuf;
254 int ret;
255
256 mutex_lock(&ljca_gpio->trans_lock);
257 packet->num = 1;
258 packet->item[0].index = gpio_id;
259 packet->item[0].value = 0;
260
261 ret = ljca_transfer(ljca_gpio->ljca,
262 enable ? LJCA_GPIO_INT_UNMASK : LJCA_GPIO_INT_MASK,
263 (u8 *)packet, struct_size(packet, item, packet->num),
264 NULL, 0);
265 mutex_unlock(&ljca_gpio->trans_lock);
266
267 return ret < 0 ? ret : 0;
268 }
269
ljca_gpio_async(struct work_struct * work)270 static void ljca_gpio_async(struct work_struct *work)
271 {
272 struct ljca_gpio_dev *ljca_gpio =
273 container_of(work, struct ljca_gpio_dev, work);
274 int gpio_id, unmasked;
275
276 for_each_set_bit(gpio_id, ljca_gpio->reenable_irqs, ljca_gpio->gc.ngpio) {
277 clear_bit(gpio_id, ljca_gpio->reenable_irqs);
278 unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs);
279 if (unmasked)
280 ljca_enable_irq(ljca_gpio, gpio_id, true);
281 }
282 }
283
ljca_gpio_event_cb(void * context,u8 cmd,const void * evt_data,int len)284 static void ljca_gpio_event_cb(void *context, u8 cmd, const void *evt_data,
285 int len)
286 {
287 const struct ljca_gpio_packet *packet = evt_data;
288 struct ljca_gpio_dev *ljca_gpio = context;
289 int i;
290
291 if (cmd != LJCA_GPIO_INT_EVENT)
292 return;
293
294 for (i = 0; i < packet->num; i++) {
295 generic_handle_domain_irq(ljca_gpio->gc.irq.domain,
296 packet->item[i].index);
297 set_bit(packet->item[i].index, ljca_gpio->reenable_irqs);
298 }
299
300 schedule_work(&ljca_gpio->work);
301 }
302
ljca_irq_unmask(struct irq_data * irqd)303 static void ljca_irq_unmask(struct irq_data *irqd)
304 {
305 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
306 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
307 int gpio_id = irqd_to_hwirq(irqd);
308
309 gpiochip_enable_irq(gc, gpio_id);
310 set_bit(gpio_id, ljca_gpio->unmasked_irqs);
311 }
312
ljca_irq_mask(struct irq_data * irqd)313 static void ljca_irq_mask(struct irq_data *irqd)
314 {
315 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
316 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
317 int gpio_id = irqd_to_hwirq(irqd);
318
319 clear_bit(gpio_id, ljca_gpio->unmasked_irqs);
320 gpiochip_disable_irq(gc, gpio_id);
321 }
322
ljca_irq_set_type(struct irq_data * irqd,unsigned int type)323 static int ljca_irq_set_type(struct irq_data *irqd, unsigned int type)
324 {
325 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
326 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
327 int gpio_id = irqd_to_hwirq(irqd);
328
329 ljca_gpio->connect_mode[gpio_id] = LJCA_GPIO_CONF_INTERRUPT;
330 switch (type) {
331 case IRQ_TYPE_LEVEL_HIGH:
332 ljca_gpio->connect_mode[gpio_id] |=
333 (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLUP);
334 break;
335 case IRQ_TYPE_LEVEL_LOW:
336 ljca_gpio->connect_mode[gpio_id] |=
337 (LJCA_GPIO_CONF_LEVEL | LJCA_GPIO_CONF_PULLDOWN);
338 break;
339 case IRQ_TYPE_EDGE_BOTH:
340 break;
341 case IRQ_TYPE_EDGE_RISING:
342 ljca_gpio->connect_mode[gpio_id] |=
343 (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLUP);
344 break;
345 case IRQ_TYPE_EDGE_FALLING:
346 ljca_gpio->connect_mode[gpio_id] |=
347 (LJCA_GPIO_CONF_EDGE | LJCA_GPIO_CONF_PULLDOWN);
348 break;
349 default:
350 return -EINVAL;
351 }
352
353 return 0;
354 }
355
ljca_irq_bus_lock(struct irq_data * irqd)356 static void ljca_irq_bus_lock(struct irq_data *irqd)
357 {
358 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
359 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
360
361 mutex_lock(&ljca_gpio->irq_lock);
362 }
363
ljca_irq_bus_unlock(struct irq_data * irqd)364 static void ljca_irq_bus_unlock(struct irq_data *irqd)
365 {
366 struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
367 struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(gc);
368 int gpio_id = irqd_to_hwirq(irqd);
369 int enabled, unmasked;
370
371 enabled = test_bit(gpio_id, ljca_gpio->enabled_irqs);
372 unmasked = test_bit(gpio_id, ljca_gpio->unmasked_irqs);
373
374 if (enabled != unmasked) {
375 if (unmasked) {
376 ljca_gpio_config(ljca_gpio, gpio_id, 0);
377 ljca_enable_irq(ljca_gpio, gpio_id, true);
378 set_bit(gpio_id, ljca_gpio->enabled_irqs);
379 } else {
380 ljca_enable_irq(ljca_gpio, gpio_id, false);
381 clear_bit(gpio_id, ljca_gpio->enabled_irqs);
382 }
383 }
384
385 mutex_unlock(&ljca_gpio->irq_lock);
386 }
387
388 static const struct irq_chip ljca_gpio_irqchip = {
389 .name = "ljca-irq",
390 .irq_mask = ljca_irq_mask,
391 .irq_unmask = ljca_irq_unmask,
392 .irq_set_type = ljca_irq_set_type,
393 .irq_bus_lock = ljca_irq_bus_lock,
394 .irq_bus_sync_unlock = ljca_irq_bus_unlock,
395 .flags = IRQCHIP_IMMUTABLE,
396 GPIOCHIP_IRQ_RESOURCE_HELPERS,
397 };
398
ljca_gpio_probe(struct auxiliary_device * auxdev,const struct auxiliary_device_id * aux_dev_id)399 static int ljca_gpio_probe(struct auxiliary_device *auxdev,
400 const struct auxiliary_device_id *aux_dev_id)
401 {
402 struct ljca_client *ljca = auxiliary_dev_to_ljca_client(auxdev);
403 struct ljca_gpio_dev *ljca_gpio;
404 struct gpio_irq_chip *girq;
405 int ret;
406
407 ljca_gpio = devm_kzalloc(&auxdev->dev, sizeof(*ljca_gpio), GFP_KERNEL);
408 if (!ljca_gpio)
409 return -ENOMEM;
410
411 ljca_gpio->ljca = ljca;
412 ljca_gpio->gpio_info = dev_get_platdata(&auxdev->dev);
413 ljca_gpio->connect_mode = devm_kcalloc(&auxdev->dev,
414 ljca_gpio->gpio_info->num,
415 sizeof(*ljca_gpio->connect_mode),
416 GFP_KERNEL);
417 if (!ljca_gpio->connect_mode)
418 return -ENOMEM;
419
420 ret = devm_mutex_init(&auxdev->dev, &ljca_gpio->irq_lock);
421 if (ret)
422 return ret;
423
424 ret = devm_mutex_init(&auxdev->dev, &ljca_gpio->trans_lock);
425 if (ret)
426 return ret;
427
428 ljca_gpio->gc.direction_input = ljca_gpio_direction_input;
429 ljca_gpio->gc.direction_output = ljca_gpio_direction_output;
430 ljca_gpio->gc.get_direction = ljca_gpio_get_direction;
431 ljca_gpio->gc.get = ljca_gpio_get_value;
432 ljca_gpio->gc.set = ljca_gpio_set_value;
433 ljca_gpio->gc.set_config = ljca_gpio_set_config;
434 ljca_gpio->gc.init_valid_mask = ljca_gpio_init_valid_mask;
435 ljca_gpio->gc.can_sleep = true;
436 ljca_gpio->gc.parent = &auxdev->dev;
437
438 ljca_gpio->gc.base = -1;
439 ljca_gpio->gc.ngpio = ljca_gpio->gpio_info->num;
440 ljca_gpio->gc.label = ACPI_COMPANION(&auxdev->dev) ?
441 acpi_dev_name(ACPI_COMPANION(&auxdev->dev)) :
442 dev_name(&auxdev->dev);
443 ljca_gpio->gc.owner = THIS_MODULE;
444
445 auxiliary_set_drvdata(auxdev, ljca_gpio);
446 ljca_register_event_cb(ljca, ljca_gpio_event_cb, ljca_gpio);
447
448 girq = &ljca_gpio->gc.irq;
449 gpio_irq_chip_set_chip(girq, &ljca_gpio_irqchip);
450 girq->parent_handler = NULL;
451 girq->num_parents = 0;
452 girq->parents = NULL;
453 girq->default_type = IRQ_TYPE_NONE;
454 girq->handler = handle_simple_irq;
455 girq->init_valid_mask = ljca_gpio_irq_init_valid_mask;
456
457 INIT_WORK(&ljca_gpio->work, ljca_gpio_async);
458 ret = gpiochip_add_data(&ljca_gpio->gc, ljca_gpio);
459 if (ret)
460 ljca_unregister_event_cb(ljca);
461
462 return ret;
463 }
464
ljca_gpio_remove(struct auxiliary_device * auxdev)465 static void ljca_gpio_remove(struct auxiliary_device *auxdev)
466 {
467 struct ljca_gpio_dev *ljca_gpio = auxiliary_get_drvdata(auxdev);
468
469 gpiochip_remove(&ljca_gpio->gc);
470 ljca_unregister_event_cb(ljca_gpio->ljca);
471 cancel_work_sync(&ljca_gpio->work);
472 }
473
474 static const struct auxiliary_device_id ljca_gpio_id_table[] = {
475 { "usb_ljca.ljca-gpio", 0 },
476 { /* sentinel */ },
477 };
478 MODULE_DEVICE_TABLE(auxiliary, ljca_gpio_id_table);
479
480 static struct auxiliary_driver ljca_gpio_driver = {
481 .probe = ljca_gpio_probe,
482 .remove = ljca_gpio_remove,
483 .id_table = ljca_gpio_id_table,
484 };
485 module_auxiliary_driver(ljca_gpio_driver);
486
487 MODULE_AUTHOR("Wentong Wu <wentong.wu@intel.com>");
488 MODULE_AUTHOR("Zhifeng Wang <zhifeng.wang@intel.com>");
489 MODULE_AUTHOR("Lixu Zhang <lixu.zhang@intel.com>");
490 MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB-GPIO driver");
491 MODULE_LICENSE("GPL");
492 MODULE_IMPORT_NS("LJCA");
493