1 /*-
2 * Copyright (c) 2009 Yahoo! Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */
28
29 /* TODO Move headers to mprvar */
30 #include <sys/types.h>
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/module.h>
35 #include <sys/bus.h>
36 #include <sys/conf.h>
37 #include <sys/malloc.h>
38 #include <sys/sysctl.h>
39 #include <sys/uio.h>
40
41 #include <machine/bus.h>
42 #include <machine/resource.h>
43 #include <sys/rman.h>
44
45 #include <dev/pci/pcireg.h>
46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pci_private.h>
48
49 #include <dev/mpr/mpi/mpi2_type.h>
50 #include <dev/mpr/mpi/mpi2.h>
51 #include <dev/mpr/mpi/mpi2_ioc.h>
52 #include <dev/mpr/mpi/mpi2_cnfg.h>
53 #include <dev/mpr/mpi/mpi2_tool.h>
54 #include <dev/mpr/mpi/mpi2_pci.h>
55
56 #include <sys/queue.h>
57 #include <sys/kthread.h>
58 #include <dev/mpr/mpr_ioctl.h>
59 #include <dev/mpr/mprvar.h>
60
61 static int mpr_pci_probe(device_t);
62 static int mpr_pci_attach(device_t);
63 static int mpr_pci_detach(device_t);
64 static int mpr_pci_suspend(device_t);
65 static int mpr_pci_resume(device_t);
66 static void mpr_pci_free(struct mpr_softc *);
67 static int mpr_alloc_msix(struct mpr_softc *sc, int msgs);
68 static int mpr_alloc_msi(struct mpr_softc *sc, int msgs);
69 static int mpr_pci_alloc_interrupts(struct mpr_softc *sc);
70
71 static device_method_t mpr_methods[] = {
72 DEVMETHOD(device_probe, mpr_pci_probe),
73 DEVMETHOD(device_attach, mpr_pci_attach),
74 DEVMETHOD(device_detach, mpr_pci_detach),
75 DEVMETHOD(device_suspend, mpr_pci_suspend),
76 DEVMETHOD(device_resume, mpr_pci_resume),
77 DEVMETHOD(bus_print_child, bus_generic_print_child),
78 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
79 DEVMETHOD_END
80 };
81
82 static driver_t mpr_pci_driver = {
83 "mpr",
84 mpr_methods,
85 sizeof(struct mpr_softc)
86 };
87
88 struct mpr_ident {
89 uint16_t vendor;
90 uint16_t device;
91 uint16_t subvendor;
92 uint16_t subdevice;
93 u_int flags;
94 const char *desc;
95 } mpr_identifiers[] = {
96 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004,
97 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" },
98 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008,
99 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" },
100 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1,
101 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" },
102 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2,
103 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" },
104 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5,
105 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" },
106 { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6,
107 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" },
108 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216,
109 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" },
110 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224,
111 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" },
112 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1,
113 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" },
114 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2,
115 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" },
116 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1,
117 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" },
118 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2,
119 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" },
120 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408,
121 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
122 "Avago Technologies (LSI) SAS3408" },
123 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416,
124 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
125 "Avago Technologies (LSI) SAS3416" },
126 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508,
127 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
128 "Avago Technologies (LSI) SAS3508" },
129 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1,
130 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
131 "Avago Technologies (LSI) SAS3508_1" },
132 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516,
133 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
134 "Avago Technologies (LSI) SAS3516" },
135 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1,
136 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
137 "Avago Technologies (LSI) SAS3516_1" },
138 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616,
139 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
140 "Avago Technologies (LSI) SAS3616" },
141 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708,
142 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
143 "Avago Technologies (LSI) SAS3708" },
144 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716,
145 0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
146 "Avago Technologies (LSI) SAS3716" },
147 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3816,
148 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
149 "Broadcom Inc. (LSI) INVALID0 SAS3816" },
150 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816,
151 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
152 "Broadcom Inc. (LSI) CFG SEC SAS3816" },
153 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3816,
154 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
155 "Broadcom Inc. (LSI) HARD SEC SAS3816" },
156 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3816,
157 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
158 "Broadcom Inc. (LSI) INVALID1 SAS3816" },
159 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3916,
160 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
161 "Broadcom Inc. (LSI) INVALID0 SAS3916" },
162 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916,
163 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
164 "Broadcom Inc. (LSI) CFG SEC SAS3916" },
165 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3916,
166 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
167 "Broadcom Inc. (LSI) HARD SEC SAS3916" },
168 { MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3916,
169 0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
170 "Broadcom Inc. (LSI) INVALID1 SAS3916" },
171 { 0, 0, 0, 0, 0, NULL }
172 };
173
174 DRIVER_MODULE(mpr, pci, mpr_pci_driver, 0, 0);
175 MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice;D:#", pci,
176 mpr, mpr_identifiers, nitems(mpr_identifiers) - 1);
177
178 MODULE_DEPEND(mpr, cam, 1, 1, 1);
179
180 static struct mpr_ident *
mpr_find_ident(device_t dev)181 mpr_find_ident(device_t dev)
182 {
183 struct mpr_ident *m;
184
185 for (m = mpr_identifiers; m->vendor != 0; m++) {
186 if (m->vendor != pci_get_vendor(dev))
187 continue;
188 if (m->device != pci_get_device(dev))
189 continue;
190 if ((m->subvendor != 0xffff) &&
191 (m->subvendor != pci_get_subvendor(dev)))
192 continue;
193 if ((m->subdevice != 0xffff) &&
194 (m->subdevice != pci_get_subdevice(dev)))
195 continue;
196 return (m);
197 }
198
199 return (NULL);
200 }
201
202 static int
mpr_pci_probe(device_t dev)203 mpr_pci_probe(device_t dev)
204 {
205 struct mpr_ident *id;
206
207 if ((id = mpr_find_ident(dev)) != NULL) {
208 device_set_desc(dev, id->desc);
209 return (BUS_PROBE_DEFAULT);
210 }
211 return (ENXIO);
212 }
213
214 static int
mpr_pci_attach(device_t dev)215 mpr_pci_attach(device_t dev)
216 {
217 bus_dma_template_t t;
218 struct mpr_softc *sc;
219 struct mpr_ident *m;
220 int error, i;
221
222 sc = device_get_softc(dev);
223 bzero(sc, sizeof(*sc));
224 sc->mpr_dev = dev;
225 m = mpr_find_ident(dev);
226 sc->mpr_flags = m->flags;
227
228 switch (m->device) {
229 case MPI26_MFGPAGE_DEVID_INVALID0_SAS3816:
230 case MPI26_MFGPAGE_DEVID_INVALID1_SAS3816:
231 case MPI26_MFGPAGE_DEVID_INVALID0_SAS3916:
232 case MPI26_MFGPAGE_DEVID_INVALID1_SAS3916:
233 mpr_printf(sc, "HBA is in Non Secure mode\n");
234 return (ENXIO);
235 case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816:
236 case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916:
237 mpr_printf(sc, "HBA is in Configurable Secure mode\n");
238 break;
239 default:
240 break;
241 }
242
243 mpr_get_tunables(sc);
244
245 /* Twiddle basic PCI config bits for a sanity check */
246 pci_enable_busmaster(dev);
247
248 for (i = 0; i < PCI_MAXMAPS_0; i++) {
249 sc->mpr_regs_rid = PCIR_BAR(i);
250
251 if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev,
252 SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL)
253 break;
254 }
255
256 if (sc->mpr_regs_resource == NULL) {
257 mpr_printf(sc, "Cannot allocate PCI registers\n");
258 return (ENXIO);
259 }
260
261 sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource);
262 sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource);
263
264 /* Allocate the parent DMA tag */
265 bus_dma_template_init(&t, bus_get_dma_tag(dev));
266 if (bus_dma_template_tag(&t, &sc->mpr_parent_dmat)) {
267 mpr_printf(sc, "Cannot allocate parent DMA tag\n");
268 mpr_pci_free(sc);
269 return (ENOMEM);
270 }
271
272 if (((error = mpr_pci_alloc_interrupts(sc)) != 0) ||
273 ((error = mpr_attach(sc)) != 0))
274 mpr_pci_free(sc);
275
276 return (error);
277 }
278
279 /*
280 * Allocate, but don't assign interrupts early. Doing it before requesting
281 * the IOCFacts message informs the firmware that we want to do MSI-X
282 * multiqueue. We might not use all of the available messages, but there's
283 * no reason to re-alloc if we don't.
284 */
285 int
mpr_pci_alloc_interrupts(struct mpr_softc * sc)286 mpr_pci_alloc_interrupts(struct mpr_softc *sc)
287 {
288 device_t dev;
289 int error, msgs;
290
291 dev = sc->mpr_dev;
292 error = 0;
293 msgs = 0;
294
295 if (sc->disable_msix == 0) {
296 msgs = pci_msix_count(dev);
297 mpr_dprint(sc, MPR_INIT, "Counted %d MSI-X messages\n", msgs);
298 msgs = min(msgs, sc->max_msix);
299 msgs = min(msgs, MPR_MSIX_MAX);
300 msgs = min(msgs, 1); /* XXX */
301 if (msgs != 0) {
302 mpr_dprint(sc, MPR_INIT, "Attempting to allocate %d "
303 "MSI-X messages\n", msgs);
304 error = mpr_alloc_msix(sc, msgs);
305 }
306 }
307 if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) {
308 msgs = pci_msi_count(dev);
309 mpr_dprint(sc, MPR_INIT, "Counted %d MSI messages\n", msgs);
310 msgs = min(msgs, MPR_MSI_MAX);
311 if (msgs != 0) {
312 mpr_dprint(sc, MPR_INIT, "Attempting to allocated %d "
313 "MSI messages\n", MPR_MSI_MAX);
314 error = mpr_alloc_msi(sc, MPR_MSI_MAX);
315 }
316 }
317 if ((error != 0) || (msgs == 0)) {
318 /*
319 * If neither MSI or MSI-X are available, assume legacy INTx.
320 * This also implies that there will be only 1 queue.
321 */
322 mpr_dprint(sc, MPR_INIT, "Falling back to legacy INTx\n");
323 sc->mpr_flags |= MPR_FLAGS_INTX;
324 msgs = 1;
325 } else
326 sc->mpr_flags |= MPR_FLAGS_MSI;
327
328 sc->msi_msgs = msgs;
329 mpr_dprint(sc, MPR_INIT, "Allocated %d interrupts\n", msgs);
330
331 return (error);
332 }
333
334 int
mpr_pci_setup_interrupts(struct mpr_softc * sc)335 mpr_pci_setup_interrupts(struct mpr_softc *sc)
336 {
337 device_t dev;
338 struct mpr_queue *q;
339 void *ihandler;
340 int i, error, rid, initial_rid;
341
342 dev = sc->mpr_dev;
343 error = ENXIO;
344
345 if (sc->mpr_flags & MPR_FLAGS_INTX) {
346 initial_rid = 0;
347 ihandler = mpr_intr;
348 } else if (sc->mpr_flags & MPR_FLAGS_MSI) {
349 initial_rid = 1;
350 ihandler = mpr_intr_msi;
351 } else {
352 mpr_dprint(sc, MPR_ERROR|MPR_INIT,
353 "Unable to set up interrupts\n");
354 return (EINVAL);
355 }
356
357 for (i = 0; i < sc->msi_msgs; i++) {
358 q = &sc->queues[i];
359 rid = i + initial_rid;
360 q->irq_rid = rid;
361 q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
362 &q->irq_rid, RF_ACTIVE);
363 if (q->irq == NULL) {
364 mpr_dprint(sc, MPR_ERROR|MPR_INIT,
365 "Cannot allocate interrupt RID %d\n", rid);
366 sc->msi_msgs = i;
367 break;
368 }
369 error = bus_setup_intr(dev, q->irq,
370 INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler,
371 sc, &q->intrhand);
372 if (error) {
373 mpr_dprint(sc, MPR_ERROR|MPR_INIT,
374 "Cannot setup interrupt RID %d\n", rid);
375 sc->msi_msgs = i;
376 break;
377 }
378 }
379
380 mpr_dprint(sc, MPR_INIT, "Set up %d interrupts\n", sc->msi_msgs);
381 return (error);
382 }
383
384 static int
mpr_pci_detach(device_t dev)385 mpr_pci_detach(device_t dev)
386 {
387 struct mpr_softc *sc;
388 int error;
389
390 sc = device_get_softc(dev);
391
392 if ((error = mpr_free(sc)) != 0)
393 return (error);
394
395 mpr_pci_free(sc);
396 return (0);
397 }
398
399 void
mpr_pci_free_interrupts(struct mpr_softc * sc)400 mpr_pci_free_interrupts(struct mpr_softc *sc)
401 {
402 struct mpr_queue *q;
403 int i;
404
405 if (sc->queues == NULL)
406 return;
407
408 for (i = 0; i < sc->msi_msgs; i++) {
409 q = &sc->queues[i];
410 if (q->irq != NULL) {
411 bus_teardown_intr(sc->mpr_dev, q->irq,
412 q->intrhand);
413 bus_release_resource(sc->mpr_dev, SYS_RES_IRQ,
414 q->irq_rid, q->irq);
415 }
416 }
417 }
418
419 static void
mpr_pci_free(struct mpr_softc * sc)420 mpr_pci_free(struct mpr_softc *sc)
421 {
422
423 if (sc->mpr_parent_dmat != NULL) {
424 bus_dma_tag_destroy(sc->mpr_parent_dmat);
425 }
426
427 mpr_pci_free_interrupts(sc);
428
429 if (sc->mpr_flags & MPR_FLAGS_MSI)
430 pci_release_msi(sc->mpr_dev);
431
432 if (sc->mpr_regs_resource != NULL) {
433 bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY,
434 sc->mpr_regs_rid, sc->mpr_regs_resource);
435 }
436
437 return;
438 }
439
440 static int
mpr_pci_suspend(device_t dev)441 mpr_pci_suspend(device_t dev)
442 {
443 return (EINVAL);
444 }
445
446 static int
mpr_pci_resume(device_t dev)447 mpr_pci_resume(device_t dev)
448 {
449 return (EINVAL);
450 }
451
452 static int
mpr_alloc_msix(struct mpr_softc * sc,int msgs)453 mpr_alloc_msix(struct mpr_softc *sc, int msgs)
454 {
455 int error;
456
457 error = pci_alloc_msix(sc->mpr_dev, &msgs);
458 return (error);
459 }
460
461 static int
mpr_alloc_msi(struct mpr_softc * sc,int msgs)462 mpr_alloc_msi(struct mpr_softc *sc, int msgs)
463 {
464 int error;
465
466 error = pci_alloc_msi(sc->mpr_dev, &msgs);
467 return (error);
468 }
469
470 int
mpr_pci_restore(struct mpr_softc * sc)471 mpr_pci_restore(struct mpr_softc *sc)
472 {
473 struct pci_devinfo *dinfo;
474
475 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
476
477 dinfo = device_get_ivars(sc->mpr_dev);
478 if (dinfo == NULL) {
479 mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__);
480 return (EINVAL);
481 }
482
483 pci_cfg_restore(sc->mpr_dev, dinfo);
484 return (0);
485 }
486