1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5 */
6
7 #include <linux/bitfield.h>
8 #include <linux/coresight.h>
9 #include <linux/coresight-pmu.h>
10 #include <linux/cpumask.h>
11 #include <linux/device.h>
12 #include <linux/list.h>
13 #include <linux/mm.h>
14 #include <linux/init.h>
15 #include <linux/perf_event.h>
16 #include <linux/percpu-defs.h>
17 #include <linux/slab.h>
18 #include <linux/stringhash.h>
19 #include <linux/types.h>
20 #include <linux/workqueue.h>
21
22 #include "coresight-config.h"
23 #include "coresight-etm-perf.h"
24 #include "coresight-priv.h"
25 #include "coresight-syscfg.h"
26 #include "coresight-trace-id.h"
27
28 static struct pmu etm_pmu;
29 static bool etm_perf_up;
30
31 /*
32 * An ETM context for a running event includes the perf aux handle
33 * and aux_data. For ETM, the aux_data (etm_event_data), consists of
34 * the trace path and the sink configuration. The event data is accessible
35 * via perf_get_aux(handle). However, a sink could "end" a perf output
36 * handle via the IRQ handler. And if the "sink" encounters a failure
37 * to "begin" another session (e.g due to lack of space in the buffer),
38 * the handle will be cleared. Thus, the event_data may not be accessible
39 * from the handle when we get to the etm_event_stop(), which is required
40 * for stopping the trace path. The event_data is guaranteed to stay alive
41 * until "free_aux()", which cannot happen as long as the event is active on
42 * the ETM. Thus the event_data for the session must be part of the ETM context
43 * to make sure we can disable the trace path.
44 */
45 struct etm_ctxt {
46 struct perf_output_handle handle;
47 struct etm_event_data *event_data;
48 };
49
50 static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt);
51 static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
52
53 /*
54 * The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
55 * now take them as general formats and apply on all ETMs.
56 */
57 PMU_FORMAT_ATTR(branch_broadcast, "config:"__stringify(ETM_OPT_BRANCH_BROADCAST));
58 PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
59 /* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
60 PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID));
61 /* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
62 PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2));
63 PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
64 PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
65 /* preset - if sink ID is used as a configuration selector */
66 PMU_FORMAT_ATTR(preset, "config:0-3");
67 /* Sink ID - same for all ETMs */
68 PMU_FORMAT_ATTR(sinkid, "config2:0-31");
69 /* config ID - set if a system configuration is selected */
70 PMU_FORMAT_ATTR(configid, "config2:32-63");
71 PMU_FORMAT_ATTR(cc_threshold, "config3:0-11");
72
73
74 /*
75 * contextid always traces the "PID". The PID is in CONTEXTIDR_EL1
76 * when the kernel is running at EL1; when the kernel is at EL2,
77 * the PID is in CONTEXTIDR_EL2.
78 */
format_attr_contextid_show(struct device * dev,struct device_attribute * attr,char * page)79 static ssize_t format_attr_contextid_show(struct device *dev,
80 struct device_attribute *attr,
81 char *page)
82 {
83 int pid_fmt = ETM_OPT_CTXTID;
84
85 #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X)
86 pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID2 : ETM_OPT_CTXTID;
87 #endif
88 return sprintf(page, "config:%d\n", pid_fmt);
89 }
90
91 static struct device_attribute format_attr_contextid =
92 __ATTR(contextid, 0444, format_attr_contextid_show, NULL);
93
94 static struct attribute *etm_config_formats_attr[] = {
95 &format_attr_cycacc.attr,
96 &format_attr_contextid.attr,
97 &format_attr_contextid1.attr,
98 &format_attr_contextid2.attr,
99 &format_attr_timestamp.attr,
100 &format_attr_retstack.attr,
101 &format_attr_sinkid.attr,
102 &format_attr_preset.attr,
103 &format_attr_configid.attr,
104 &format_attr_branch_broadcast.attr,
105 &format_attr_cc_threshold.attr,
106 NULL,
107 };
108
109 static const struct attribute_group etm_pmu_format_group = {
110 .name = "format",
111 .attrs = etm_config_formats_attr,
112 };
113
114 static struct attribute *etm_config_sinks_attr[] = {
115 NULL,
116 };
117
118 static const struct attribute_group etm_pmu_sinks_group = {
119 .name = "sinks",
120 .attrs = etm_config_sinks_attr,
121 };
122
123 static struct attribute *etm_config_events_attr[] = {
124 NULL,
125 };
126
127 static const struct attribute_group etm_pmu_events_group = {
128 .name = "events",
129 .attrs = etm_config_events_attr,
130 };
131
132 static const struct attribute_group *etm_pmu_attr_groups[] = {
133 &etm_pmu_format_group,
134 &etm_pmu_sinks_group,
135 &etm_pmu_events_group,
136 NULL,
137 };
138
139 static inline struct coresight_path **
etm_event_cpu_path_ptr(struct etm_event_data * data,int cpu)140 etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
141 {
142 return per_cpu_ptr(data->path, cpu);
143 }
144
145 static inline struct coresight_path *
etm_event_cpu_path(struct etm_event_data * data,int cpu)146 etm_event_cpu_path(struct etm_event_data *data, int cpu)
147 {
148 return *etm_event_cpu_path_ptr(data, cpu);
149 }
150
etm_event_read(struct perf_event * event)151 static void etm_event_read(struct perf_event *event) {}
152
etm_addr_filters_alloc(struct perf_event * event)153 static int etm_addr_filters_alloc(struct perf_event *event)
154 {
155 struct etm_filters *filters;
156 int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
157
158 filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
159 if (!filters)
160 return -ENOMEM;
161
162 if (event->parent)
163 memcpy(filters, event->parent->hw.addr_filters,
164 sizeof(*filters));
165
166 event->hw.addr_filters = filters;
167
168 return 0;
169 }
170
etm_event_destroy(struct perf_event * event)171 static void etm_event_destroy(struct perf_event *event)
172 {
173 kfree(event->hw.addr_filters);
174 event->hw.addr_filters = NULL;
175 }
176
etm_event_init(struct perf_event * event)177 static int etm_event_init(struct perf_event *event)
178 {
179 int ret = 0;
180
181 if (event->attr.type != etm_pmu.type) {
182 ret = -ENOENT;
183 goto out;
184 }
185
186 ret = etm_addr_filters_alloc(event);
187 if (ret)
188 goto out;
189
190 event->destroy = etm_event_destroy;
191 out:
192 return ret;
193 }
194
free_sink_buffer(struct etm_event_data * event_data)195 static void free_sink_buffer(struct etm_event_data *event_data)
196 {
197 int cpu;
198 cpumask_t *mask = &event_data->mask;
199 struct coresight_device *sink;
200
201 if (!event_data->snk_config)
202 return;
203
204 if (WARN_ON(cpumask_empty(mask)))
205 return;
206
207 cpu = cpumask_first(mask);
208 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
209 sink_ops(sink)->free_buffer(event_data->snk_config);
210 }
211
free_event_data(struct work_struct * work)212 static void free_event_data(struct work_struct *work)
213 {
214 int cpu;
215 cpumask_t *mask;
216 struct etm_event_data *event_data;
217
218 event_data = container_of(work, struct etm_event_data, work);
219 mask = &event_data->mask;
220
221 /* Free the sink buffers, if there are any */
222 free_sink_buffer(event_data);
223
224 /* clear any configuration we were using */
225 if (event_data->cfg_hash)
226 cscfg_deactivate_config(event_data->cfg_hash);
227
228 for_each_cpu(cpu, mask) {
229 struct coresight_path **ppath;
230
231 ppath = etm_event_cpu_path_ptr(event_data, cpu);
232 if (!(IS_ERR_OR_NULL(*ppath))) {
233 struct coresight_device *sink = coresight_get_sink(*ppath);
234
235 /*
236 * Mark perf event as done for trace id allocator, but don't call
237 * coresight_trace_id_put_cpu_id_map() on individual IDs. Perf sessions
238 * never free trace IDs to ensure that the ID associated with a CPU
239 * cannot change during their and other's concurrent sessions. Instead,
240 * a refcount is used so that the last event to call
241 * coresight_trace_id_perf_stop() frees all IDs.
242 */
243 coresight_trace_id_perf_stop(&sink->perf_sink_id_map);
244
245 coresight_release_path(*ppath);
246 }
247 *ppath = NULL;
248 }
249
250 free_percpu(event_data->path);
251 kfree(event_data);
252 }
253
alloc_event_data(int cpu)254 static void *alloc_event_data(int cpu)
255 {
256 cpumask_t *mask;
257 struct etm_event_data *event_data;
258
259 /* First get memory for the session's data */
260 event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
261 if (!event_data)
262 return NULL;
263
264
265 mask = &event_data->mask;
266 if (cpu != -1)
267 cpumask_set_cpu(cpu, mask);
268 else
269 cpumask_copy(mask, cpu_present_mask);
270
271 /*
272 * Each CPU has a single path between source and destination. As such
273 * allocate an array using CPU numbers as indexes. That way a path
274 * for any CPU can easily be accessed at any given time. We proceed
275 * the same way for sessions involving a single CPU. The cost of
276 * unused memory when dealing with single CPU trace scenarios is small
277 * compared to the cost of searching through an optimized array.
278 */
279 event_data->path = alloc_percpu(struct coresight_path *);
280
281 if (!event_data->path) {
282 kfree(event_data);
283 return NULL;
284 }
285
286 return event_data;
287 }
288
etm_free_aux(void * data)289 static void etm_free_aux(void *data)
290 {
291 struct etm_event_data *event_data = data;
292
293 schedule_work(&event_data->work);
294 }
295
296 /*
297 * Check if two given sinks are compatible with each other,
298 * so that they can use the same sink buffers, when an event
299 * moves around.
300 */
sinks_compatible(struct coresight_device * a,struct coresight_device * b)301 static bool sinks_compatible(struct coresight_device *a,
302 struct coresight_device *b)
303 {
304 if (!a || !b)
305 return false;
306 /*
307 * If the sinks are of the same subtype and driven
308 * by the same driver, we can use the same buffer
309 * on these sinks.
310 */
311 return (a->subtype.sink_subtype == b->subtype.sink_subtype) &&
312 (sink_ops(a) == sink_ops(b));
313 }
314
etm_setup_aux(struct perf_event * event,void ** pages,int nr_pages,bool overwrite)315 static void *etm_setup_aux(struct perf_event *event, void **pages,
316 int nr_pages, bool overwrite)
317 {
318 u32 id, cfg_hash;
319 int cpu = event->cpu;
320 cpumask_t *mask;
321 struct coresight_device *sink = NULL;
322 struct coresight_device *user_sink = NULL, *last_sink = NULL;
323 struct etm_event_data *event_data = NULL;
324
325 event_data = alloc_event_data(cpu);
326 if (!event_data)
327 return NULL;
328 INIT_WORK(&event_data->work, free_event_data);
329
330 /* First get the selected sink from user space. */
331 if (event->attr.config2 & GENMASK_ULL(31, 0)) {
332 id = (u32)event->attr.config2;
333 sink = user_sink = coresight_get_sink_by_id(id);
334 }
335
336 /* check if user wants a coresight configuration selected */
337 cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32);
338 if (cfg_hash) {
339 if (cscfg_activate_config(cfg_hash))
340 goto err;
341 event_data->cfg_hash = cfg_hash;
342 }
343
344 mask = &event_data->mask;
345
346 /*
347 * Setup the path for each CPU in a trace session. We try to build
348 * trace path for each CPU in the mask. If we don't find an ETM
349 * for the CPU or fail to build a path, we clear the CPU from the
350 * mask and continue with the rest. If ever we try to trace on those
351 * CPUs, we can handle it and fail the session.
352 */
353 for_each_cpu(cpu, mask) {
354 struct coresight_path *path;
355 struct coresight_device *csdev;
356
357 csdev = per_cpu(csdev_src, cpu);
358 /*
359 * If there is no ETM associated with this CPU clear it from
360 * the mask and continue with the rest. If ever we try to trace
361 * on this CPU, we handle it accordingly.
362 */
363 if (!csdev) {
364 cpumask_clear_cpu(cpu, mask);
365 continue;
366 }
367
368 /*
369 * No sink provided - look for a default sink for all the ETMs,
370 * where this event can be scheduled.
371 * We allocate the sink specific buffers only once for this
372 * event. If the ETMs have different default sink devices, we
373 * can only use a single "type" of sink as the event can carry
374 * only one sink specific buffer. Thus we have to make sure
375 * that the sinks are of the same type and driven by the same
376 * driver, as the one we allocate the buffer for. As such
377 * we choose the first sink and check if the remaining ETMs
378 * have a compatible default sink. We don't trace on a CPU
379 * if the sink is not compatible.
380 */
381 if (!user_sink) {
382 /* Find the default sink for this ETM */
383 sink = coresight_find_default_sink(csdev);
384 if (!sink) {
385 cpumask_clear_cpu(cpu, mask);
386 continue;
387 }
388
389 /* Check if this sink compatible with the last sink */
390 if (last_sink && !sinks_compatible(last_sink, sink)) {
391 cpumask_clear_cpu(cpu, mask);
392 continue;
393 }
394 last_sink = sink;
395 }
396
397 /*
398 * Building a path doesn't enable it, it simply builds a
399 * list of devices from source to sink that can be
400 * referenced later when the path is actually needed.
401 */
402 path = coresight_build_path(csdev, sink);
403 if (IS_ERR(path)) {
404 cpumask_clear_cpu(cpu, mask);
405 continue;
406 }
407
408 /* ensure we can allocate a trace ID for this CPU */
409 coresight_path_assign_trace_id(path, CS_MODE_PERF);
410 if (!IS_VALID_CS_TRACE_ID(path->trace_id)) {
411 cpumask_clear_cpu(cpu, mask);
412 coresight_release_path(path);
413 continue;
414 }
415
416 coresight_trace_id_perf_start(&sink->perf_sink_id_map);
417 *etm_event_cpu_path_ptr(event_data, cpu) = path;
418 }
419
420 /* no sink found for any CPU - cannot trace */
421 if (!sink)
422 goto err;
423
424 /* If we don't have any CPUs ready for tracing, abort */
425 cpu = cpumask_first(mask);
426 if (cpu >= nr_cpu_ids)
427 goto err;
428
429 if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
430 goto err;
431
432 /*
433 * Allocate the sink buffer for this session. All the sinks
434 * where this event can be scheduled are ensured to be of the
435 * same type. Thus the same sink configuration is used by the
436 * sinks.
437 */
438 event_data->snk_config =
439 sink_ops(sink)->alloc_buffer(sink, event, pages,
440 nr_pages, overwrite);
441 if (!event_data->snk_config)
442 goto err;
443
444 out:
445 return event_data;
446
447 err:
448 etm_free_aux(event_data);
449 event_data = NULL;
450 goto out;
451 }
452
etm_event_start(struct perf_event * event,int flags)453 static void etm_event_start(struct perf_event *event, int flags)
454 {
455 int cpu = smp_processor_id();
456 struct etm_event_data *event_data;
457 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
458 struct perf_output_handle *handle = &ctxt->handle;
459 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
460 struct coresight_path *path;
461 u64 hw_id;
462
463 if (!csdev)
464 goto fail;
465
466 /* Have we messed up our tracking ? */
467 if (WARN_ON(ctxt->event_data))
468 goto fail;
469
470 /*
471 * Deal with the ring buffer API and get a handle on the
472 * session's information.
473 */
474 event_data = perf_aux_output_begin(handle, event);
475 if (!event_data)
476 goto fail;
477
478 /*
479 * Check if this ETM is allowed to trace, as decided
480 * at etm_setup_aux(). This could be due to an unreachable
481 * sink from this ETM. We can't do much in this case if
482 * the sink was specified or hinted to the driver. For
483 * now, simply don't record anything on this ETM.
484 *
485 * As such we pretend that everything is fine, and let
486 * it continue without actually tracing. The event could
487 * continue tracing when it moves to a CPU where it is
488 * reachable to a sink.
489 */
490 if (!cpumask_test_cpu(cpu, &event_data->mask))
491 goto out;
492
493 path = etm_event_cpu_path(event_data, cpu);
494 /* We need a sink, no need to continue without one */
495 sink = coresight_get_sink(path);
496 if (WARN_ON_ONCE(!sink))
497 goto fail_end_stop;
498
499 /* Nothing will happen without a path */
500 if (coresight_enable_path(path, CS_MODE_PERF, handle))
501 goto fail_end_stop;
502
503 /* Finally enable the tracer */
504 if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF, path))
505 goto fail_disable_path;
506
507 /*
508 * output cpu / trace ID in perf record, once for the lifetime
509 * of the event.
510 */
511 if (!cpumask_test_cpu(cpu, &event_data->aux_hwid_done)) {
512 cpumask_set_cpu(cpu, &event_data->aux_hwid_done);
513
514 hw_id = FIELD_PREP(CS_AUX_HW_ID_MAJOR_VERSION_MASK,
515 CS_AUX_HW_ID_MAJOR_VERSION);
516 hw_id |= FIELD_PREP(CS_AUX_HW_ID_MINOR_VERSION_MASK,
517 CS_AUX_HW_ID_MINOR_VERSION);
518 hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, path->trace_id);
519 hw_id |= FIELD_PREP(CS_AUX_HW_ID_SINK_ID_MASK, coresight_get_sink_id(sink));
520
521 perf_report_aux_output_id(event, hw_id);
522 }
523
524 out:
525 /* Tell the perf core the event is alive */
526 event->hw.state = 0;
527 /* Save the event_data for this ETM */
528 ctxt->event_data = event_data;
529 return;
530
531 fail_disable_path:
532 coresight_disable_path(path);
533 fail_end_stop:
534 /*
535 * Check if the handle is still associated with the event,
536 * to handle cases where if the sink failed to start the
537 * trace and TRUNCATED the handle already.
538 */
539 if (READ_ONCE(handle->event)) {
540 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
541 perf_aux_output_end(handle, 0);
542 }
543 fail:
544 event->hw.state = PERF_HES_STOPPED;
545 return;
546 }
547
etm_event_stop(struct perf_event * event,int mode)548 static void etm_event_stop(struct perf_event *event, int mode)
549 {
550 int cpu = smp_processor_id();
551 unsigned long size;
552 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
553 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
554 struct perf_output_handle *handle = &ctxt->handle;
555 struct etm_event_data *event_data;
556 struct coresight_path *path;
557
558 /*
559 * If we still have access to the event_data via handle,
560 * confirm that we haven't messed up the tracking.
561 */
562 if (handle->event &&
563 WARN_ON(perf_get_aux(handle) != ctxt->event_data))
564 return;
565
566 event_data = ctxt->event_data;
567 /* Clear the event_data as this ETM is stopping the trace. */
568 ctxt->event_data = NULL;
569
570 if (event->hw.state == PERF_HES_STOPPED)
571 return;
572
573 /* We must have a valid event_data for a running event */
574 if (WARN_ON(!event_data))
575 return;
576
577 /*
578 * Check if this ETM was allowed to trace, as decided at
579 * etm_setup_aux(). If it wasn't allowed to trace, then
580 * nothing needs to be torn down other than outputting a
581 * zero sized record.
582 */
583 if (handle->event && (mode & PERF_EF_UPDATE) &&
584 !cpumask_test_cpu(cpu, &event_data->mask)) {
585 event->hw.state = PERF_HES_STOPPED;
586 perf_aux_output_end(handle, 0);
587 return;
588 }
589
590 if (!csdev)
591 return;
592
593 path = etm_event_cpu_path(event_data, cpu);
594 if (!path)
595 return;
596
597 sink = coresight_get_sink(path);
598 if (!sink)
599 return;
600
601 /* stop tracer */
602 coresight_disable_source(csdev, event);
603
604 /* tell the core */
605 event->hw.state = PERF_HES_STOPPED;
606
607 /*
608 * If the handle is not bound to an event anymore
609 * (e.g, the sink driver was unable to restart the
610 * handle due to lack of buffer space), we don't
611 * have to do anything here.
612 */
613 if (handle->event && (mode & PERF_EF_UPDATE)) {
614 if (WARN_ON_ONCE(handle->event != event))
615 return;
616
617 /* update trace information */
618 if (!sink_ops(sink)->update_buffer)
619 return;
620
621 size = sink_ops(sink)->update_buffer(sink, handle,
622 event_data->snk_config);
623 /*
624 * Make sure the handle is still valid as the
625 * sink could have closed it from an IRQ.
626 * The sink driver must handle the race with
627 * update_buffer() and IRQ. Thus either we
628 * should get a valid handle and valid size
629 * (which may be 0).
630 *
631 * But we should never get a non-zero size with
632 * an invalid handle.
633 */
634 if (READ_ONCE(handle->event))
635 perf_aux_output_end(handle, size);
636 else
637 WARN_ON(size);
638 }
639
640 /* Disabling the path make its elements available to other sessions */
641 coresight_disable_path(path);
642 }
643
etm_event_add(struct perf_event * event,int mode)644 static int etm_event_add(struct perf_event *event, int mode)
645 {
646 int ret = 0;
647 struct hw_perf_event *hwc = &event->hw;
648
649 if (mode & PERF_EF_START) {
650 etm_event_start(event, 0);
651 if (hwc->state & PERF_HES_STOPPED)
652 ret = -EINVAL;
653 } else {
654 hwc->state = PERF_HES_STOPPED;
655 }
656
657 return ret;
658 }
659
etm_event_del(struct perf_event * event,int mode)660 static void etm_event_del(struct perf_event *event, int mode)
661 {
662 etm_event_stop(event, PERF_EF_UPDATE);
663 }
664
etm_addr_filters_validate(struct list_head * filters)665 static int etm_addr_filters_validate(struct list_head *filters)
666 {
667 bool range = false, address = false;
668 int index = 0;
669 struct perf_addr_filter *filter;
670
671 list_for_each_entry(filter, filters, entry) {
672 /*
673 * No need to go further if there's no more
674 * room for filters.
675 */
676 if (++index > ETM_ADDR_CMP_MAX)
677 return -EOPNOTSUPP;
678
679 /* filter::size==0 means single address trigger */
680 if (filter->size) {
681 /*
682 * The existing code relies on START/STOP filters
683 * being address filters.
684 */
685 if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
686 filter->action == PERF_ADDR_FILTER_ACTION_STOP)
687 return -EOPNOTSUPP;
688
689 range = true;
690 } else
691 address = true;
692
693 /*
694 * At this time we don't allow range and start/stop filtering
695 * to cohabitate, they have to be mutually exclusive.
696 */
697 if (range && address)
698 return -EOPNOTSUPP;
699 }
700
701 return 0;
702 }
703
etm_addr_filters_sync(struct perf_event * event)704 static void etm_addr_filters_sync(struct perf_event *event)
705 {
706 struct perf_addr_filters_head *head = perf_event_addr_filters(event);
707 unsigned long start, stop;
708 struct perf_addr_filter_range *fr = event->addr_filter_ranges;
709 struct etm_filters *filters = event->hw.addr_filters;
710 struct etm_filter *etm_filter;
711 struct perf_addr_filter *filter;
712 int i = 0;
713
714 list_for_each_entry(filter, &head->list, entry) {
715 start = fr[i].start;
716 stop = start + fr[i].size;
717 etm_filter = &filters->etm_filter[i];
718
719 switch (filter->action) {
720 case PERF_ADDR_FILTER_ACTION_FILTER:
721 etm_filter->start_addr = start;
722 etm_filter->stop_addr = stop;
723 etm_filter->type = ETM_ADDR_TYPE_RANGE;
724 break;
725 case PERF_ADDR_FILTER_ACTION_START:
726 etm_filter->start_addr = start;
727 etm_filter->type = ETM_ADDR_TYPE_START;
728 break;
729 case PERF_ADDR_FILTER_ACTION_STOP:
730 etm_filter->stop_addr = stop;
731 etm_filter->type = ETM_ADDR_TYPE_STOP;
732 break;
733 }
734 i++;
735 }
736
737 filters->nr_filters = i;
738 }
739
etm_perf_symlink(struct coresight_device * csdev,bool link)740 int etm_perf_symlink(struct coresight_device *csdev, bool link)
741 {
742 char entry[sizeof("cpu9999999")];
743 int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
744 struct device *pmu_dev = etm_pmu.dev;
745 struct device *cs_dev = &csdev->dev;
746
747 sprintf(entry, "cpu%d", cpu);
748
749 if (!etm_perf_up)
750 return -EPROBE_DEFER;
751
752 if (link) {
753 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
754 if (ret)
755 return ret;
756 per_cpu(csdev_src, cpu) = csdev;
757 } else {
758 sysfs_remove_link(&pmu_dev->kobj, entry);
759 per_cpu(csdev_src, cpu) = NULL;
760 }
761
762 return 0;
763 }
764 EXPORT_SYMBOL_GPL(etm_perf_symlink);
765
etm_perf_sink_name_show(struct device * dev,struct device_attribute * dattr,char * buf)766 static ssize_t etm_perf_sink_name_show(struct device *dev,
767 struct device_attribute *dattr,
768 char *buf)
769 {
770 struct dev_ext_attribute *ea;
771
772 ea = container_of(dattr, struct dev_ext_attribute, attr);
773 return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
774 }
775
776 static struct dev_ext_attribute *
etm_perf_add_symlink_group(struct device * dev,const char * name,const char * group_name)777 etm_perf_add_symlink_group(struct device *dev, const char *name, const char *group_name)
778 {
779 struct dev_ext_attribute *ea;
780 unsigned long hash;
781 int ret;
782 struct device *pmu_dev = etm_pmu.dev;
783
784 if (!etm_perf_up)
785 return ERR_PTR(-EPROBE_DEFER);
786
787 ea = devm_kzalloc(dev, sizeof(*ea), GFP_KERNEL);
788 if (!ea)
789 return ERR_PTR(-ENOMEM);
790
791 /*
792 * If this function is called adding a sink then the hash is used for
793 * sink selection - see function coresight_get_sink_by_id().
794 * If adding a configuration then the hash is used for selection in
795 * cscfg_activate_config()
796 */
797 hash = hashlen_hash(hashlen_string(NULL, name));
798
799 sysfs_attr_init(&ea->attr.attr);
800 ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);
801 if (!ea->attr.attr.name)
802 return ERR_PTR(-ENOMEM);
803
804 ea->attr.attr.mode = 0444;
805 ea->var = (unsigned long *)hash;
806
807 ret = sysfs_add_file_to_group(&pmu_dev->kobj,
808 &ea->attr.attr, group_name);
809
810 return ret ? ERR_PTR(ret) : ea;
811 }
812
etm_perf_add_symlink_sink(struct coresight_device * csdev)813 int etm_perf_add_symlink_sink(struct coresight_device *csdev)
814 {
815 const char *name;
816 struct device *dev = &csdev->dev;
817 int err = 0;
818
819 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
820 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
821 return -EINVAL;
822
823 if (csdev->ea != NULL)
824 return -EINVAL;
825
826 name = dev_name(dev);
827 csdev->ea = etm_perf_add_symlink_group(dev, name, "sinks");
828 if (IS_ERR(csdev->ea)) {
829 err = PTR_ERR(csdev->ea);
830 csdev->ea = NULL;
831 } else
832 csdev->ea->attr.show = etm_perf_sink_name_show;
833
834 return err;
835 }
836
etm_perf_del_symlink_group(struct dev_ext_attribute * ea,const char * group_name)837 static void etm_perf_del_symlink_group(struct dev_ext_attribute *ea, const char *group_name)
838 {
839 struct device *pmu_dev = etm_pmu.dev;
840
841 sysfs_remove_file_from_group(&pmu_dev->kobj,
842 &ea->attr.attr, group_name);
843 }
844
etm_perf_del_symlink_sink(struct coresight_device * csdev)845 void etm_perf_del_symlink_sink(struct coresight_device *csdev)
846 {
847 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
848 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
849 return;
850
851 if (!csdev->ea)
852 return;
853
854 etm_perf_del_symlink_group(csdev->ea, "sinks");
855 csdev->ea = NULL;
856 }
857
etm_perf_cscfg_event_show(struct device * dev,struct device_attribute * dattr,char * buf)858 static ssize_t etm_perf_cscfg_event_show(struct device *dev,
859 struct device_attribute *dattr,
860 char *buf)
861 {
862 struct dev_ext_attribute *ea;
863
864 ea = container_of(dattr, struct dev_ext_attribute, attr);
865 return scnprintf(buf, PAGE_SIZE, "configid=0x%lx\n", (unsigned long)(ea->var));
866 }
867
etm_perf_add_symlink_cscfg(struct device * dev,struct cscfg_config_desc * config_desc)868 int etm_perf_add_symlink_cscfg(struct device *dev, struct cscfg_config_desc *config_desc)
869 {
870 int err = 0;
871
872 if (config_desc->event_ea != NULL)
873 return 0;
874
875 config_desc->event_ea = etm_perf_add_symlink_group(dev, config_desc->name, "events");
876
877 /* set the show function to the custom cscfg event */
878 if (!IS_ERR(config_desc->event_ea))
879 config_desc->event_ea->attr.show = etm_perf_cscfg_event_show;
880 else {
881 err = PTR_ERR(config_desc->event_ea);
882 config_desc->event_ea = NULL;
883 }
884
885 return err;
886 }
887
etm_perf_del_symlink_cscfg(struct cscfg_config_desc * config_desc)888 void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc)
889 {
890 if (!config_desc->event_ea)
891 return;
892
893 etm_perf_del_symlink_group(config_desc->event_ea, "events");
894 config_desc->event_ea = NULL;
895 }
896
etm_perf_init(void)897 int __init etm_perf_init(void)
898 {
899 int ret;
900
901 etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
902 PERF_PMU_CAP_ITRACE);
903
904 etm_pmu.attr_groups = etm_pmu_attr_groups;
905 etm_pmu.task_ctx_nr = perf_sw_context;
906 etm_pmu.read = etm_event_read;
907 etm_pmu.event_init = etm_event_init;
908 etm_pmu.setup_aux = etm_setup_aux;
909 etm_pmu.free_aux = etm_free_aux;
910 etm_pmu.start = etm_event_start;
911 etm_pmu.stop = etm_event_stop;
912 etm_pmu.add = etm_event_add;
913 etm_pmu.del = etm_event_del;
914 etm_pmu.addr_filters_sync = etm_addr_filters_sync;
915 etm_pmu.addr_filters_validate = etm_addr_filters_validate;
916 etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
917 etm_pmu.module = THIS_MODULE;
918
919 ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
920 if (ret == 0)
921 etm_perf_up = true;
922
923 return ret;
924 }
925
etm_perf_exit(void)926 void etm_perf_exit(void)
927 {
928 perf_pmu_unregister(&etm_pmu);
929 }
930