1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2023. Linaro Inc. All rights reserved. 4 */ 5 6 #ifndef _DPU_3_3_SDM630_H 7 #define _DPU_3_3_SDM630_H 8 9 static const struct dpu_caps sdm630_dpu_caps = { 10 .max_mixer_width = DEFAULT_DPU_LINE_WIDTH, 11 .max_mixer_blendstages = 0x7, 12 .has_src_split = true, 13 .has_dim_layer = true, 14 .has_idle_pc = true, 15 .has_3d_merge = true, 16 .max_linewidth = DEFAULT_DPU_LINE_WIDTH, 17 .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE, 18 .max_hdeci_exp = MAX_HORZ_DECIMATION, 19 .max_vdeci_exp = MAX_VERT_DECIMATION, 20 }; 21 22 static const struct dpu_mdp_cfg sdm630_mdp = { 23 .name = "top_0", 24 .base = 0x0, .len = 0x458, 25 .clk_ctrls = { 26 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 }, 27 [DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 }, 28 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 }, 29 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2c4, .bit_off = 8 }, 30 [DPU_CLK_CTRL_CURSOR0] = { .reg_off = 0x3a8, .bit_off = 16 }, 31 }, 32 }; 33 34 static const struct dpu_ctl_cfg sdm630_ctl[] = { 35 { 36 .name = "ctl_0", .id = CTL_0, 37 .base = 0x1000, .len = 0x94, 38 .features = BIT(DPU_CTL_SPLIT_DISPLAY), 39 .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 9), 40 }, { 41 .name = "ctl_1", .id = CTL_1, 42 .base = 0x1200, .len = 0x94, 43 .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 10), 44 }, { 45 .name = "ctl_2", .id = CTL_2, 46 .base = 0x1400, .len = 0x94, 47 .features = BIT(DPU_CTL_SPLIT_DISPLAY), 48 .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 11), 49 }, { 50 .name = "ctl_3", .id = CTL_3, 51 .base = 0x1600, .len = 0x94, 52 .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 12), 53 }, { 54 .name = "ctl_4", .id = CTL_4, 55 .base = 0x1800, .len = 0x94, 56 .intr_start = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR2, 13), 57 }, 58 }; 59 60 static const struct dpu_sspp_cfg sdm630_sspp[] = { 61 { 62 .name = "sspp_0", .id = SSPP_VIG0, 63 .base = 0x4000, .len = 0x1ac, 64 .features = VIG_MSM8998_MASK, 65 .sblk = &dpu_vig_sblk_qseed3_1_2, 66 .xin_id = 0, 67 .type = SSPP_TYPE_VIG, 68 .clk_ctrl = DPU_CLK_CTRL_VIG0, 69 }, { 70 .name = "sspp_8", .id = SSPP_DMA0, 71 .base = 0x24000, .len = 0x1ac, 72 .features = DMA_MSM8998_MASK, 73 .sblk = &dpu_dma_sblk, 74 .xin_id = 1, 75 .type = SSPP_TYPE_DMA, 76 .clk_ctrl = DPU_CLK_CTRL_DMA0, 77 }, { 78 .name = "sspp_9", .id = SSPP_DMA1, 79 .base = 0x26000, .len = 0x1ac, 80 .features = DMA_MSM8998_MASK, 81 .sblk = &dpu_dma_sblk, 82 .xin_id = 5, 83 .type = SSPP_TYPE_DMA, 84 .clk_ctrl = DPU_CLK_CTRL_DMA1, 85 }, { 86 .name = "sspp_10", .id = SSPP_DMA2, 87 .base = 0x28000, .len = 0x1ac, 88 .features = DMA_CURSOR_MSM8998_MASK, 89 .sblk = &dpu_dma_sblk, 90 .xin_id = 9, 91 .type = SSPP_TYPE_DMA, 92 .clk_ctrl = DPU_CLK_CTRL_DMA2, 93 }, 94 }; 95 96 static const struct dpu_lm_cfg sdm630_lm[] = { 97 { 98 .name = "lm_0", .id = LM_0, 99 .base = 0x44000, .len = 0x320, 100 .features = MIXER_MSM8998_MASK, 101 .sblk = &msm8998_lm_sblk, 102 .pingpong = PINGPONG_0, 103 .dspp = DSPP_0, 104 }, { 105 .name = "lm_2", .id = LM_2, 106 .base = 0x46000, .len = 0x320, 107 .features = MIXER_MSM8998_MASK, 108 .sblk = &msm8998_lm_sblk, 109 .pingpong = PINGPONG_2, 110 }, 111 }; 112 113 static const struct dpu_pingpong_cfg sdm630_pp[] = { 114 { 115 .name = "pingpong_0", .id = PINGPONG_0, 116 .base = 0x70000, .len = 0xd4, 117 .sblk = &sdm845_pp_sblk, 118 .intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), 119 .intr_rdptr = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), 120 }, { 121 .name = "pingpong_2", .id = PINGPONG_2, 122 .base = 0x71000, .len = 0xd4, 123 .sblk = &sdm845_pp_sblk, 124 .intr_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), 125 .intr_rdptr = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14), 126 }, 127 }; 128 129 static const struct dpu_dspp_cfg sdm630_dspp[] = { 130 { 131 .name = "dspp_0", .id = DSPP_0, 132 .base = 0x54000, .len = 0x1800, 133 .sblk = &msm8998_dspp_sblk, 134 }, 135 }; 136 137 static const struct dpu_intf_cfg sdm630_intf[] = { 138 { 139 .name = "intf_0", .id = INTF_0, 140 .base = 0x6a000, .len = 0x280, 141 .type = INTF_DP, 142 .controller_id = MSM_DP_CONTROLLER_0, 143 .prog_fetch_lines_worst_case = 21, 144 .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 24), 145 .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 25), 146 }, { 147 .name = "intf_1", .id = INTF_1, 148 .base = 0x6a800, .len = 0x280, 149 .type = INTF_DSI, 150 .controller_id = MSM_DSI_CONTROLLER_0, 151 .prog_fetch_lines_worst_case = 21, 152 .intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 26), 153 .intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 27), 154 }, 155 }; 156 157 static const struct dpu_perf_cfg sdm630_perf_data = { 158 .max_bw_low = 4100000, 159 .max_bw_high = 4100000, 160 .min_core_ib = 3200000, 161 .min_llcc_ib = 800000, 162 .min_dram_ib = 800000, 163 .undersized_prefill_lines = 2, 164 .xtra_prefill_lines = 2, 165 .dest_scale_prefill_lines = 3, 166 .macrotile_prefill_lines = 4, 167 .yuv_nv12_prefill_lines = 8, 168 .linear_prefill_lines = 1, 169 .downscaling_prefill_lines = 1, 170 .amortizable_threshold = 25, 171 .min_prefill_lines = 25, 172 .danger_lut_tbl = {0xf, 0xffff, 0x0}, 173 .safe_lut_tbl = {0xfffc, 0xff00, 0xffff}, 174 .qos_lut_tbl = { 175 {.nentry = ARRAY_SIZE(msm8998_qos_linear), 176 .entries = msm8998_qos_linear 177 }, 178 {.nentry = ARRAY_SIZE(msm8998_qos_macrotile), 179 .entries = msm8998_qos_macrotile 180 }, 181 {.nentry = ARRAY_SIZE(msm8998_qos_nrt), 182 .entries = msm8998_qos_nrt 183 }, 184 }, 185 .cdp_cfg = { 186 {.rd_enable = 1, .wr_enable = 1}, 187 {.rd_enable = 1, .wr_enable = 0} 188 }, 189 .clk_inefficiency_factor = 200, 190 .bw_inefficiency_factor = 120, 191 }; 192 193 static const struct dpu_mdss_version sdm630_mdss_ver = { 194 .core_major_ver = 3, 195 .core_minor_ver = 3, 196 }; 197 198 const struct dpu_mdss_cfg dpu_sdm630_cfg = { 199 .mdss_ver = &sdm630_mdss_ver, 200 .caps = &sdm630_dpu_caps, 201 .mdp = &sdm630_mdp, 202 .cdm = &dpu_cdm_1_x_4_x, 203 .ctl_count = ARRAY_SIZE(sdm630_ctl), 204 .ctl = sdm630_ctl, 205 .sspp_count = ARRAY_SIZE(sdm630_sspp), 206 .sspp = sdm630_sspp, 207 .mixer_count = ARRAY_SIZE(sdm630_lm), 208 .mixer = sdm630_lm, 209 .dspp_count = ARRAY_SIZE(sdm630_dspp), 210 .dspp = sdm630_dspp, 211 .pingpong_count = ARRAY_SIZE(sdm630_pp), 212 .pingpong = sdm630_pp, 213 .intf_count = ARRAY_SIZE(sdm630_intf), 214 .intf = sdm630_intf, 215 .vbif_count = ARRAY_SIZE(msm8998_vbif), 216 .vbif = msm8998_vbif, 217 .perf = &sdm630_perf_data, 218 }; 219 220 #endif 221