1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Bluetooth supports for Qualcomm Atheros ROME chips
4 *
5 * Copyright (c) 2015 The Linux Foundation. All rights reserved.
6 */
7
8 #define EDL_PATCH_CMD_OPCODE (0xFC00)
9 #define EDL_NVM_ACCESS_OPCODE (0xFC0B)
10 #define EDL_WRITE_BD_ADDR_OPCODE (0xFC14)
11 #define EDL_PATCH_CMD_LEN (1)
12 #define EDL_PATCH_VER_REQ_CMD (0x19)
13 #define EDL_PATCH_TLV_REQ_CMD (0x1E)
14 #define EDL_GET_BUILD_INFO_CMD (0x20)
15 #define EDL_GET_BID_REQ_CMD (0x23)
16 #define EDL_NVM_ACCESS_SET_REQ_CMD (0x01)
17 #define EDL_PATCH_CONFIG_CMD (0x28)
18 #define MAX_SIZE_PER_TLV_SEGMENT (243)
19 #define QCA_PRE_SHUTDOWN_CMD (0xFC08)
20 #define QCA_DISABLE_LOGGING (0xFC17)
21
22 #define EDL_CMD_REQ_RES_EVT (0x00)
23 #define EDL_PATCH_VER_RES_EVT (0x19)
24 #define EDL_APP_VER_RES_EVT (0x02)
25 #define EDL_TVL_DNLD_RES_EVT (0x04)
26 #define EDL_CMD_EXE_STATUS_EVT (0x00)
27 #define EDL_SET_BAUDRATE_RSP_EVT (0x92)
28 #define EDL_NVM_ACCESS_CODE_EVT (0x0B)
29 #define EDL_PATCH_CONFIG_RES_EVT (0x00)
30 #define QCA_DISABLE_LOGGING_SUB_OP (0x14)
31
32 #define EDL_TAG_ID_HCI (17)
33 #define EDL_TAG_ID_DEEP_SLEEP (27)
34
35 #define QCA_WCN3990_POWERON_PULSE 0xFC
36 #define QCA_WCN3990_POWEROFF_PULSE 0xC0
37
38 #define QCA_HCI_CC_OPCODE 0xFC00
39 #define QCA_HCI_CC_SUCCESS 0x00
40
41 #define QCA_WCN3991_SOC_ID (0x40014320)
42
43 /* QCA chipset version can be decided by patch and SoC
44 * version, combination with upper 2 bytes from SoC
45 * and lower 2 bytes from patch will be used.
46 */
47 #define get_soc_ver(soc_id, rom_ver) \
48 ((le32_to_cpu(soc_id) << 16) | (le16_to_cpu(rom_ver)))
49
50 #define QCA_FW_BUILD_VER_LEN 255
51 #define QCA_HSP_GF_SOC_ID 0x1200
52 #define QCA_HSP_GF_SOC_MASK 0x0000ff00
53
54 enum qca_baudrate {
55 QCA_BAUDRATE_115200 = 0,
56 QCA_BAUDRATE_57600,
57 QCA_BAUDRATE_38400,
58 QCA_BAUDRATE_19200,
59 QCA_BAUDRATE_9600,
60 QCA_BAUDRATE_230400,
61 QCA_BAUDRATE_250000,
62 QCA_BAUDRATE_460800,
63 QCA_BAUDRATE_500000,
64 QCA_BAUDRATE_720000,
65 QCA_BAUDRATE_921600,
66 QCA_BAUDRATE_1000000,
67 QCA_BAUDRATE_1250000,
68 QCA_BAUDRATE_2000000,
69 QCA_BAUDRATE_3000000,
70 QCA_BAUDRATE_4000000,
71 QCA_BAUDRATE_1600000,
72 QCA_BAUDRATE_3200000,
73 QCA_BAUDRATE_3500000,
74 QCA_BAUDRATE_AUTO = 0xFE,
75 QCA_BAUDRATE_RESERVED
76 };
77
78 enum qca_tlv_dnld_mode {
79 QCA_SKIP_EVT_NONE,
80 QCA_SKIP_EVT_VSE,
81 QCA_SKIP_EVT_CC,
82 QCA_SKIP_EVT_VSE_CC
83 };
84
85 enum qca_tlv_type {
86 TLV_TYPE_PATCH = 1,
87 TLV_TYPE_NVM,
88 ELF_TYPE_PATCH,
89 };
90
91 struct qca_fw_config {
92 u8 type;
93 char fwname[64];
94 uint8_t user_baud_rate;
95 enum qca_tlv_dnld_mode dnld_mode;
96 enum qca_tlv_dnld_mode dnld_type;
97 };
98
99 struct edl_event_hdr {
100 __u8 cresp;
101 __u8 rtype;
102 __u8 data[];
103 } __packed;
104
105 struct qca_btsoc_version {
106 __le32 product_id;
107 __le16 patch_ver;
108 __le16 rom_ver;
109 __le32 soc_id;
110 } __packed;
111
112 struct tlv_seg_resp {
113 __u8 result;
114 } __packed;
115
116 struct tlv_type_patch {
117 __le32 total_size;
118 __le32 data_length;
119 __u8 format_version;
120 __u8 signature;
121 __u8 download_mode;
122 __u8 reserved1;
123 __le16 product_id;
124 __le16 rom_build;
125 __le16 patch_version;
126 __le16 reserved2;
127 __le32 entry;
128 } __packed;
129
130 struct tlv_type_nvm {
131 __le16 tag_id;
132 __le16 tag_len;
133 __le32 reserve1;
134 __le32 reserve2;
135 __u8 data[];
136 } __packed;
137
138 struct tlv_type_hdr {
139 __le32 type_len;
140 __u8 data[];
141 } __packed;
142
143 enum qca_btsoc_type {
144 QCA_INVALID = -1,
145 QCA_AR3002,
146 QCA_ROME,
147 QCA_WCN3988,
148 QCA_WCN3990,
149 QCA_WCN3998,
150 QCA_WCN3991,
151 QCA_QCA2066,
152 QCA_QCA6390,
153 QCA_WCN6750,
154 QCA_WCN6855,
155 QCA_WCN7850,
156 };
157
158 #if IS_ENABLED(CONFIG_BT_QCA)
159
160 int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr);
161 int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
162 enum qca_btsoc_type soc_type, struct qca_btsoc_version ver,
163 const char *firmware_name);
164 int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver,
165 enum qca_btsoc_type);
166 int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
167 int qca_send_pre_shutdown_cmd(struct hci_dev *hdev);
168 #else
169
qca_set_bdaddr_rome(struct hci_dev * hdev,const bdaddr_t * bdaddr)170 static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr)
171 {
172 return -EOPNOTSUPP;
173 }
174
qca_uart_setup(struct hci_dev * hdev,uint8_t baudrate,enum qca_btsoc_type soc_type,struct qca_btsoc_version ver,const char * firmware_name)175 static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
176 enum qca_btsoc_type soc_type,
177 struct qca_btsoc_version ver,
178 const char *firmware_name)
179 {
180 return -EOPNOTSUPP;
181 }
182
qca_read_soc_version(struct hci_dev * hdev,struct qca_btsoc_version * ver,enum qca_btsoc_type)183 static inline int qca_read_soc_version(struct hci_dev *hdev,
184 struct qca_btsoc_version *ver,
185 enum qca_btsoc_type)
186 {
187 return -EOPNOTSUPP;
188 }
189
qca_set_bdaddr(struct hci_dev * hdev,const bdaddr_t * bdaddr)190 static inline int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
191 {
192 return -EOPNOTSUPP;
193 }
194
qca_send_pre_shutdown_cmd(struct hci_dev * hdev)195 static inline int qca_send_pre_shutdown_cmd(struct hci_dev *hdev)
196 {
197 return -EOPNOTSUPP;
198 }
199 #endif
200