1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * HyperV Detection code.
4 *
5 * Copyright (C) 2010, Novell, Inc.
6 * Author : K. Y. Srinivasan <ksrinivasan@novell.com>
7 */
8
9 #include <linux/types.h>
10 #include <linux/time.h>
11 #include <linux/clocksource.h>
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/hardirq.h>
15 #include <linux/efi.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/kexec.h>
19 #include <linux/random.h>
20 #include <asm/processor.h>
21 #include <asm/hypervisor.h>
22 #include <hyperv/hvhdk.h>
23 #include <asm/mshyperv.h>
24 #include <asm/desc.h>
25 #include <asm/idtentry.h>
26 #include <asm/irq_regs.h>
27 #include <asm/i8259.h>
28 #include <asm/apic.h>
29 #include <asm/timer.h>
30 #include <asm/reboot.h>
31 #include <asm/nmi.h>
32 #include <clocksource/hyperv_timer.h>
33 #include <asm/numa.h>
34 #include <asm/svm.h>
35
36 /* Is Linux running on nested Microsoft Hypervisor */
37 bool hv_nested;
38 struct ms_hyperv_info ms_hyperv;
39
40 /* Used in modules via hv_do_hypercall(): see arch/x86/include/asm/mshyperv.h */
41 bool hyperv_paravisor_present __ro_after_init;
42 EXPORT_SYMBOL_GPL(hyperv_paravisor_present);
43
44 #if IS_ENABLED(CONFIG_HYPERV)
hv_get_nested_msr(unsigned int reg)45 static inline unsigned int hv_get_nested_msr(unsigned int reg)
46 {
47 if (hv_is_sint_msr(reg))
48 return reg - HV_X64_MSR_SINT0 + HV_X64_MSR_NESTED_SINT0;
49
50 switch (reg) {
51 case HV_X64_MSR_SIMP:
52 return HV_X64_MSR_NESTED_SIMP;
53 case HV_X64_MSR_SIEFP:
54 return HV_X64_MSR_NESTED_SIEFP;
55 case HV_X64_MSR_SVERSION:
56 return HV_X64_MSR_NESTED_SVERSION;
57 case HV_X64_MSR_SCONTROL:
58 return HV_X64_MSR_NESTED_SCONTROL;
59 case HV_X64_MSR_EOM:
60 return HV_X64_MSR_NESTED_EOM;
61 default:
62 return reg;
63 }
64 }
65
hv_get_non_nested_msr(unsigned int reg)66 u64 hv_get_non_nested_msr(unsigned int reg)
67 {
68 u64 value;
69
70 if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present)
71 hv_ivm_msr_read(reg, &value);
72 else
73 rdmsrl(reg, value);
74 return value;
75 }
76 EXPORT_SYMBOL_GPL(hv_get_non_nested_msr);
77
hv_set_non_nested_msr(unsigned int reg,u64 value)78 void hv_set_non_nested_msr(unsigned int reg, u64 value)
79 {
80 if (hv_is_synic_msr(reg) && ms_hyperv.paravisor_present) {
81 hv_ivm_msr_write(reg, value);
82
83 /* Write proxy bit via wrmsl instruction */
84 if (hv_is_sint_msr(reg))
85 wrmsrl(reg, value | 1 << 20);
86 } else {
87 wrmsrl(reg, value);
88 }
89 }
90 EXPORT_SYMBOL_GPL(hv_set_non_nested_msr);
91
hv_get_msr(unsigned int reg)92 u64 hv_get_msr(unsigned int reg)
93 {
94 if (hv_nested)
95 reg = hv_get_nested_msr(reg);
96
97 return hv_get_non_nested_msr(reg);
98 }
99 EXPORT_SYMBOL_GPL(hv_get_msr);
100
hv_set_msr(unsigned int reg,u64 value)101 void hv_set_msr(unsigned int reg, u64 value)
102 {
103 if (hv_nested)
104 reg = hv_get_nested_msr(reg);
105
106 hv_set_non_nested_msr(reg, value);
107 }
108 EXPORT_SYMBOL_GPL(hv_set_msr);
109
110 static void (*mshv_handler)(void);
111 static void (*vmbus_handler)(void);
112 static void (*hv_stimer0_handler)(void);
113 static void (*hv_kexec_handler)(void);
114 static void (*hv_crash_handler)(struct pt_regs *regs);
115
DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)116 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)
117 {
118 struct pt_regs *old_regs = set_irq_regs(regs);
119
120 inc_irq_stat(irq_hv_callback_count);
121 if (mshv_handler)
122 mshv_handler();
123
124 if (vmbus_handler)
125 vmbus_handler();
126
127 if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
128 apic_eoi();
129
130 set_irq_regs(old_regs);
131 }
132
hv_setup_mshv_handler(void (* handler)(void))133 void hv_setup_mshv_handler(void (*handler)(void))
134 {
135 mshv_handler = handler;
136 }
137
hv_setup_vmbus_handler(void (* handler)(void))138 void hv_setup_vmbus_handler(void (*handler)(void))
139 {
140 vmbus_handler = handler;
141 }
142
hv_remove_vmbus_handler(void)143 void hv_remove_vmbus_handler(void)
144 {
145 /* We have no way to deallocate the interrupt gate */
146 vmbus_handler = NULL;
147 }
148
149 /*
150 * Routines to do per-architecture handling of stimer0
151 * interrupts when in Direct Mode
152 */
DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0)153 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0)
154 {
155 struct pt_regs *old_regs = set_irq_regs(regs);
156
157 inc_irq_stat(hyperv_stimer0_count);
158 if (hv_stimer0_handler)
159 hv_stimer0_handler();
160 add_interrupt_randomness(HYPERV_STIMER0_VECTOR);
161 apic_eoi();
162
163 set_irq_regs(old_regs);
164 }
165
166 /* For x86/x64, override weak placeholders in hyperv_timer.c */
hv_setup_stimer0_handler(void (* handler)(void))167 void hv_setup_stimer0_handler(void (*handler)(void))
168 {
169 hv_stimer0_handler = handler;
170 }
171
hv_remove_stimer0_handler(void)172 void hv_remove_stimer0_handler(void)
173 {
174 /* We have no way to deallocate the interrupt gate */
175 hv_stimer0_handler = NULL;
176 }
177
hv_setup_kexec_handler(void (* handler)(void))178 void hv_setup_kexec_handler(void (*handler)(void))
179 {
180 hv_kexec_handler = handler;
181 }
182
hv_remove_kexec_handler(void)183 void hv_remove_kexec_handler(void)
184 {
185 hv_kexec_handler = NULL;
186 }
187
hv_setup_crash_handler(void (* handler)(struct pt_regs * regs))188 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
189 {
190 hv_crash_handler = handler;
191 }
192
hv_remove_crash_handler(void)193 void hv_remove_crash_handler(void)
194 {
195 hv_crash_handler = NULL;
196 }
197
198 #ifdef CONFIG_KEXEC_CORE
hv_machine_shutdown(void)199 static void hv_machine_shutdown(void)
200 {
201 if (kexec_in_progress && hv_kexec_handler)
202 hv_kexec_handler();
203
204 /*
205 * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor
206 * corrupts the old VP Assist Pages and can crash the kexec kernel.
207 */
208 if (kexec_in_progress)
209 cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE);
210
211 /* The function calls stop_other_cpus(). */
212 native_machine_shutdown();
213
214 /* Disable the hypercall page when there is only 1 active CPU. */
215 if (kexec_in_progress)
216 hyperv_cleanup();
217 }
218 #endif /* CONFIG_KEXEC_CORE */
219
220 #ifdef CONFIG_CRASH_DUMP
hv_machine_crash_shutdown(struct pt_regs * regs)221 static void hv_machine_crash_shutdown(struct pt_regs *regs)
222 {
223 if (hv_crash_handler)
224 hv_crash_handler(regs);
225
226 /* The function calls crash_smp_send_stop(). */
227 native_machine_crash_shutdown(regs);
228
229 /* Disable the hypercall page when there is only 1 active CPU. */
230 hyperv_cleanup();
231 }
232 #endif /* CONFIG_CRASH_DUMP */
233
234 static u64 hv_ref_counter_at_suspend;
235 static void (*old_save_sched_clock_state)(void);
236 static void (*old_restore_sched_clock_state)(void);
237
238 /*
239 * Hyper-V clock counter resets during hibernation. Save and restore clock
240 * offset during suspend/resume, while also considering the time passed
241 * before suspend. This is to make sure that sched_clock using hv tsc page
242 * based clocksource, proceeds from where it left off during suspend and
243 * it shows correct time for the timestamps of kernel messages after resume.
244 */
save_hv_clock_tsc_state(void)245 static void save_hv_clock_tsc_state(void)
246 {
247 hv_ref_counter_at_suspend = hv_read_reference_counter();
248 }
249
restore_hv_clock_tsc_state(void)250 static void restore_hv_clock_tsc_state(void)
251 {
252 /*
253 * Adjust the offsets used by hv tsc clocksource to
254 * account for the time spent before hibernation.
255 * adjusted value = reference counter (time) at suspend
256 * - reference counter (time) now.
257 */
258 hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter());
259 }
260
261 /*
262 * Functions to override save_sched_clock_state and restore_sched_clock_state
263 * functions of x86_platform. The Hyper-V clock counter is reset during
264 * suspend-resume and the offset used to measure time needs to be
265 * corrected, post resume.
266 */
hv_save_sched_clock_state(void)267 static void hv_save_sched_clock_state(void)
268 {
269 old_save_sched_clock_state();
270 save_hv_clock_tsc_state();
271 }
272
hv_restore_sched_clock_state(void)273 static void hv_restore_sched_clock_state(void)
274 {
275 restore_hv_clock_tsc_state();
276 old_restore_sched_clock_state();
277 }
278
x86_setup_ops_for_tsc_pg_clock(void)279 static void __init x86_setup_ops_for_tsc_pg_clock(void)
280 {
281 if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE))
282 return;
283
284 old_save_sched_clock_state = x86_platform.save_sched_clock_state;
285 x86_platform.save_sched_clock_state = hv_save_sched_clock_state;
286
287 old_restore_sched_clock_state = x86_platform.restore_sched_clock_state;
288 x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state;
289 }
290 #endif /* CONFIG_HYPERV */
291
ms_hyperv_platform(void)292 static uint32_t __init ms_hyperv_platform(void)
293 {
294 u32 eax;
295 u32 hyp_signature[3];
296
297 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
298 return 0;
299
300 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
301 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
302
303 if (eax < HYPERV_CPUID_MIN || eax > HYPERV_CPUID_MAX ||
304 memcmp("Microsoft Hv", hyp_signature, 12))
305 return 0;
306
307 /* HYPERCALL and VP_INDEX MSRs are mandatory for all features. */
308 eax = cpuid_eax(HYPERV_CPUID_FEATURES);
309 if (!(eax & HV_MSR_HYPERCALL_AVAILABLE)) {
310 pr_warn("x86/hyperv: HYPERCALL MSR not available.\n");
311 return 0;
312 }
313 if (!(eax & HV_MSR_VP_INDEX_AVAILABLE)) {
314 pr_warn("x86/hyperv: VP_INDEX MSR not available.\n");
315 return 0;
316 }
317
318 return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
319 }
320
321 #ifdef CONFIG_X86_LOCAL_APIC
322 /*
323 * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
324 * it difficult to process CHANNELMSG_UNLOAD in case of crash. Handle
325 * unknown NMI on the first CPU which gets it.
326 */
hv_nmi_unknown(unsigned int val,struct pt_regs * regs)327 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
328 {
329 static atomic_t nmi_cpu = ATOMIC_INIT(-1);
330 unsigned int old_cpu, this_cpu;
331
332 if (!unknown_nmi_panic)
333 return NMI_DONE;
334
335 old_cpu = -1;
336 this_cpu = raw_smp_processor_id();
337 if (!atomic_try_cmpxchg(&nmi_cpu, &old_cpu, this_cpu))
338 return NMI_HANDLED;
339
340 return NMI_DONE;
341 }
342 #endif
343
hv_get_tsc_khz(void)344 static unsigned long hv_get_tsc_khz(void)
345 {
346 unsigned long freq;
347
348 rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
349
350 return freq / 1000;
351 }
352
353 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
hv_smp_prepare_boot_cpu(void)354 static void __init hv_smp_prepare_boot_cpu(void)
355 {
356 native_smp_prepare_boot_cpu();
357 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
358 hv_init_spinlocks();
359 #endif
360 }
361
hv_smp_prepare_cpus(unsigned int max_cpus)362 static void __init hv_smp_prepare_cpus(unsigned int max_cpus)
363 {
364 #ifdef CONFIG_X86_64
365 int i;
366 int ret;
367 #endif
368
369 native_smp_prepare_cpus(max_cpus);
370
371 /*
372 * Override wakeup_secondary_cpu_64 callback for SEV-SNP
373 * enlightened guest.
374 */
375 if (!ms_hyperv.paravisor_present && hv_isolation_type_snp()) {
376 apic->wakeup_secondary_cpu_64 = hv_snp_boot_ap;
377 return;
378 }
379
380 #ifdef CONFIG_X86_64
381 for_each_present_cpu(i) {
382 if (i == 0)
383 continue;
384 ret = hv_call_add_logical_proc(numa_cpu_node(i), i, cpu_physical_id(i));
385 BUG_ON(ret);
386 }
387
388 for_each_present_cpu(i) {
389 if (i == 0)
390 continue;
391 ret = hv_call_create_vp(numa_cpu_node(i), hv_current_partition_id, i, i);
392 BUG_ON(ret);
393 }
394 #endif
395 }
396 #endif
397
398 /*
399 * When a fully enlightened TDX VM runs on Hyper-V, the firmware sets the
400 * HW_REDUCED flag: refer to acpi_tb_create_local_fadt(). Consequently ttyS0
401 * interrupts can't work because request_irq() -> ... -> irq_to_desc() returns
402 * NULL for ttyS0. This happens because mp_config_acpi_legacy_irqs() sees a
403 * nr_legacy_irqs() of 0, so it doesn't initialize the array 'mp_irqs[]', and
404 * later setup_IO_APIC_irqs() -> find_irq_entry() fails to find the legacy irqs
405 * from the array and hence doesn't create the necessary irq description info.
406 *
407 * Clone arch/x86/kernel/acpi/boot.c: acpi_generic_reduced_hw_init() here,
408 * except don't change 'legacy_pic', which keeps its default value
409 * 'default_legacy_pic'. This way, mp_config_acpi_legacy_irqs() sees a non-zero
410 * nr_legacy_irqs() and eventually serial console interrupts works properly.
411 */
reduced_hw_init(void)412 static void __init reduced_hw_init(void)
413 {
414 x86_init.timers.timer_init = x86_init_noop;
415 x86_init.irqs.pre_vector_init = x86_init_noop;
416 }
417
hv_get_hypervisor_version(union hv_hypervisor_version_info * info)418 int hv_get_hypervisor_version(union hv_hypervisor_version_info *info)
419 {
420 unsigned int hv_max_functions;
421
422 hv_max_functions = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
423 if (hv_max_functions < HYPERV_CPUID_VERSION) {
424 pr_err("%s: Could not detect Hyper-V version\n", __func__);
425 return -ENODEV;
426 }
427
428 cpuid(HYPERV_CPUID_VERSION, &info->eax, &info->ebx, &info->ecx, &info->edx);
429
430 return 0;
431 }
432 EXPORT_SYMBOL_GPL(hv_get_hypervisor_version);
433
ms_hyperv_init_platform(void)434 static void __init ms_hyperv_init_platform(void)
435 {
436 int hv_max_functions_eax;
437
438 #ifdef CONFIG_PARAVIRT
439 pv_info.name = "Hyper-V";
440 #endif
441
442 /*
443 * Extract the features and hints
444 */
445 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
446 ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES);
447 ms_hyperv.ext_features = cpuid_ecx(HYPERV_CPUID_FEATURES);
448 ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
449 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
450
451 hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
452
453 pr_info("Hyper-V: privilege flags low %#x, high %#x, ext %#x, hints %#x, misc %#x\n",
454 ms_hyperv.features, ms_hyperv.priv_high,
455 ms_hyperv.ext_features, ms_hyperv.hints,
456 ms_hyperv.misc_features);
457
458 ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
459 ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
460
461 pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
462 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
463
464 hv_identify_partition_type();
465
466 if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) {
467 hv_nested = true;
468 pr_info("Hyper-V: running on a nested hypervisor\n");
469 }
470
471 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
472 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
473 x86_platform.calibrate_tsc = hv_get_tsc_khz;
474 x86_platform.calibrate_cpu = hv_get_tsc_khz;
475 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
476 }
477
478 if (ms_hyperv.priv_high & HV_ISOLATION) {
479 ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG);
480 ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG);
481
482 if (ms_hyperv.shared_gpa_boundary_active)
483 ms_hyperv.shared_gpa_boundary =
484 BIT_ULL(ms_hyperv.shared_gpa_boundary_bits);
485
486 hyperv_paravisor_present = !!ms_hyperv.paravisor_present;
487
488 pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n",
489 ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b);
490
491
492 if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) {
493 static_branch_enable(&isolation_type_snp);
494 } else if (hv_get_isolation_type() == HV_ISOLATION_TYPE_TDX) {
495 static_branch_enable(&isolation_type_tdx);
496
497 /* A TDX VM must use x2APIC and doesn't use lazy EOI. */
498 ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED;
499
500 if (!ms_hyperv.paravisor_present) {
501 /*
502 * Mark the Hyper-V TSC page feature as disabled
503 * in a TDX VM without paravisor so that the
504 * Invariant TSC, which is a better clocksource
505 * anyway, is used instead.
506 */
507 ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE;
508
509 /*
510 * The Invariant TSC is expected to be available
511 * in a TDX VM without paravisor, but if not,
512 * print a warning message. The slower Hyper-V MSR-based
513 * Ref Counter should end up being the clocksource.
514 */
515 if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT))
516 pr_warn("Hyper-V: Invariant TSC is unavailable\n");
517
518 /* HV_MSR_CRASH_CTL is unsupported. */
519 ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE;
520
521 /* Don't trust Hyper-V's TLB-flushing hypercalls. */
522 ms_hyperv.hints &= ~HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
523
524 x86_init.acpi.reduced_hw_early_init = reduced_hw_init;
525 }
526 }
527 }
528
529 if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
530 ms_hyperv.nested_features =
531 cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
532 pr_info("Hyper-V: Nested features: 0x%x\n",
533 ms_hyperv.nested_features);
534 }
535
536 #ifdef CONFIG_X86_LOCAL_APIC
537 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
538 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
539 /*
540 * Get the APIC frequency.
541 */
542 u64 hv_lapic_frequency;
543
544 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
545 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
546 lapic_timer_period = hv_lapic_frequency;
547 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
548 lapic_timer_period);
549 }
550
551 register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
552 "hv_nmi_unknown");
553 #endif
554
555 #ifdef CONFIG_X86_IO_APIC
556 no_timer_check = 1;
557 #endif
558
559 #if IS_ENABLED(CONFIG_HYPERV)
560 #if defined(CONFIG_KEXEC_CORE)
561 machine_ops.shutdown = hv_machine_shutdown;
562 #endif
563 #if defined(CONFIG_CRASH_DUMP)
564 machine_ops.crash_shutdown = hv_machine_crash_shutdown;
565 #endif
566 #endif
567 if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) {
568 /*
569 * Writing to synthetic MSR 0x40000118 updates/changes the
570 * guest visible CPUIDs. Setting bit 0 of this MSR enables
571 * guests to report invariant TSC feature through CPUID
572 * instruction, CPUID 0x800000007/EDX, bit 8. See code in
573 * early_init_intel() where this bit is examined. The
574 * setting of this MSR bit should happen before init_intel()
575 * is called.
576 */
577 wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC);
578 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
579 }
580
581 /*
582 * Generation 2 instances don't support reading the NMI status from
583 * 0x61 port.
584 */
585 if (efi_enabled(EFI_BOOT))
586 x86_platform.get_nmi_reason = hv_get_nmi_reason;
587
588 #if IS_ENABLED(CONFIG_HYPERV)
589 if ((hv_get_isolation_type() == HV_ISOLATION_TYPE_VBS) ||
590 ms_hyperv.paravisor_present)
591 hv_vtom_init();
592 /*
593 * Setup the hook to get control post apic initialization.
594 */
595 x86_platform.apic_post_init = hyperv_init;
596 hyperv_setup_mmu_ops();
597
598 /* Install system interrupt handler for hypervisor callback */
599 sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback);
600
601 /* Install system interrupt handler for reenlightenment notifications */
602 if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) {
603 sysvec_install(HYPERV_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment);
604 }
605
606 /* Install system interrupt handler for stimer0 */
607 if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) {
608 sysvec_install(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0);
609 }
610
611 # ifdef CONFIG_SMP
612 smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
613 if (hv_root_partition() ||
614 (!ms_hyperv.paravisor_present && hv_isolation_type_snp()))
615 smp_ops.smp_prepare_cpus = hv_smp_prepare_cpus;
616 # endif
617
618 /*
619 * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
620 * set x2apic destination mode to physical mode when x2apic is available
621 * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
622 * have 8-bit APIC id.
623 */
624 # ifdef CONFIG_X86_X2APIC
625 if (x2apic_supported())
626 x2apic_phys = 1;
627 # endif
628
629 /* Register Hyper-V specific clocksource */
630 hv_init_clocksource();
631 x86_setup_ops_for_tsc_pg_clock();
632 hv_vtl_init_platform();
633 #endif
634 /*
635 * TSC should be marked as unstable only after Hyper-V
636 * clocksource has been initialized. This ensures that the
637 * stability of the sched_clock is not altered.
638 */
639 if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT))
640 mark_tsc_unstable("running on Hyper-V");
641
642 hardlockup_detector_disable();
643 }
644
ms_hyperv_x2apic_available(void)645 static bool __init ms_hyperv_x2apic_available(void)
646 {
647 return x2apic_supported();
648 }
649
650 /*
651 * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping()
652 * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the
653 * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg().
654 *
655 * Note: for a VM on Hyper-V, the I/O-APIC is the only device which
656 * (logically) generates MSIs directly to the system APIC irq domain.
657 * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the
658 * pci-hyperv host bridge.
659 *
660 * Note: for a Hyper-V root partition, this will always return false.
661 * The hypervisor doesn't expose these HYPERV_CPUID_VIRT_STACK_* cpuids by
662 * default, they are implemented as intercepts by the Windows Hyper-V stack.
663 * Even a nested root partition (L2 root) will not get them because the
664 * nested (L1) hypervisor filters them out.
665 */
ms_hyperv_msi_ext_dest_id(void)666 static bool __init ms_hyperv_msi_ext_dest_id(void)
667 {
668 u32 eax;
669
670 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_INTERFACE);
671 if (eax != HYPERV_VS_INTERFACE_EAX_SIGNATURE)
672 return false;
673
674 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES);
675 return eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE;
676 }
677
678 #ifdef CONFIG_AMD_MEM_ENCRYPT
hv_sev_es_hcall_prepare(struct ghcb * ghcb,struct pt_regs * regs)679 static void hv_sev_es_hcall_prepare(struct ghcb *ghcb, struct pt_regs *regs)
680 {
681 /* RAX and CPL are already in the GHCB */
682 ghcb_set_rcx(ghcb, regs->cx);
683 ghcb_set_rdx(ghcb, regs->dx);
684 ghcb_set_r8(ghcb, regs->r8);
685 }
686
hv_sev_es_hcall_finish(struct ghcb * ghcb,struct pt_regs * regs)687 static bool hv_sev_es_hcall_finish(struct ghcb *ghcb, struct pt_regs *regs)
688 {
689 /* No checking of the return state needed */
690 return true;
691 }
692 #endif
693
694 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
695 .name = "Microsoft Hyper-V",
696 .detect = ms_hyperv_platform,
697 .type = X86_HYPER_MS_HYPERV,
698 .init.x2apic_available = ms_hyperv_x2apic_available,
699 .init.msi_ext_dest_id = ms_hyperv_msi_ext_dest_id,
700 .init.init_platform = ms_hyperv_init_platform,
701 .init.guest_late_init = ms_hyperv_late_init,
702 #ifdef CONFIG_AMD_MEM_ENCRYPT
703 .runtime.sev_es_hcall_prepare = hv_sev_es_hcall_prepare,
704 .runtime.sev_es_hcall_finish = hv_sev_es_hcall_finish,
705 #endif
706 };
707