1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_MSHYPER_H
3 #define _ASM_X86_MSHYPER_H
4
5 #include <linux/types.h>
6 #include <linux/nmi.h>
7 #include <linux/msi.h>
8 #include <linux/io.h>
9 #include <asm/nospec-branch.h>
10 #include <asm/paravirt.h>
11 #include <hyperv/hvhdk.h>
12
13 /*
14 * Hyper-V always provides a single IO-APIC at this MMIO address.
15 * Ideally, the value should be looked up in ACPI tables, but it
16 * is needed for mapping the IO-APIC early in boot on Confidential
17 * VMs, before ACPI functions can be used.
18 */
19 #define HV_IOAPIC_BASE_ADDRESS 0xfec00000
20
21 #define HV_VTL_NORMAL 0x0
22 #define HV_VTL_SECURE 0x1
23 #define HV_VTL_MGMT 0x2
24
25 union hv_ghcb;
26
27 DECLARE_STATIC_KEY_FALSE(isolation_type_snp);
28 DECLARE_STATIC_KEY_FALSE(isolation_type_tdx);
29
30 typedef int (*hyperv_fill_flush_list_func)(
31 struct hv_guest_mapping_flush_list *flush,
32 void *data);
33
34 void hyperv_vector_handler(struct pt_regs *regs);
35
hv_get_nmi_reason(void)36 static inline unsigned char hv_get_nmi_reason(void)
37 {
38 return 0;
39 }
40
41 #if IS_ENABLED(CONFIG_HYPERV)
42 extern bool hyperv_paravisor_present;
43
44 extern void *hv_hypercall_pg;
45
46 extern union hv_ghcb * __percpu *hv_ghcb_pg;
47
48 bool hv_isolation_type_snp(void);
49 bool hv_isolation_type_tdx(void);
50 u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
51
52 /*
53 * DEFAULT INIT GPAT and SEGMENT LIMIT value in struct VMSA
54 * to start AP in enlightened SEV guest.
55 */
56 #define HV_AP_INIT_GPAT_DEFAULT 0x0007040600070406ULL
57 #define HV_AP_SEGMENT_LIMIT 0xffffffff
58
59 /*
60 * If the hypercall involves no input or output parameters, the hypervisor
61 * ignores the corresponding GPA pointer.
62 */
hv_do_hypercall(u64 control,void * input,void * output)63 static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
64 {
65 u64 input_address = input ? virt_to_phys(input) : 0;
66 u64 output_address = output ? virt_to_phys(output) : 0;
67 u64 hv_status;
68
69 #ifdef CONFIG_X86_64
70 if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
71 return hv_tdx_hypercall(control, input_address, output_address);
72
73 if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
74 __asm__ __volatile__("mov %[output_address], %%r8\n"
75 "vmmcall"
76 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
77 "+c" (control), "+d" (input_address)
78 : [output_address] "r" (output_address)
79 : "cc", "memory", "r8", "r9", "r10", "r11");
80 return hv_status;
81 }
82
83 if (!hv_hypercall_pg)
84 return U64_MAX;
85
86 __asm__ __volatile__("mov %[output_address], %%r8\n"
87 CALL_NOSPEC
88 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
89 "+c" (control), "+d" (input_address)
90 : [output_address] "r" (output_address),
91 THUNK_TARGET(hv_hypercall_pg)
92 : "cc", "memory", "r8", "r9", "r10", "r11");
93 #else
94 u32 input_address_hi = upper_32_bits(input_address);
95 u32 input_address_lo = lower_32_bits(input_address);
96 u32 output_address_hi = upper_32_bits(output_address);
97 u32 output_address_lo = lower_32_bits(output_address);
98
99 if (!hv_hypercall_pg)
100 return U64_MAX;
101
102 __asm__ __volatile__(CALL_NOSPEC
103 : "=A" (hv_status),
104 "+c" (input_address_lo), ASM_CALL_CONSTRAINT
105 : "A" (control),
106 "b" (input_address_hi),
107 "D"(output_address_hi), "S"(output_address_lo),
108 THUNK_TARGET(hv_hypercall_pg)
109 : "cc", "memory");
110 #endif /* !x86_64 */
111 return hv_status;
112 }
113
114 /* Hypercall to the L0 hypervisor */
hv_do_nested_hypercall(u64 control,void * input,void * output)115 static inline u64 hv_do_nested_hypercall(u64 control, void *input, void *output)
116 {
117 return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output);
118 }
119
120 /* Fast hypercall with 8 bytes of input and no output */
_hv_do_fast_hypercall8(u64 control,u64 input1)121 static inline u64 _hv_do_fast_hypercall8(u64 control, u64 input1)
122 {
123 u64 hv_status;
124
125 #ifdef CONFIG_X86_64
126 if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
127 return hv_tdx_hypercall(control, input1, 0);
128
129 if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
130 __asm__ __volatile__(
131 "vmmcall"
132 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
133 "+c" (control), "+d" (input1)
134 :: "cc", "r8", "r9", "r10", "r11");
135 } else {
136 __asm__ __volatile__(CALL_NOSPEC
137 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
138 "+c" (control), "+d" (input1)
139 : THUNK_TARGET(hv_hypercall_pg)
140 : "cc", "r8", "r9", "r10", "r11");
141 }
142 #else
143 {
144 u32 input1_hi = upper_32_bits(input1);
145 u32 input1_lo = lower_32_bits(input1);
146
147 __asm__ __volatile__ (CALL_NOSPEC
148 : "=A"(hv_status),
149 "+c"(input1_lo),
150 ASM_CALL_CONSTRAINT
151 : "A" (control),
152 "b" (input1_hi),
153 THUNK_TARGET(hv_hypercall_pg)
154 : "cc", "edi", "esi");
155 }
156 #endif
157 return hv_status;
158 }
159
hv_do_fast_hypercall8(u16 code,u64 input1)160 static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
161 {
162 u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
163
164 return _hv_do_fast_hypercall8(control, input1);
165 }
166
hv_do_fast_nested_hypercall8(u16 code,u64 input1)167 static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
168 {
169 u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
170
171 return _hv_do_fast_hypercall8(control, input1);
172 }
173
174 /* Fast hypercall with 16 bytes of input */
_hv_do_fast_hypercall16(u64 control,u64 input1,u64 input2)175 static inline u64 _hv_do_fast_hypercall16(u64 control, u64 input1, u64 input2)
176 {
177 u64 hv_status;
178
179 #ifdef CONFIG_X86_64
180 if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
181 return hv_tdx_hypercall(control, input1, input2);
182
183 if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
184 __asm__ __volatile__("mov %[input2], %%r8\n"
185 "vmmcall"
186 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
187 "+c" (control), "+d" (input1)
188 : [input2] "r" (input2)
189 : "cc", "r8", "r9", "r10", "r11");
190 } else {
191 __asm__ __volatile__("mov %[input2], %%r8\n"
192 CALL_NOSPEC
193 : "=a" (hv_status), ASM_CALL_CONSTRAINT,
194 "+c" (control), "+d" (input1)
195 : [input2] "r" (input2),
196 THUNK_TARGET(hv_hypercall_pg)
197 : "cc", "r8", "r9", "r10", "r11");
198 }
199 #else
200 {
201 u32 input1_hi = upper_32_bits(input1);
202 u32 input1_lo = lower_32_bits(input1);
203 u32 input2_hi = upper_32_bits(input2);
204 u32 input2_lo = lower_32_bits(input2);
205
206 __asm__ __volatile__ (CALL_NOSPEC
207 : "=A"(hv_status),
208 "+c"(input1_lo), ASM_CALL_CONSTRAINT
209 : "A" (control), "b" (input1_hi),
210 "D"(input2_hi), "S"(input2_lo),
211 THUNK_TARGET(hv_hypercall_pg)
212 : "cc");
213 }
214 #endif
215 return hv_status;
216 }
217
hv_do_fast_hypercall16(u16 code,u64 input1,u64 input2)218 static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
219 {
220 u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
221
222 return _hv_do_fast_hypercall16(control, input1, input2);
223 }
224
hv_do_fast_nested_hypercall16(u16 code,u64 input1,u64 input2)225 static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
226 {
227 u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
228
229 return _hv_do_fast_hypercall16(control, input1, input2);
230 }
231
232 extern struct hv_vp_assist_page **hv_vp_assist_page;
233
hv_get_vp_assist_page(unsigned int cpu)234 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
235 {
236 if (!hv_vp_assist_page)
237 return NULL;
238
239 return hv_vp_assist_page[cpu];
240 }
241
242 void __init hyperv_init(void);
243 void hyperv_setup_mmu_ops(void);
244 void set_hv_tscchange_cb(void (*cb)(void));
245 void clear_hv_tscchange_cb(void);
246 void hyperv_stop_tsc_emulation(void);
247 int hyperv_flush_guest_mapping(u64 as);
248 int hyperv_flush_guest_mapping_range(u64 as,
249 hyperv_fill_flush_list_func fill_func, void *data);
250 int hyperv_fill_flush_guest_mapping_list(
251 struct hv_guest_mapping_flush_list *flush,
252 u64 start_gfn, u64 end_gfn);
253
254 #ifdef CONFIG_X86_64
255 void hv_apic_init(void);
256 void __init hv_init_spinlocks(void);
257 bool hv_vcpu_is_preempted(int vcpu);
258 #else
hv_apic_init(void)259 static inline void hv_apic_init(void) {}
260 #endif
261
262 struct irq_domain *hv_create_pci_msi_domain(void);
263
264 int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
265 struct hv_interrupt_entry *entry);
266 int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
267
268 #ifdef CONFIG_AMD_MEM_ENCRYPT
269 bool hv_ghcb_negotiate_protocol(void);
270 void __noreturn hv_ghcb_terminate(unsigned int set, unsigned int reason);
271 int hv_snp_boot_ap(u32 cpu, unsigned long start_ip);
272 #else
hv_ghcb_negotiate_protocol(void)273 static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
hv_ghcb_terminate(unsigned int set,unsigned int reason)274 static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
hv_snp_boot_ap(u32 cpu,unsigned long start_ip)275 static inline int hv_snp_boot_ap(u32 cpu, unsigned long start_ip) { return 0; }
276 #endif
277
278 #if defined(CONFIG_AMD_MEM_ENCRYPT) || defined(CONFIG_INTEL_TDX_GUEST)
279 void hv_vtom_init(void);
280 void hv_ivm_msr_write(u64 msr, u64 value);
281 void hv_ivm_msr_read(u64 msr, u64 *value);
282 #else
hv_vtom_init(void)283 static inline void hv_vtom_init(void) {}
hv_ivm_msr_write(u64 msr,u64 value)284 static inline void hv_ivm_msr_write(u64 msr, u64 value) {}
hv_ivm_msr_read(u64 msr,u64 * value)285 static inline void hv_ivm_msr_read(u64 msr, u64 *value) {}
286 #endif
287
hv_is_synic_msr(unsigned int reg)288 static inline bool hv_is_synic_msr(unsigned int reg)
289 {
290 return (reg >= HV_X64_MSR_SCONTROL) &&
291 (reg <= HV_X64_MSR_SINT15);
292 }
293
hv_is_sint_msr(unsigned int reg)294 static inline bool hv_is_sint_msr(unsigned int reg)
295 {
296 return (reg >= HV_X64_MSR_SINT0) &&
297 (reg <= HV_X64_MSR_SINT15);
298 }
299
300 u64 hv_get_msr(unsigned int reg);
301 void hv_set_msr(unsigned int reg, u64 value);
302 u64 hv_get_non_nested_msr(unsigned int reg);
303 void hv_set_non_nested_msr(unsigned int reg, u64 value);
304
hv_raw_get_msr(unsigned int reg)305 static __always_inline u64 hv_raw_get_msr(unsigned int reg)
306 {
307 return __rdmsr(reg);
308 }
309
310 #else /* CONFIG_HYPERV */
hyperv_init(void)311 static inline void hyperv_init(void) {}
hyperv_setup_mmu_ops(void)312 static inline void hyperv_setup_mmu_ops(void) {}
set_hv_tscchange_cb(void (* cb)(void))313 static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
clear_hv_tscchange_cb(void)314 static inline void clear_hv_tscchange_cb(void) {}
hyperv_stop_tsc_emulation(void)315 static inline void hyperv_stop_tsc_emulation(void) {};
hv_get_vp_assist_page(unsigned int cpu)316 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
317 {
318 return NULL;
319 }
hyperv_flush_guest_mapping(u64 as)320 static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
hyperv_flush_guest_mapping_range(u64 as,hyperv_fill_flush_list_func fill_func,void * data)321 static inline int hyperv_flush_guest_mapping_range(u64 as,
322 hyperv_fill_flush_list_func fill_func, void *data)
323 {
324 return -1;
325 }
hv_set_msr(unsigned int reg,u64 value)326 static inline void hv_set_msr(unsigned int reg, u64 value) { }
hv_get_msr(unsigned int reg)327 static inline u64 hv_get_msr(unsigned int reg) { return 0; }
hv_set_non_nested_msr(unsigned int reg,u64 value)328 static inline void hv_set_non_nested_msr(unsigned int reg, u64 value) { }
hv_get_non_nested_msr(unsigned int reg)329 static inline u64 hv_get_non_nested_msr(unsigned int reg) { return 0; }
330 #endif /* CONFIG_HYPERV */
331
332
333 #ifdef CONFIG_HYPERV_VTL_MODE
334 void __init hv_vtl_init_platform(void);
335 int __init hv_vtl_early_init(void);
336 #else
hv_vtl_init_platform(void)337 static inline void __init hv_vtl_init_platform(void) {}
hv_vtl_early_init(void)338 static inline int __init hv_vtl_early_init(void) { return 0; }
339 #endif
340
341 #include <asm-generic/mshyperv.h>
342
343 #endif
344