1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_VMX_VMCS_H
3 #define __KVM_X86_VMX_VMCS_H
4
5 #include <linux/ktime.h>
6 #include <linux/list.h>
7 #include <linux/nospec.h>
8
9 #include <asm/kvm.h>
10 #include <asm/vmx.h>
11
12 #include "capabilities.h"
13
14 /*
15 * Indexing into the vmcs12 uses the VMCS encoding rotated left by 6 as a very
16 * rudimentary compression of the range of indices. The compression ratio is
17 * good enough to allow KVM to use a (very sparsely populated) array without
18 * wasting too much memory, while the "algorithm" is fast enough to be used to
19 * lookup vmcs12 fields on-demand, e.g. for emulation.
20 */
21 #define ROL16(val, n) ((u16)(((u16)(val) << (n)) | ((u16)(val) >> (16 - (n)))))
22 #define VMCS12_IDX_TO_ENC(idx) ROL16(idx, 10)
23 #define ENC_TO_VMCS12_IDX(enc) ROL16(enc, 6)
24
25 struct vmcs_hdr {
26 u32 revision_id:31;
27 u32 shadow_vmcs:1;
28 };
29
30 struct vmcs {
31 struct vmcs_hdr hdr;
32 u32 abort;
33 char data[];
34 };
35
36 DECLARE_PER_CPU(struct vmcs *, current_vmcs);
37
38 /*
39 * vmcs_host_state tracks registers that are loaded from the VMCS on VMEXIT
40 * and whose values change infrequently, but are not constant. I.e. this is
41 * used as a write-through cache of the corresponding VMCS fields.
42 */
43 struct vmcs_host_state {
44 unsigned long cr3; /* May not match real cr3 */
45 unsigned long cr4; /* May not match real cr4 */
46 unsigned long gs_base;
47 unsigned long fs_base;
48 unsigned long rsp;
49
50 u16 fs_sel, gs_sel, ldt_sel;
51 #ifdef CONFIG_X86_64
52 u16 ds_sel, es_sel;
53 #endif
54 };
55
56 struct vmcs_controls_shadow {
57 u32 vm_entry;
58 u32 vm_exit;
59 u32 pin;
60 u32 exec;
61 u32 secondary_exec;
62 u64 tertiary_exec;
63 };
64
65 /*
66 * Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also
67 * remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs
68 * loaded on this CPU (so we can clear them if the CPU goes down).
69 */
70 struct loaded_vmcs {
71 struct vmcs *vmcs;
72 struct vmcs *shadow_vmcs;
73 int cpu;
74 bool launched;
75 bool nmi_known_unmasked;
76 bool hv_timer_soft_disabled;
77 /* Support for vnmi-less CPUs */
78 int soft_vnmi_blocked;
79 ktime_t entry_time;
80 s64 vnmi_blocked_time;
81 unsigned long *msr_bitmap;
82 struct list_head loaded_vmcss_on_cpu_link;
83 struct vmcs_host_state host_state;
84 struct vmcs_controls_shadow controls_shadow;
85 };
86
is_intr_type(u32 intr_info,u32 type)87 static __always_inline bool is_intr_type(u32 intr_info, u32 type)
88 {
89 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK;
90
91 return (intr_info & mask) == (INTR_INFO_VALID_MASK | type);
92 }
93
is_intr_type_n(u32 intr_info,u32 type,u8 vector)94 static inline bool is_intr_type_n(u32 intr_info, u32 type, u8 vector)
95 {
96 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK |
97 INTR_INFO_VECTOR_MASK;
98
99 return (intr_info & mask) == (INTR_INFO_VALID_MASK | type | vector);
100 }
101
is_exception_n(u32 intr_info,u8 vector)102 static inline bool is_exception_n(u32 intr_info, u8 vector)
103 {
104 return is_intr_type_n(intr_info, INTR_TYPE_HARD_EXCEPTION, vector);
105 }
106
is_debug(u32 intr_info)107 static inline bool is_debug(u32 intr_info)
108 {
109 return is_exception_n(intr_info, DB_VECTOR);
110 }
111
is_breakpoint(u32 intr_info)112 static inline bool is_breakpoint(u32 intr_info)
113 {
114 return is_exception_n(intr_info, BP_VECTOR);
115 }
116
is_double_fault(u32 intr_info)117 static inline bool is_double_fault(u32 intr_info)
118 {
119 return is_exception_n(intr_info, DF_VECTOR);
120 }
121
is_page_fault(u32 intr_info)122 static inline bool is_page_fault(u32 intr_info)
123 {
124 return is_exception_n(intr_info, PF_VECTOR);
125 }
126
is_invalid_opcode(u32 intr_info)127 static inline bool is_invalid_opcode(u32 intr_info)
128 {
129 return is_exception_n(intr_info, UD_VECTOR);
130 }
131
is_gp_fault(u32 intr_info)132 static inline bool is_gp_fault(u32 intr_info)
133 {
134 return is_exception_n(intr_info, GP_VECTOR);
135 }
136
is_alignment_check(u32 intr_info)137 static inline bool is_alignment_check(u32 intr_info)
138 {
139 return is_exception_n(intr_info, AC_VECTOR);
140 }
141
is_machine_check(u32 intr_info)142 static inline bool is_machine_check(u32 intr_info)
143 {
144 return is_exception_n(intr_info, MC_VECTOR);
145 }
146
is_nm_fault(u32 intr_info)147 static inline bool is_nm_fault(u32 intr_info)
148 {
149 return is_exception_n(intr_info, NM_VECTOR);
150 }
151
is_ve_fault(u32 intr_info)152 static inline bool is_ve_fault(u32 intr_info)
153 {
154 return is_exception_n(intr_info, VE_VECTOR);
155 }
156
157 /* Undocumented: icebp/int1 */
is_icebp(u32 intr_info)158 static inline bool is_icebp(u32 intr_info)
159 {
160 return is_intr_type(intr_info, INTR_TYPE_PRIV_SW_EXCEPTION);
161 }
162
is_nmi(u32 intr_info)163 static __always_inline bool is_nmi(u32 intr_info)
164 {
165 return is_intr_type(intr_info, INTR_TYPE_NMI_INTR);
166 }
167
is_external_intr(u32 intr_info)168 static inline bool is_external_intr(u32 intr_info)
169 {
170 return is_intr_type(intr_info, INTR_TYPE_EXT_INTR);
171 }
172
is_exception_with_error_code(u32 intr_info)173 static inline bool is_exception_with_error_code(u32 intr_info)
174 {
175 const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_DELIVER_CODE_MASK;
176
177 return (intr_info & mask) == mask;
178 }
179
180 enum vmcs_field_width {
181 VMCS_FIELD_WIDTH_U16 = 0,
182 VMCS_FIELD_WIDTH_U64 = 1,
183 VMCS_FIELD_WIDTH_U32 = 2,
184 VMCS_FIELD_WIDTH_NATURAL_WIDTH = 3
185 };
186
vmcs_field_width(unsigned long field)187 static inline int vmcs_field_width(unsigned long field)
188 {
189 if (0x1 & field) /* the *_HIGH fields are all 32 bit */
190 return VMCS_FIELD_WIDTH_U32;
191 return (field >> 13) & 0x3;
192 }
193
vmcs_field_readonly(unsigned long field)194 static inline int vmcs_field_readonly(unsigned long field)
195 {
196 return (((field >> 10) & 0x3) == 1);
197 }
198
199 #define VMCS_FIELD_INDEX_SHIFT (1)
200 #define VMCS_FIELD_INDEX_MASK GENMASK(9, 1)
201
vmcs_field_index(unsigned long field)202 static inline unsigned int vmcs_field_index(unsigned long field)
203 {
204 return (field & VMCS_FIELD_INDEX_MASK) >> VMCS_FIELD_INDEX_SHIFT;
205 }
206
207 #endif /* __KVM_X86_VMX_VMCS_H */
208