1 /*
2 * Probe guest virtual addresses for access permissions.
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 * SPDX-License-Identifier: LGPL-2.1-or-later
6 */
7 #ifndef ACCEL_TCG_PROBE_H
8 #define ACCEL_TCG_PROBE_H
9
10 #include "exec/mmu-access-type.h"
11 #include "exec/vaddr.h"
12
13 /**
14 * probe_access:
15 * @env: CPUArchState
16 * @addr: guest virtual address to look up
17 * @size: size of the access
18 * @access_type: read, write or execute permission
19 * @mmu_idx: MMU index to use for lookup
20 * @retaddr: return address for unwinding
21 *
22 * Look up the guest virtual address @addr. Raise an exception if the
23 * page does not satisfy @access_type. Raise an exception if the
24 * access (@addr, @size) hits a watchpoint. For writes, mark a clean
25 * page as dirty.
26 *
27 * Finally, return the host address for a page that is backed by RAM,
28 * or NULL if the page requires I/O.
29 */
30 void *probe_access(CPUArchState *env, vaddr addr, int size,
31 MMUAccessType access_type, int mmu_idx, uintptr_t retaddr);
32
probe_write(CPUArchState * env,vaddr addr,int size,int mmu_idx,uintptr_t retaddr)33 static inline void *probe_write(CPUArchState *env, vaddr addr, int size,
34 int mmu_idx, uintptr_t retaddr)
35 {
36 return probe_access(env, addr, size, MMU_DATA_STORE, mmu_idx, retaddr);
37 }
38
probe_read(CPUArchState * env,vaddr addr,int size,int mmu_idx,uintptr_t retaddr)39 static inline void *probe_read(CPUArchState *env, vaddr addr, int size,
40 int mmu_idx, uintptr_t retaddr)
41 {
42 return probe_access(env, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr);
43 }
44
45 /**
46 * probe_access_flags:
47 * @env: CPUArchState
48 * @addr: guest virtual address to look up
49 * @size: size of the access
50 * @access_type: read, write or execute permission
51 * @mmu_idx: MMU index to use for lookup
52 * @nonfault: suppress the fault
53 * @phost: return value for host address
54 * @retaddr: return address for unwinding
55 *
56 * Similar to probe_access, loosely returning the TLB_FLAGS_MASK for
57 * the page, and storing the host address for RAM in @phost.
58 *
59 * If @nonfault is set, do not raise an exception but return TLB_INVALID_MASK.
60 * Do not handle watchpoints, but include TLB_WATCHPOINT in the returned flags.
61 * Do handle clean pages, so exclude TLB_NOTDIRY from the returned flags.
62 * For simplicity, all "mmio-like" flags are folded to TLB_MMIO.
63 */
64 int probe_access_flags(CPUArchState *env, vaddr addr, int size,
65 MMUAccessType access_type, int mmu_idx,
66 bool nonfault, void **phost, uintptr_t retaddr);
67
68 #ifndef CONFIG_USER_ONLY
69
70 /**
71 * probe_access_full:
72 * Like probe_access_flags, except also return into @pfull.
73 *
74 * The CPUTLBEntryFull structure returned via @pfull is transient
75 * and must be consumed or copied immediately, before any further
76 * access or changes to TLB @mmu_idx.
77 *
78 * This function will not fault if @nonfault is set, but will
79 * return TLB_INVALID_MASK if the page is not mapped, or is not
80 * accessible with @access_type.
81 *
82 * This function will return TLB_MMIO in order to force the access
83 * to be handled out-of-line if plugins wish to instrument the access.
84 */
85 int probe_access_full(CPUArchState *env, vaddr addr, int size,
86 MMUAccessType access_type, int mmu_idx,
87 bool nonfault, void **phost,
88 CPUTLBEntryFull **pfull, uintptr_t retaddr);
89
90 /**
91 * probe_access_full_mmu:
92 * Like probe_access_full, except:
93 *
94 * This function is intended to be used for page table accesses by
95 * the target mmu itself. Since such page walking happens while
96 * handling another potential mmu fault, this function never raises
97 * exceptions (akin to @nonfault true for probe_access_full).
98 * Likewise this function does not trigger plugin instrumentation.
99 */
100 int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
101 MMUAccessType access_type, int mmu_idx,
102 void **phost, CPUTLBEntryFull **pfull);
103
104 #endif /* !CONFIG_USER_ONLY */
105
106 /**
107 * tlb_vaddr_to_host:
108 * @env: CPUArchState
109 * @addr: guest virtual address to look up
110 * @access_type: 0 for read, 1 for write, 2 for execute
111 * @mmu_idx: MMU index to use for lookup
112 *
113 * Look up the specified guest virtual index in the TCG softmmu TLB.
114 * If we can translate a host virtual address suitable for direct RAM
115 * access, without causing a guest exception, then return it.
116 * Otherwise (TLB entry is for an I/O access, guest software
117 * TLB fill required, etc) return NULL.
118 */
119 void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr,
120 MMUAccessType access_type, int mmu_idx);
121
122 #endif
123