1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale Low Power SPI (LPSPI) for i.MX 8 9maintainers: 10 - Shawn Guo <shawnguo@kernel.org> 11 - Sascha Hauer <s.hauer@pengutronix.de> 12 - Fabio Estevam <festevam@gmail.com> 13 14allOf: 15 - $ref: /schemas/spi/spi-controller.yaml# 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - fsl,imx7ulp-spi 22 - fsl,imx8qxp-spi 23 - items: 24 - enum: 25 - fsl,imx8ulp-spi 26 - fsl,imx93-spi 27 - fsl,imx94-spi 28 - fsl,imx95-spi 29 - const: fsl,imx7ulp-spi 30 reg: 31 maxItems: 1 32 33 interrupts: 34 maxItems: 1 35 36 clocks: 37 items: 38 - description: SoC SPI per clock 39 - description: SoC SPI ipg clock 40 41 clock-names: 42 items: 43 - const: per 44 - const: ipg 45 46 dmas: 47 items: 48 - description: TX DMA Channel 49 - description: RX DMA Channel 50 51 dma-names: 52 items: 53 - const: tx 54 - const: rx 55 56 fsl,spi-only-use-cs1-sel: 57 description: 58 spi common code does not support use of CS signals discontinuously. 59 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add 60 this property to re-config the chipselect value in the LPSPI driver. 61 type: boolean 62 63 num-cs: 64 description: 65 number of chip selects. 66 minimum: 1 67 maximum: 2 68 default: 1 69 70 power-domains: 71 maxItems: 1 72 73required: 74 - compatible 75 - reg 76 - interrupts 77 - clocks 78 - clock-names 79 80unevaluatedProperties: false 81 82examples: 83 - | 84 #include <dt-bindings/clock/imx7ulp-clock.h> 85 #include <dt-bindings/interrupt-controller/arm-gic.h> 86 87 spi@40290000 { 88 compatible = "fsl,imx7ulp-spi"; 89 reg = <0x40290000 0x10000>; 90 interrupt-parent = <&intc>; 91 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 92 clocks = <&clks IMX7ULP_CLK_LPSPI2>, 93 <&clks IMX7ULP_CLK_DUMMY>; 94 clock-names = "per", "ipg"; 95 spi-slave; 96 fsl,spi-only-use-cs1-sel; 97 num-cs = <2>; 98 }; 99