1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip designware mobile storage host controller 8 9description: 10 Rockchip uses the Synopsys designware mobile storage host controller 11 to interface a SoC with storage medium such as eMMC or SD/MMC cards. 12 This file documents the combined properties for the core Synopsys dw mshc 13 controller that are not already included in the synopsys-dw-mshc-common.yaml 14 file and the Rockchip specific extensions. 15 16allOf: 17 - $ref: synopsys-dw-mshc-common.yaml# 18 19maintainers: 20 - Heiko Stuebner <heiko@sntech.de> 21 22# Everything else is described in the common file 23properties: 24 compatible: 25 oneOf: 26 # for Rockchip RK2928 and before RK3288 27 - const: rockchip,rk2928-dw-mshc 28 # for Rockchip RK3288 29 - const: rockchip,rk3288-dw-mshc 30 - items: 31 - enum: 32 - rockchip,px30-dw-mshc 33 - rockchip,rk1808-dw-mshc 34 - rockchip,rk3036-dw-mshc 35 - rockchip,rk3128-dw-mshc 36 - rockchip,rk3228-dw-mshc 37 - rockchip,rk3308-dw-mshc 38 - rockchip,rk3328-dw-mshc 39 - rockchip,rk3368-dw-mshc 40 - rockchip,rk3399-dw-mshc 41 - rockchip,rk3528-dw-mshc 42 - rockchip,rk3562-dw-mshc 43 - rockchip,rk3568-dw-mshc 44 - rockchip,rk3588-dw-mshc 45 - rockchip,rv1108-dw-mshc 46 - rockchip,rv1126-dw-mshc 47 - const: rockchip,rk3288-dw-mshc 48 # for Rockchip RK3576 with phase tuning inside the controller 49 - const: rockchip,rk3576-dw-mshc 50 51 reg: 52 maxItems: 1 53 54 interrupts: 55 maxItems: 1 56 57 clocks: 58 minItems: 2 59 maxItems: 4 60 description: 61 Handle to "biu" and "ciu" clocks for the bus interface unit clock and 62 the card interface unit clock. If "ciu-drive" and "ciu-sample" are 63 specified in clock-names, it should also contain 64 handles to these clocks. 65 66 clock-names: 67 minItems: 2 68 items: 69 - const: biu 70 - const: ciu 71 - const: ciu-drive 72 - const: ciu-sample 73 description: 74 Apart from the clock-names "biu" and "ciu" two more clocks 75 "ciu-drive" and "ciu-sample" are supported. They are used 76 to control the clock phases, "ciu-sample" is required for tuning 77 high speed modes. 78 79 power-domains: 80 maxItems: 1 81 82 rockchip,default-sample-phase: 83 $ref: /schemas/types.yaml#/definitions/uint32 84 minimum: 0 85 maximum: 360 86 default: 0 87 description: 88 The default phase to set "ciu-sample" at probing, 89 low speeds or in case where all phases work at tuning time. 90 If not specified 0 deg will be used. 91 92 rockchip,desired-num-phases: 93 $ref: /schemas/types.yaml#/definitions/uint32 94 minimum: 0 95 maximum: 360 96 default: 360 97 description: 98 The desired number of times that the host execute tuning when needed. 99 If not specified, the host will do tuning for 360 times, 100 namely tuning for each degree. 101 102required: 103 - compatible 104 - reg 105 - interrupts 106 - clocks 107 - clock-names 108 109unevaluatedProperties: false 110 111examples: 112 - | 113 #include <dt-bindings/clock/rk3288-cru.h> 114 #include <dt-bindings/interrupt-controller/arm-gic.h> 115 #include <dt-bindings/interrupt-controller/irq.h> 116 sdmmc: mmc@ff0c0000 { 117 compatible = "rockchip,rk3288-dw-mshc"; 118 reg = <0xff0c0000 0x4000>; 119 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 120 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, 121 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; 122 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; 123 resets = <&cru SRST_MMC0>; 124 reset-names = "reset"; 125 fifo-depth = <0x100>; 126 max-frequency = <150000000>; 127 }; 128 129... 130