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| H A D | camss-csiphy-3ph-1-0.c | 88655d64210e36c926d9c8a2617ad97e0bc7a4ad Fri Mar 14 23:35:58 UTC 2025 Bryan O'Donoghue <bryan.odonoghue@linaro.org> media: qcom: camss: Add support for 3ph CSIPHY write settle delay
Currently we have an s32 value called delay which has been inherited from
the CamX code for PHY init. This unused value relates to a post-write delay
latching time.
In the silicon test-bench which provides the basis for the CamX code the
write settle times are specified in nanoseconds.
In the upstream kernel we currently take no notice of the delay value and
use all zero in any case.
Nanosecond granularity timing from the perspective of the kernel is total
overkill, however for some PHY init sequences introduction of a settle
delay has a use.
Add support to the 3ph init sequence for microsecond level delay. A
readback of written data would probably accomplish the same thing but,
since the PHY init sequences in the wild provide a delay value - we can
just add support here for that delay and consume the values given.
Generally these delays are probably not necessary but, they do speak to a
theoretical delay that silicon test-benches utilise and therefore are
worthwhile to replicate if the given PHY init sequence has the data.
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
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