Searched hist:"2899062614 ab68ffcd034909b5ea993d8403d6d6" (Results 1 – 2 of 2) sorted by relevance
| /qemu/accel/tcg/ |
| H A D | user-exec.c | 2899062614ab68ffcd034909b5ea993d8403d6d6 Wed Apr 12 11:43:16 UTC 2023 Richard Henderson <richard.henderson@linaro.org> accel/tcg: Add cpu_ld*_code_mmu
At least RISC-V has the need to be able to perform a read
using execute permissions, outside of translation.
Add helpers to facilitate this.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230325105429.1142530-9-richard.henderson@linaro.org>
Message-Id: <20230412114333.118895-9-richard.henderson@linaro.org>
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| H A D | cputlb.c | 2899062614ab68ffcd034909b5ea993d8403d6d6 Wed Apr 12 11:43:16 UTC 2023 Richard Henderson <richard.henderson@linaro.org> accel/tcg: Add cpu_ld*_code_mmu
At least RISC-V has the need to be able to perform a read
using execute permissions, outside of translation.
Add helpers to facilitate this.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230325105429.1142530-9-richard.henderson@linaro.org>
Message-Id: <20230412114333.118895-9-richard.henderson@linaro.org>
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