Searched hist:"289251 b033979234ed735a7b996a187880ed090e" (Results 1 – 4 of 4) sorted by relevance
| /qemu/include/hw/net/ |
| H A D | ftgmac100.h | 289251b033979234ed735a7b996a187880ed090e Wed Sep 25 14:32:47 UTC 2019 Cédric Le Goater <clg@kaod.org> aspeed: add support for the Aspeed MII controller of the AST2600
The AST2600 SoC has an extra controller to set the PHY registers.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-23-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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| /qemu/hw/net/ |
| H A D | ftgmac100.c | 289251b033979234ed735a7b996a187880ed090e Wed Sep 25 14:32:47 UTC 2019 Cédric Le Goater <clg@kaod.org> aspeed: add support for the Aspeed MII controller of the AST2600
The AST2600 SoC has an extra controller to set the PHY registers.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-23-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| /qemu/include/hw/arm/ |
| H A D | aspeed_soc.h | 289251b033979234ed735a7b996a187880ed090e Wed Sep 25 14:32:47 UTC 2019 Cédric Le Goater <clg@kaod.org> aspeed: add support for the Aspeed MII controller of the AST2600
The AST2600 SoC has an extra controller to set the PHY registers.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-23-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|
| /qemu/hw/arm/ |
| H A D | aspeed_ast2600.c | 289251b033979234ed735a7b996a187880ed090e Wed Sep 25 14:32:47 UTC 2019 Cédric Le Goater <clg@kaod.org> aspeed: add support for the Aspeed MII controller of the AST2600
The AST2600 SoC has an extra controller to set the PHY registers.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-23-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
|