Searched hist:"270629024 df1f9f4e704ce8325f958858c5cbff7" (Results 1 – 1 of 1) sorted by relevance
/qemu/disas/ |
H A D | riscv.c | 270629024df1f9f4e704ce8325f958858c5cbff7 Fri Feb 17 15:14:59 UTC 2023 Ivan Klokov <ivan.klokov@syntacore.com> disas/riscv Fix ctzw disassemble
Due to typo in opcode list, ctzw is disassembled as clzw instruction.
Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com> Fixes: 02c1b569a15b ("disas/riscv: Add Zb[abcs] instructions") Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20230217151459.54649-1-ivan.klokov@syntacore.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
|