Searched hist:"0 e27f3a5d0cbc0099ba8dcd7ff78e7f80d0c4f15" (Results 1 – 2 of 2) sorted by relevance
| /qemu/target/i386/hvf/ |
| H A D | x86_cpuid.c | 0e27f3a5d0cbc0099ba8dcd7ff78e7f80d0c4f15 Tue Nov 05 15:57:56 UTC 2024 Phil Dennis-Jordan <phil@philjordan.eu> i386/hvf: Integrates x2APIC support with hvf accel
Support for x2APIC mode was recently introduced in the software emulated
APIC implementation for TCG. Enabling it when using macOS’s hvf
accelerator is useful and significantly helps performance, as Qemu
currently uses the emulated APIC when running on hvf as well.
This change wires up the read & write operations for the MSR VM exits
and allow-lists the CPUID flag in the x86 hvf runtime.
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
Link: https://lore.kernel.org/r/20241105155800.5461-2-phil@philjordan.eu
Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
| /qemu/target/i386/emulate/ |
| H A D | x86_emu.c | 0e27f3a5d0cbc0099ba8dcd7ff78e7f80d0c4f15 Tue Nov 05 15:57:56 UTC 2024 Phil Dennis-Jordan <phil@philjordan.eu> i386/hvf: Integrates x2APIC support with hvf accel
Support for x2APIC mode was recently introduced in the software emulated
APIC implementation for TCG. Enabling it when using macOS’s hvf
accelerator is useful and significantly helps performance, as Qemu
currently uses the emulated APIC when running on hvf as well.
This change wires up the read & write operations for the MSR VM exits
and allow-lists the CPUID flag in the x86 hvf runtime.
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
Link: https://lore.kernel.org/r/20241105155800.5461-2-phil@philjordan.eu
Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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