/linux-5.10/drivers/usb/host/ |
D | xhci-mem.c | 3 * xHCI host controller driver 17 #include "xhci.h" 18 #include "xhci-trace.h" 19 #include "xhci-debugfs.h" 28 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, in xhci_segment_alloc() argument 36 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_segment_alloc() 42 seg->trbs = dma_pool_zalloc(xhci->segment_pool, flags, &dma); in xhci_segment_alloc() 52 dma_pool_free(xhci->segment_pool, seg->trbs, dma); in xhci_segment_alloc() 68 static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) in xhci_segment_free() argument 71 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma); in xhci_segment_free() [all …]
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D | xhci.c | 3 * xHCI host controller driver 21 #include "xhci.h" 22 #include "xhci-trace.h" 23 #include "xhci-mtk.h" 24 #include "xhci-debugfs.h" 25 #include "xhci-dbgcap.h" 85 * Disable interrupts and begin the xHCI halting process. 87 void xhci_quiesce(struct xhci_hcd *xhci) in xhci_quiesce() argument 94 halted = readl(&xhci->op_regs->status) & STS_HALT; in xhci_quiesce() 98 cmd = readl(&xhci->op_regs->command); in xhci_quiesce() [all …]
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D | xhci-pci.c | 3 * xHCI host controller driver PCI Bus Glue. 17 #include "xhci.h" 18 #include "xhci-trace.h" 19 #include "xhci-pci.h" 79 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev) in xhci_pci_reinit() argument 89 xhci_dbg(xhci, "MWI active\n"); in xhci_pci_reinit() 91 xhci_dbg(xhci, "Finished xhci_pci_reinit\n"); in xhci_pci_reinit() 95 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_pci_quirks() argument 105 xhci->quirks |= driver_data->quirks; in xhci_pci_quirks() 114 xhci->quirks |= XHCI_RESET_EP_QUIRK; in xhci_pci_quirks() [all …]
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D | xhci-ring.c | 3 * xHCI host controller driver 58 #include "xhci.h" 59 #include "xhci-trace.h" 60 #include "xhci-mtk.h" 139 static void next_trb(struct xhci_hcd *xhci, in next_trb() argument 156 void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring) in inc_deq() argument 199 * xHCI hardware can't handle the chain bit being cleared on a link TRB. 204 static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, in inc_enq() argument 234 (xhci->quirks & XHCI_AMD_0x96_HOST)) && in inc_enq() 235 !xhci_link_trb_quirk(xhci)) { in inc_enq() [all …]
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D | xhci-plat.c | 3 * xhci-plat.c - xHCI host controller driver platform Bus Glue. 8 * A lot of code borrowed from the Linux xHCI driver. 23 #include "xhci.h" 24 #include "xhci-plat.h" 25 #include "xhci-mvebu.h" 26 #include "xhci-rcar.h" 77 static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_plat_quirks() argument 79 struct xhci_plat_priv *priv = xhci_to_priv(xhci); in xhci_plat_quirks() 86 xhci->quirks |= XHCI_PLAT | priv->quirks; in xhci_plat_quirks() 131 .compatible = "generic-xhci", [all …]
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D | xhci-hub.c | 3 * xHCI host controller driver 15 #include "xhci.h" 16 #include "xhci-trace.h" 55 static int xhci_create_usb3_bos_desc(struct xhci_hcd *xhci, char *buf, in xhci_create_usb3_bos_desc() argument 67 /* does xhci support USB 3.1 Enhanced SuperSpeed */ in xhci_create_usb3_bos_desc() 68 for (i = 0; i < xhci->num_port_caps; i++) { in xhci_create_usb3_bos_desc() 69 if (xhci->port_caps[i].maj_rev == 0x03 && in xhci_create_usb3_bos_desc() 70 xhci->port_caps[i].min_rev >= 0x01) { in xhci_create_usb3_bos_desc() 72 port_cap = &xhci->port_caps[i]; in xhci_create_usb3_bos_desc() 78 /* does xhci provide a PSI table for SSA speed attributes? */ in xhci_create_usb3_bos_desc() [all …]
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D | Makefile | 6 # tell define_trace.h where to find the xhci trace header 14 xhci-hcd-y := xhci.o xhci-mem.o xhci-ext-caps.o 15 xhci-hcd-y += xhci-ring.o xhci-hub.o xhci-dbg.o 16 xhci-hcd-y += xhci-trace.o 19 xhci-hcd-y += xhci-dbgcap.o xhci-dbgtty.o 23 xhci-hcd-y += xhci-mtk-sch.o 26 xhci-plat-hcd-y := xhci-plat.o 28 xhci-plat-hcd-y += xhci-mvebu.o 31 xhci-plat-hcd-y += xhci-rcar.o 35 xhci-hcd-y += xhci-debugfs.o [all …]
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D | xhci-debugfs.c | 3 * xhci-debugfs.c - xHCI debugfs interface 13 #include "xhci.h" 14 #include "xhci-debugfs.h" 86 static struct xhci_regset *xhci_debugfs_alloc_regset(struct xhci_hcd *xhci) in xhci_debugfs_alloc_regset() argument 99 list_add_tail(®set->list, &xhci->regset_list); in xhci_debugfs_alloc_regset() 114 static void xhci_debugfs_regset(struct xhci_hcd *xhci, u32 base, in xhci_debugfs_regset() argument 122 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_debugfs_regset() 124 rgs = xhci_debugfs_alloc_regset(xhci); in xhci_debugfs_regset() 140 static void xhci_debugfs_extcap_regset(struct xhci_hcd *xhci, int cap_id, in xhci_debugfs_extcap_regset() argument 147 void __iomem *base = &xhci->cap_regs->hc_capbase; in xhci_debugfs_extcap_regset() [all …]
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D | xhci-histb.c | 3 * xHCI host controller driver for HiSilicon STB SoCs 19 #include "xhci.h" 69 * refer to xHCI spec in xhci_histb_config() 167 static void xhci_histb_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_histb_quirks() argument 174 xhci->quirks |= XHCI_PLAT; in xhci_histb_quirks() 203 struct xhci_hcd *xhci; in xhci_histb_probe() local 262 xhci = hcd_to_xhci(hcd); in xhci_histb_probe() 266 xhci->main_hcd = hcd; in xhci_histb_probe() 267 xhci->shared_hcd = usb_create_shared_hcd(driver, dev, dev_name(dev), in xhci_histb_probe() 269 if (!xhci->shared_hcd) { in xhci_histb_probe() [all …]
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D | xhci-debugfs.h | 3 * xhci-debugfs.h - xHCI debugfs interface 107 void xhci_debugfs_init(struct xhci_hcd *xhci); 108 void xhci_debugfs_exit(struct xhci_hcd *xhci); 111 void xhci_debugfs_create_slot(struct xhci_hcd *xhci, int slot_id); 112 void xhci_debugfs_remove_slot(struct xhci_hcd *xhci, int slot_id); 113 void xhci_debugfs_create_endpoint(struct xhci_hcd *xhci, 116 void xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci, 119 void xhci_debugfs_create_stream_files(struct xhci_hcd *xhci, 123 static inline void xhci_debugfs_init(struct xhci_hcd *xhci) { } in xhci_debugfs_init() argument 124 static inline void xhci_debugfs_exit(struct xhci_hcd *xhci) { } in xhci_debugfs_exit() argument [all …]
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D | xhci-mtk.c | 3 * MediaTek xHCI Host Controller Driver 22 #include "xhci.h" 23 #include "xhci-mtk.h" 379 static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci) in xhci_mtk_quirks() argument 381 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_mtk_quirks() 389 xhci->quirks |= XHCI_PLAT; in xhci_mtk_quirks() 390 xhci->quirks |= XHCI_MTK_HOST; in xhci_mtk_quirks() 395 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; in xhci_mtk_quirks() 397 xhci->quirks |= XHCI_LPM_SUPPORT; in xhci_mtk_quirks() 431 struct xhci_hcd *xhci; in xhci_mtk_probe() local [all …]
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D | xhci-ext-caps.c | 3 * XHCI extended capability handling 11 #include "xhci.h" 28 static int xhci_create_intel_xhci_sw_pdev(struct xhci_hcd *xhci, u32 cap_offset) in xhci_create_intel_xhci_sw_pdev() argument 30 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_create_intel_xhci_sw_pdev() 39 xhci_err(xhci, "couldn't allocate %s platform device\n", in xhci_create_intel_xhci_sw_pdev() 83 int xhci_ext_cap_init(struct xhci_hcd *xhci) in xhci_ext_cap_init() argument 85 void __iomem *base = &xhci->cap_regs->hc_capbase; in xhci_ext_cap_init() 96 if (xhci->quirks & XHCI_INTEL_USB_ROLE_SW) { in xhci_ext_cap_init() 97 ret = xhci_create_intel_xhci_sw_pdev(xhci, in xhci_ext_cap_init()
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D | xhci.h | 4 * xHCI host controller driver 21 /* Code sharing between pci-quirks and xhci hcd */ 22 #include "xhci-ext-caps.h" 25 /* xHCI PCI Configuration Registers */ 34 * xHCI register interface. 35 * This corresponds to the eXtensible Host Controller Interface (xHCI) 40 * struct xhci_cap_regs - xHCI Host Controller Capability Registers. 48 * @hcc_params2: HCCPARAMS2 Capability Parameters 2, xhci 1.1 only 58 __le32 hcc_params2; /* xhci 1.1 */ 155 * struct xhci_op_regs - xHCI Host Controller Operational Registers. [all …]
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D | xhci-dbgcap.c | 3 * xhci-dbgcap.c - xHCI debug capability support 13 #include "xhci.h" 14 #include "xhci-trace.h" 15 #include "xhci-dbgcap.h" 412 /* xhci 7.6.9, all three contexts; info, ep-out and ep-in. Each 64 bytes*/ in dbc_alloc_ctx() 917 static void xhci_do_dbc_exit(struct xhci_hcd *xhci) in xhci_do_dbc_exit() argument 921 spin_lock_irqsave(&xhci->lock, flags); in xhci_do_dbc_exit() 922 kfree(xhci->dbc); in xhci_do_dbc_exit() 923 xhci->dbc = NULL; in xhci_do_dbc_exit() 924 spin_unlock_irqrestore(&xhci->lock, flags); in xhci_do_dbc_exit() [all …]
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D | xhci-dbgcap.h | 3 * xhci-dbgcap.h - xHCI debug capability support 123 struct xhci_hcd *xhci; member 197 int xhci_dbc_init(struct xhci_hcd *xhci); 198 void xhci_dbc_exit(struct xhci_hcd *xhci); 199 int xhci_dbc_tty_probe(struct xhci_hcd *xhci); 207 int xhci_dbc_suspend(struct xhci_hcd *xhci); 208 int xhci_dbc_resume(struct xhci_hcd *xhci); 211 static inline int xhci_dbc_init(struct xhci_hcd *xhci) in xhci_dbc_init() argument 216 static inline void xhci_dbc_exit(struct xhci_hcd *xhci) in xhci_dbc_exit() argument 220 static inline int xhci_dbc_suspend(struct xhci_hcd *xhci) in xhci_dbc_suspend() argument [all …]
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D | xhci-dbg.c | 3 * xHCI host controller driver 11 #include "xhci.h" 13 char *xhci_get_slot_state(struct xhci_hcd *xhci, in xhci_get_slot_state() argument 16 struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx); in xhci_get_slot_state() 22 void xhci_dbg_trace(struct xhci_hcd *xhci, void (*trace)(struct va_format *), in xhci_dbg_trace() argument 31 xhci_dbg(xhci, "%pV\n", &vaf); in xhci_dbg_trace()
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D | xhci-mtk-sch.c | 13 #include "xhci.h" 14 #include "xhci-mtk.h" 47 * @real_port value is defined as follow according to xHCI spec: 52 static int get_bw_index(struct xhci_hcd *xhci, struct usb_device *udev, in get_bw_index() argument 58 virt_dev = xhci->devs[udev->slot_id]; in get_bw_index() 67 bw_index = virt_dev->real_port + xhci->usb3_rhub.num_ports - 1; in get_bw_index() 246 * xHCI spec section6.2.3.4 in setup_sch_info() 569 struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd); in xhci_mtk_sch_init() local 575 num_usb_bus = xhci->usb3_rhub.num_ports * 2 + xhci->usb2_rhub.num_ports; in xhci_mtk_sch_init() 600 struct xhci_hcd *xhci; in xhci_mtk_add_ep_quirk() local [all …]
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D | Kconfig | 21 tristate "xHCI HCD (USB 3.0) support" 24 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0 28 module will be called xhci-hcd. 32 bool "xHCI support for debug capability" 35 Say 'Y' to enable the support for the xHCI debug capability. Make 36 sure that your xHCI host supports the extended debug capability and 37 you want a TTY serial device based on the xHCI debug capability 47 tristate "Support for additional Renesas xHCI controller with firmware" 49 Say 'Y' to enable the support for the Renesas xHCI controller with 55 tristate "Generic xHCI driver for a platform device" [all …]
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D | xhci-rcar.c | 3 * xHCI host controller driver for R-Car SoCs 16 #include "xhci.h" 17 #include "xhci-plat.h" 18 #include "xhci-rcar.h" 105 return of_device_is_compatible(node, "renesas,xhci-r8a7790") || in xhci_rcar_is_gen2() 106 of_device_is_compatible(node, "renesas,xhci-r8a7791") || in xhci_rcar_is_gen2() 107 of_device_is_compatible(node, "renesas,xhci-r8a7793") || in xhci_rcar_is_gen2() 108 of_device_is_compatible(node, "renesas,rcar-gen2-xhci"); in xhci_rcar_is_gen2()
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/linux-5.10/Documentation/devicetree/bindings/usb/ |
D | renesas,usb-xhci.yaml | 4 $id: http://devicetree.org/schemas/usb/renesas,usb-xhci.yaml# 7 title: Renesas USB xHCI controllers 21 - renesas,xhci-r8a7742 # RZ/G1H 22 - renesas,xhci-r8a7743 # RZ/G1M 23 - renesas,xhci-r8a7744 # RZ/G1N 24 - renesas,xhci-r8a7790 # R-Car H2 25 - renesas,xhci-r8a7791 # R-Car M2-W 26 - renesas,xhci-r8a7793 # R-Car M2-N 27 - const: renesas,rcar-gen2-xhci # R-Car Gen2 and RZ/G1 30 - renesas,xhci-r8a774a1 # RZ/G2M [all …]
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D | usb-xhci.txt | 1 USB xHCI controllers 6 - "generic-xhci" for generic XHCI device 7 - "marvell,armada3700-xhci" for Armada 37xx SoCs 8 - "marvell,armada-375-xhci" for Armada 375 SoCs 9 - "marvell,armada-380-xhci" for Armada 38x SoCs 10 - "brcm,bcm7445-xhci" for Broadcom STB SoCs with XHCI 11 - "xhci-platform" (deprecated) 17 - reg: should contain address and length of the standard XHCI 19 - interrupts: one XHCI interrupt should be described here. 38 compatible = "generic-xhci";
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D | mediatek,mtk-xhci.txt | 1 MT8173 xHCI 5 There are two scenarios: the first one only supports xHCI driver; 6 the second one supports dual-role mode, and the host is based on xHCI 10 1st: only supports xHCI driver 14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci", 16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in 18 - "mediatek,mt8173-xhci" 20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control 41 of the USB wakeup glue layer between xHCI and SPM; it depends on 61 compatible = "mediatek,mt8173-xhci"; [all …]
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/linux-5.10/drivers/usb/dwc3/ |
D | host.c | 48 struct platform_device *xhci; in dwc3_host_init() local 72 xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO); in dwc3_host_init() 73 if (!xhci) { in dwc3_host_init() 74 dev_err(dwc->dev, "couldn't allocate xHCI device\n"); in dwc3_host_init() 78 xhci->dev.parent = dwc->dev; in dwc3_host_init() 79 ACPI_COMPANION_SET(&xhci->dev, ACPI_COMPANION(dwc->dev)); in dwc3_host_init() 81 dwc->xhci = xhci; in dwc3_host_init() 83 ret = platform_device_add_resources(xhci, dwc->xhci_resources, in dwc3_host_init() 86 dev_err(dwc->dev, "couldn't add resources to xHCI device\n"); in dwc3_host_init() 105 * This following flag tells XHCI to do just that. in dwc3_host_init() [all …]
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/linux-5.10/drivers/usb/cdns3/ |
D | host.c | 20 struct platform_device *xhci; in __cdns3_host_init() local 26 xhci = platform_device_alloc("xhci-hcd", PLATFORM_DEVID_AUTO); in __cdns3_host_init() 27 if (!xhci) { in __cdns3_host_init() 28 dev_err(cdns->dev, "couldn't allocate xHCI device\n"); in __cdns3_host_init() 32 xhci->dev.parent = cdns->dev; in __cdns3_host_init() 33 cdns->host_dev = xhci; in __cdns3_host_init() 35 ret = platform_device_add_resources(xhci, cdns->xhci_res, in __cdns3_host_init() 38 dev_err(cdns->dev, "couldn't add resources to xHCI device\n"); in __cdns3_host_init() 42 ret = platform_device_add(xhci); in __cdns3_host_init() 44 dev_err(cdns->dev, "failed to register xHCI device\n"); in __cdns3_host_init() [all …]
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/linux-5.10/Documentation/ABI/testing/ |
D | sysfs-bus-pci-drivers-xhci_hcd | 5 xHCI compatible USB host controllers (i.e. super-speed 12 The DbC debug device shares a root port with xHCI host. 15 to xHCI. 21 port will roll back to the xHCI.
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