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/linux-5.10/arch/powerpc/platforms/powernv/
Dvas-debug.c31 struct vas_window *window = s->private; in info_show() local
35 /* ensure window is not unmapped */ in info_show()
36 if (!window->hvwc_map) in info_show()
39 seq_printf(s, "Type: %s, %s\n", cop_to_str(window->cop), in info_show()
40 window->tx_win ? "Send" : "Receive"); in info_show()
41 seq_printf(s, "Pid : %d\n", vas_window_pid(window)); in info_show()
58 struct vas_window *window = s->private; in hvwc_show() local
62 /* ensure window is not unmapped */ in hvwc_show()
63 if (!window->hvwc_map) in hvwc_show()
66 print_reg(s, window, VREG(LPID)); in hvwc_show()
[all …]
Dvas-window.c26 * Compute the paste address region for the window @window using the
29 void vas_win_paste_addr(struct vas_window *window, u64 *addr, int *len) in vas_win_paste_addr() argument
34 base = window->vinst->paste_base_addr; in vas_win_paste_addr()
35 shift = window->vinst->paste_win_id_shift; in vas_win_paste_addr()
36 winid = window->winid; in vas_win_paste_addr()
45 static inline void get_hvwc_mmio_bar(struct vas_window *window, in get_hvwc_mmio_bar() argument
50 pbaddr = window->vinst->hvwc_bar_start; in get_hvwc_mmio_bar()
51 *start = pbaddr + window->winid * VAS_HVWC_SIZE; in get_hvwc_mmio_bar()
55 static inline void get_uwc_mmio_bar(struct vas_window *window, in get_uwc_mmio_bar() argument
60 pbaddr = window->vinst->uwc_bar_start; in get_uwc_mmio_bar()
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Dvas.h31 * Senders and receivers must each connect to a separate window before they
34 * Each window is described by two types of window contexts:
36 * Hypervisor Window Context (HVWC) of size VAS_HVWC_SIZE bytes
38 * OS/User Window Context (UWC) of size VAS_UWC_SIZE bytes.
40 * A window context can be viewed as a set of 64-bit registers. The settings
42 * hardware when messages are sent/received through the window. The registers
45 * the window.
61 * space (hvwc_map and uwc_map). The kernel can then access the window
62 * contexts of a specific window using:
67 * where winid is the window index (0..64K).
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Dvas-fault.c21 * The maximum FIFO size for fault window can be 8MB
23 * instance will be having fault window.
62 static void update_csb(struct vas_window *window, in update_csb() argument
76 if (WARN_ON_ONCE(!window->mm || !window->user_win)) in update_csb()
95 pid = window->pid; in update_csb()
98 * Process closes send window after all pending NX requests are in update_csb()
100 * open a window and can exit without closing it. May be some in update_csb()
101 * requests are pending or this window can be used by other in update_csb()
105 * invalid, send SEGV signal to pid saved in window. If the in update_csb()
107 * Parent thread (tgid) will close this window upon its exit. in update_csb()
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/linux-5.10/drivers/mtd/maps/
Dichxrom.c57 static void ichxrom_cleanup(struct ichxrom_window *window) in ichxrom_cleanup() argument
63 /* Disable writes through the rom window */ in ichxrom_cleanup()
64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); in ichxrom_cleanup()
66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); in ichxrom_cleanup()
67 pci_dev_put(window->pdev); in ichxrom_cleanup()
70 list_for_each_entry_safe(map, scratch, &window->maps, list) { in ichxrom_cleanup()
78 if (window->rsrc.parent) in ichxrom_cleanup()
79 release_resource(&window->rsrc); in ichxrom_cleanup()
80 if (window->virt) { in ichxrom_cleanup()
81 iounmap(window->virt); in ichxrom_cleanup()
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Damd76xrom.c48 /* The 2 bits controlling the window size are often set to allow reading
56 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
57 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
58 * 64KiB window.
63 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.…
69 static void amd76xrom_cleanup(struct amd76xrom_window *window) in amd76xrom_cleanup() argument
74 if (window->pdev) { in amd76xrom_cleanup()
75 /* Disable writes through the rom window */ in amd76xrom_cleanup()
76 pci_read_config_byte(window->pdev, 0x40, &byte); in amd76xrom_cleanup()
77 pci_write_config_byte(window->pdev, 0x40, byte & ~1); in amd76xrom_cleanup()
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Dck804xrom.c54 * The 2 bits controlling the window size are often set to allow reading
62 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
63 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
64 * 64KiB window.
67 * The 15 bits controlling the window size are distributed as follows:
71 * If all bits are enabled, we have a 16? MiB window
76 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override, normally set by BIOS.");
82 static void ck804xrom_cleanup(struct ck804xrom_window *window) in ck804xrom_cleanup() argument
87 if (window->pdev) { in ck804xrom_cleanup()
88 /* Disable writes through the rom window */ in ck804xrom_cleanup()
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Desb2rom.c118 static void esb2rom_cleanup(struct esb2rom_window *window) in esb2rom_cleanup() argument
123 /* Disable writes through the rom window */ in esb2rom_cleanup()
124 pci_read_config_byte(window->pdev, BIOS_CNTL, &byte); in esb2rom_cleanup()
125 pci_write_config_byte(window->pdev, BIOS_CNTL, in esb2rom_cleanup()
129 list_for_each_entry_safe(map, scratch, &window->maps, list) { in esb2rom_cleanup()
137 if (window->rsrc.parent) in esb2rom_cleanup()
138 release_resource(&window->rsrc); in esb2rom_cleanup()
139 if (window->virt) { in esb2rom_cleanup()
140 iounmap(window->virt); in esb2rom_cleanup()
141 window->virt = NULL; in esb2rom_cleanup()
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/linux-5.10/arch/sparc/kernel/
Dwuf.S3 * wuf.S: Window underflow trap handler for the Sparc.
53 * 1 2 3 4 <-- Window number
57 * O == the window that execution was in when
61 * window
63 * W == this window is the one which is now invalid
67 * I == this window will be the invalid one when we
73 /* On 7-window Sparc the boot code patches fnwin_patch1
83 /* LOCATION: Window 'T' */
86 * the proper window off of the stack.
93 wr %twin_tmp1, 0x0, %wim /* Make window 'I' invalid */
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Dwof.S3 * wof.S: Sparc window overflow handler.
29 * accessed when in the 'trap' window, 'G' means
30 * accessible in any window. Do not change these registers
43 #define twin_tmp l4 /* Temp reg, only usable in trap window T */
49 /* On a 7-window Sparc the boot code patches spnwin_*
74 /* LOCATION: Trap Window */
80 * window properly in this trap handler.
105 /* Save into the window which must be saved and do it.
110 save %g0, %g0, %g0 ! save into the window to stash away
114 /* LOCATION: Window to be saved */
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Detrap_32.S3 * etrap.S: Sparc trap window preparation for entry into the
33 /* SEVEN WINDOW PATCH INSTRUCTIONS */
54 * to call c-code and the trap cannot be handled in-window)
62 /* 2 3 4 window number
66 * O == Current window before trap
67 * T == Window entered when trap occurred
68 * S == Window we will need to save if (1<<T) == %wim
79 /* Calculate mask of trap window. See if from user
93 /* See if we are in the trap window. */
95 bne trap_setup_kernel_spill ! in trap window, clean up
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Dwindows.c2 /* windows.c: Routines to deal with register window management
54 * we still copy the window there, the only case that we don't
64 int window; in synchronize_user_stack() local
71 for(window = tp->w_saved - 1; window >= 0; window--) { in synchronize_user_stack()
72 unsigned long sp = tp->rwbuf_stkptrs[window]; in synchronize_user_stack()
75 if (copy_to_user((char __user *) sp, &tp->reg_window[window], in synchronize_user_stack()
79 shift_window_buffer(window, tp->w_saved - 1, tp); in synchronize_user_stack()
109 /* Try to push the windows in a threads window buffer to the
116 int window; in try_to_clear_window_buffer() local
119 for(window = 0; window < tp->w_saved; window++) { in try_to_clear_window_buffer()
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/linux-5.10/arch/powerpc/include/asm/
Dvas.h52 * Receive window attributes specified by the (in-kernel) owner of window.
82 * Window attributes specified by the in-kernel owner of a send window.
113 * Helper to initialize receive window attributes to defaults for an
114 * NX window.
119 * Open a VAS receive window for the instance of VAS identified by @vasid
120 * Use @attr to initialize the attributes of the window.
122 * Return a handle to the window or ERR_PTR() on error.
128 * Helper to initialize send window attributes to defaults for an NX window.
134 * Open a VAS send window for the instance of VAS identified by @vasid
136 * of the window.
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/linux-5.10/arch/powerpc/platforms/cell/
Diommu.c123 * - on bus setup, look for a matching window, or create one
160 struct iommu_window *window = in tce_build_cell() local
178 (window->ioid & CBE_IOPTE_IOID_Mask); in tce_build_cell()
181 CBE_IOPTE_SO_RW | (window->ioid & CBE_IOPTE_IOID_Mask); in tce_build_cell()
193 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_build_cell()
205 struct iommu_window *window = in tce_free_cell() local
216 __pa(window->iommu->pad_page) | in tce_free_cell()
217 (window->ioid & CBE_IOPTE_IOID_Mask); in tce_free_cell()
227 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_free_cell()
429 struct iommu_window *window;
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/linux-5.10/drivers/pci/
Dhost-bridge.c54 struct resource_entry *window; in pcibios_resource_to_bus() local
57 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_resource_to_bus()
58 if (resource_contains(window->res, res)) { in pcibios_resource_to_bus()
59 offset = window->offset; in pcibios_resource_to_bus()
79 struct resource_entry *window; in pcibios_bus_to_resource() local
82 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_bus_to_resource()
85 if (resource_type(res) != resource_type(window->res)) in pcibios_bus_to_resource()
88 bus_region.start = window->res->start - window->offset; in pcibios_bus_to_resource()
89 bus_region.end = window->res->end - window->offset; in pcibios_bus_to_resource()
92 offset = window->offset; in pcibios_bus_to_resource()
/linux-5.10/Documentation/powerpc/
Dpci_iov_resource_on_powernv.rst59 Each window can be configured to be remapped via a "TCE table" (IOMMU
76 window and sixteen M64 windows. They have different characteristics.
81 - The M32 window:
87 32-bit PCIe accesses. We configure that window at boot from FW and
97 to be assigned to PEs on a segment granularity. For a 2GB window,
100 Now, this is the "main" window we use in Linux today (excluding
119 specify the PE# for the entire window. When segmented, a window
124 there's a defined ordering for which window applies.
129 We configure an M64 window to cover the entire region of address space
188 - M32 window: There's one M32 window, and it is split into 256
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/linux-5.10/arch/powerpc/platforms/pseries/
Diommu.c348 /* Dynamic DMA Window support */
363 /* prevents races between memory on/offline and window creation */
365 /* protects initializing window twice for same device */
367 #define DIRECT64_PROPNAME "linux,direct64-ddr-window-info"
609 /* Calculate amount of DMA window per slot. Each window must be in pci_dma_bus_setup_pSeries()
616 /* No ISA/IDE - just set window size and return */ in pci_dma_bus_setup_pSeries()
621 pr_debug("No ISA/IDE, window size is 0x%llx\n", in pci_dma_bus_setup_pSeries()
648 pr_debug("ISA/IDE, window size is 0x%llx\n", pci->phb->dma_window_size); in pci_dma_bus_setup_pSeries()
700 /* Find nearest ibm,dma-window, walking up the device tree */ in pci_dma_bus_setup_pSeriesLP()
702 dma_window = of_get_property(pdn, "ibm,dma-window", NULL); in pci_dma_bus_setup_pSeriesLP()
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/linux-5.10/Documentation/devicetree/bindings/bus/
Dmvebu-mbus.txt20 the second cell for the address offset within the window.
30 within the internal register window (see below).
52 the first one controls the devices decoding window,
53 the second one controls the SDRAM decoding window and
80 ** MBus address decoding window specification
83 the window ID and the second one for the offset within the window.
84 In order to allow to describe valid and non-valid window entries, the
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
96 I = 4-bit window target ID
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/linux-5.10/fs/ext2/
Dballoc.c180 * The reservation window structure operations
217 printk("reservation window 0x%p " in __rsv_window_dump()
240 printk("Window map complete.\n"); in __rsv_window_dump()
251 * @rsv: inode's reservation window
257 * own block reservation window range.
259 * If the reservation window is outside the goal allocation group, return 0;
262 * If the goal block is within the reservation window, return 1;
288 * Find the reserved window which includes the goal, or the previous one
289 * if the goal is not in any window.
325 * ext2_rsv_window_add() -- Insert a window to the block reservation rb tree.
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/linux-5.10/arch/powerpc/sysdev/
Dfsl_pci.h37 /* PCI/PCI Express outbound window reg */
41 __be32 powbar; /* 0x.8 - Outbound window base address register */
43 __be32 powar; /* 0x.10 - Outbound window attributes register */
47 /* PCI/PCI Express inbound window reg */
51 __be32 piwbar; /* 0x.8 - Inbound window base address register */
52 __be32 piwbear; /* 0x.c - Inbound window base extended address register */
53 __be32 piwar; /* 0x.10 - Inbound window attributes register */
75 /* PCI/PCI Express outbound window 0-4
76 * Window 0 is the default window and is the only window enabled upon reset.
84 /* PCI/PCI Express inbound window 3-0
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/linux-5.10/arch/m68k/include/asm/
Dm54xxpci.h37 #define PCIIW0BTAR (CONFIG_MBAR + 0xb70) /* Initiator window 0 */
38 #define PCIIW1BTAR (CONFIG_MBAR + 0xb74) /* Initiator window 1 */
39 #define PCIIW2BTAR (CONFIG_MBAR + 0xb78) /* Initiator window 2 */
40 #define PCIIWCR (CONFIG_MBAR + 0xb80) /* Initiator window config */
104 #define PCIIWCR_W0_MEM 0x00000000 /* Window 0 is memory */
105 #define PCIIWCR_W0_IO 0x08000000 /* Window 0 is IO */
106 #define PCIIWCR_W0_MRD 0x00000000 /* Window 0 memory read */
107 #define PCIIWCR_W0_MRDL 0x02000000 /* Window 0 memory read line */
108 #define PCIIWCR_W0_MRDM 0x04000000 /* Window 0 memory read mult */
109 #define PCIIWCR_W0_E 0x01000000 /* Window 0 enable */
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/linux-5.10/drivers/video/fbdev/
Dau1200fb.c136 struct au1200_lcd_window_regs_t window; member
173 /* Default window configuration entry to use (see windows[]) */
210 * Default window configurations
710 winctrl0 = lcd->window[plane].winctrl0; in au1200_setlocation()
711 winctrl1 = lcd->window[plane].winctrl1; in au1200_setlocation()
733 fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8); in au1200_setlocation()
757 /* Disable the window while making changes, then restore WINEN */ in au1200_setlocation()
761 lcd->window[plane].winctrl0 = winctrl0; in au1200_setlocation()
762 lcd->window[plane].winctrl1 = winctrl1; in au1200_setlocation()
763 lcd->window[plane].winbuf0 = in au1200_setlocation()
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/linux-5.10/lib/
Dwin_minmax.c10 * data in the window.
15 * values are widely separated in the time window since that bounds
17 * over the window.
20 * it has no value - the new min is <= everything else in the window
36 * Passed entire window without a new val so make 2nd in minmax_subwin_update()
39 * may also be outside the window (we checked on entry in minmax_subwin_update()
40 * that the third choice was in the window). in minmax_subwin_update()
52 * We've passed a quarter of the window without a new val in minmax_subwin_update()
53 * so take a 2nd choice from the 2nd quarter of the window. in minmax_subwin_update()
58 * We've passed half the window without finding a new val in minmax_subwin_update()
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/linux-5.10/net/ipv4/
Dtcp_cdg.c12 * Parameters window, backoff_beta, and backoff_factor are crucial for
16 * Except for window, knobs are configured via /sys/module/tcp_cdg/parameters/.
17 * Parameter window is only configurable when loading tcp_cdg as a module.
21 * o Add toggle for shadow window mechanism. Suggested by David Hayes.
24 * conversion is given by: backoff_factor = 1000/(G * window).
25 * o Limit shadow window to 2 * cwnd, or to cwnd when application limited.
38 static int window __read_mostly = 8;
46 module_param(window, int, 0444);
47 MODULE_PARM_DESC(window, "gradient window size (power of two <= 256)");
58 MODULE_PARM_DESC(use_shadow, "use shadow window heuristic");
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/linux-5.10/Documentation/driver-api/
Dntb.rst40 mainly used to perform the proper memory window initialization. Typically
41 there are two types of memory window interfaces supported by the NTB API:
55 So typical scenario of the first type memory window initialization looks:
58 maps corresponding outbound memory window so to have access to the shared
76 outbound memory window so to have access to the shared memory region.
82 1) Allocate memory for a shared window
83 2) Initialize memory window by translated address of the allocated region
84 (it may fail if local memory window initialization is unsupported)
85 3) Send the translated address and memory window index to a peer device
88 1) Initialize memory window with retrieved address of the allocated
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