Searched +full:vpcie3v3 +full:- +full:supply (Results 1 – 25 of 50) sorted by relevance
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/linux-6.8/arch/arm64/boot/dts/rockchip/ |
D | rk3568-radxa-e25.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 4 #include "rk3568-radxa-cm3i.dtsi" 14 pwm-leds { 15 compatible = "pwm-leds-multicolor"; 17 multi-led { 19 max-brightness = <255>; 21 led-red { 26 led-green { 31 led-blue { [all …]
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D | rk3588-coolpi-cm5-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 10 #include "rk3588-coolpi-cm5.dtsi" 14 compatible = "coolpi,pi-cm5-evb", "coolpi,pi-cm5", "rockchip,rk3588"; 17 compatible = "pwm-backlight"; 18 enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&bl_en>; 21 power-supply = <&vcc12v_dcin>; [all …]
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D | rk3568-nanopi-r5c.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 9 /dts-v1/; 10 #include "rk3568-nanopi-r5s.dtsi" 14 compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568"; 16 gpio-keys { 17 compatible = "gpio-keys"; 18 pinctrl-names = "default"; 19 pinctrl-0 = <&reset_button_pin>; 21 button-reset { 22 debounce-interval = <50>; [all …]
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D | rk3568-nanopi-r5s.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 9 /dts-v1/; 10 #include "rk3568-nanopi-r5s.dtsi" 14 compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568"; 20 gpio-leds { 21 compatible = "gpio-leds"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>; 25 led-lan1 { 28 function-enumerator = <1>; [all …]
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D | rk3588-orangepi-5-plus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/usb/pd.h> 17 compatible = "xunlong,orangepi-5-plus", "rockchip,rk3588"; 25 stdout-path = "serial2:1500000n8"; 28 adc-keys-0 { [all …]
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D | rk3588-nanopc-t6.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/usb/pd.h> 16 model = "FriendlyElec NanoPC-T6"; 17 compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; 25 stdout-path = "serial2:1500000n8"; 29 compatible = "gpio-leds"; 31 sys_led: led-0 { [all …]
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D | rk3588-rock-5b.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/leds/common.h> 11 compatible = "radxa,rock-5b", "rockchip,rk3588"; 20 stdout-path = "serial2:1500000n8"; 23 analog-sound { 24 compatible = "audio-graph-card"; 25 label = "rk3588-es8316"; 35 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; [all …]
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D | rk3399-roc-pc-mezzanine.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd 7 /dts-v1/; 8 #include "rk3399-roc-pc.dtsi" 11 model = "Firefly ROC-RK3399-PC Mezzanine Board"; 12 compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399"; 19 poe_12v: poe-12v { 20 compatible = "regulator-fixed"; 21 regulator-name = "poe_12v"; 22 regulator-always-on; [all …]
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D | rk3568-fastrhino-r66s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 /dts-v1/; 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/leds/common.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/soc/rockchip,vop2.h> 13 stdout-path = "serial2:1500000n8"; 16 gpio-keys { 17 compatible = "gpio-keys"; [all …]
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D | rk3399-nanopc-t4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * FriendlyElec NanoPC-T4 board device tree source 11 /dts-v1/; 12 #include "rk3399-nanopi4.dtsi" 15 model = "FriendlyElec NanoPC-T4"; 16 compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399"; 18 vcc12v0_sys: vcc12v0-sys { 19 compatible = "regulator-fixed"; 20 regulator-always-on; 21 regulator-boot-on; [all …]
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D | rk3399-nanopi-r4s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * FriendlyElec NanoPC-T4 board device tree source 15 /dts-v1/; 16 #include "rk3399-nanopi4.dtsi" 20 compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399"; 22 /delete-node/ display-subsystem; 24 gpio-leds { 25 pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; 27 /delete-node/ led-0; 29 lan_led: led-lan { [all …]
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D | rk3566-soquartz-blade.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 10 #include "rk3566-soquartz.dtsi" 14 compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566"; 21 vcc3v0_sd: vcc3v0-sd-regulator { 22 compatible = "regulator-fixed"; [all …]
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D | rk3566-soquartz-cm4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include "rk3566-soquartz.dtsi" 8 model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board"; 9 compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566"; 16 vcc12v_dcin: vcc12v-dcin-regulator { 17 compatible = "regulator-fixed"; 18 regulator-name = "vcc12v_dcin"; 19 regulator-always-on; 20 regulator-boot-on; [all …]
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D | rk3566-soquartz-model-a.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include "rk3566-soquartz.dtsi" 9 compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566"; 16 vcc12v_dcin: vcc12v-dcin-regulator { 17 compatible = "regulator-fixed"; 18 regulator-name = "vcc12v_dcin"; 19 regulator-always-on; 20 regulator-boot-on; 21 regulator-min-microvolt = <12000000>; [all …]
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D | rk3568-lubancat-2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,vop2.h> 17 compatible = "embedfire,lubancat-2", "rockchip,rk3568"; 27 stdout-path = "serial2:1500000n8"; 31 compatible = "gpio-leds"; 33 user_led: user-led { [all …]
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D | rk3568-rock-3a.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 4 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/leds/common.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/soc/rockchip,vop2.h> 22 stdout-path = "serial2:1500000n8"; 25 hdmi-con { 26 compatible = "hdmi-connector"; 31 remote-endpoint = <&hdmi_out_con>; [all …]
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D | rk3568-bpi-r2-pro.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Author: Frank Wunderlich <frank-w@public-files.de> 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/soc/rockchip,vop2.h> 15 model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; 16 compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; 26 stdout-path = "serial2:1500000n8"; [all …]
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D | rk3399pro-vmarc-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/pwm/pwm.h> 13 compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; 21 vcc3v3_pcie: vcc-pcie-regulator { 22 compatible = "regulator-fixed"; 23 enable-active-high; 25 pinctrl-names = "default"; 26 pinctrl-0 = <&pcie_pwr>; [all …]
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D | rk3588-quartzpro64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/usb/pd.h> 26 stdout-path = "serial2:1500000n8"; 29 adc-keys-0 { 30 compatible = "adc-keys"; [all …]
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/linux-6.8/Documentation/devicetree/bindings/pci/ |
D | rcar-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pci/rcar-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Renesas R-Car PCIe Host 11 - Marek Vasut <marek.vasut+renesas@gmail.com> 12 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 15 - $ref: pci-bus.yaml# 20 - const: renesas,pcie-r8a7779 # R-Car H1 21 - items: [all …]
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D | nvidia,tegra194-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Vidya Sagar <vidyas@nvidia.com> 16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of 20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device 26 - nvidia,tegra194-pcie [all …]
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D | rockchip,rk3399-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Lin <shawn.lin@rock-chips.com> 13 - $ref: /schemas/pci/pci-bus.yaml# 14 - $ref: rockchip,rk3399-pcie-common.yaml# 18 const: rockchip,rk3399-pcie 22 reg-names: 24 - const: axi-base [all …]
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/linux-6.8/drivers/pci/controller/ |
D | pcie-rockchip-host.c | 1 // SPDX-License-Identifier: GPL-2.0+ 7 * Author: Shawn Lin <shawn.lin@rock-chips.com> 8 * Wenrui Li <wenrui.li@rock-chips.com> 37 #include "pcie-rockchip.h" 76 if (pci_is_root_bus(bus) || pci_is_root_bus(bus->parent)) in rockchip_pcie_valid_device() 87 if (rockchip->legacy_phy) in rockchip_pcie_lane_map() 88 return GENMASK(MAX_LANE_NUM - 1, 0); in rockchip_pcie_lane_map() 93 /* The link may be using a reverse-indexed mapping. */ in rockchip_pcie_lane_map() 105 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + where; in rockchip_pcie_rd_own_conf() 132 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + offset; in rockchip_pcie_wr_own_conf() [all …]
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/linux-6.8/arch/arm64/boot/dts/nvidia/ |
D | tegra234-p3768-0000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 compatible = "nvidia,p3768-0000"; 11 stdout-path = "serial0:115200n8"; 23 vcc-supply = <&vdd_1v8_sys>; 24 address-width = <8>; 27 read-only; 32 current-speed = <115200>; 37 assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>; 38 assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>; 48 usb2-0 { [all …]
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D | tegra234-p3740-0002+p3701-0008.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include "tegra234-p3701-0008.dtsi" 7 #include "tegra234-p3740-0002.dtsi" 11 compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234"; 19 stdout-path = "serial0:115200n8"; 24 compatible = "nvidia,tegra194-hsuart"; 25 reset-names = "serial"; [all …]
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