Home
last modified time | relevance | path

Searched +full:vdda +full:- +full:pll +full:- +full:supply (Results 1 – 25 of 44) sorted by relevance

12

/linux-5.10/Documentation/devicetree/bindings/ufs/ !
Dufs-qcom.txt3 UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro.
10 - compatible : compatible list, contains one of the following -
11 "qcom,ufs-phy-qmp-20nm" for 20nm ufs phy,
12 "qcom,ufs-phy-qmp-14nm" for legacy 14nm ufs phy,
13 "qcom,msm8996-ufs-phy-qmp-14nm" for 14nm ufs phy
15 - reg : should contain PHY register address space (mandatory),
16 - reg-names : indicates various resources passed to driver (via reg proptery) by name.
17 Required "reg-names" is "phy_mem".
18 - #phy-cells : This property shall be set to 0
19 - vdda-phy-supply : phandle to main PHY supply for analog domain
[all …]
/linux-5.10/Documentation/devicetree/bindings/phy/ !
Dqcom,qmp-usb3-dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
16 - qcom,sc7180-qmp-usb3-dp-phy
17 - qcom,sc7180-qmp-usb3-phy
18 - qcom,sdm845-qmp-usb3-dp-phy
19 - qcom,sdm845-qmp-usb3-phy
22 - description: Address and length of PHY's USB serdes block.
[all …]
Dqcom,usb-snps-femto-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2
10 - Wesley Cheng <wcheng@codeaurora.org>
13 Qualcomm High-Speed USB PHY
18 - qcom,usb-snps-hs-7nm-phy
19 - qcom,sm8150-usb-hs-phy
20 - qcom,usb-snps-femto-v2-phy
[all …]
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
[all …]
Dqcom,qmp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
20 - qcom,ipq8074-qmp-pcie-phy
21 - qcom,ipq8074-qmp-usb3-phy
22 - qcom,msm8996-qmp-pcie-phy
23 - qcom,msm8996-qmp-ufs-phy
24 - qcom,msm8996-qmp-usb3-phy
[all …]
Dqcom-pcie2-phy.txt8 - compatible: compatible list, should be:
9 "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy"
11 - reg: offset and length of the PHY register set.
12 - #phy-cells: must be 0.
14 - clocks: a clock-specifier pair for the "pipe" clock
16 - vdda-vp-supply: phandle to low voltage regulator
17 - vdda-vph-supply: phandle to high voltage regulator
19 - resets: reset-specifier pairs for the "phy" and "pipe" resets
20 - reset-names: list of resets, should contain:
23 - clock-output-names: name of the outgoing clock signal from the PHY PLL
[all …]
/linux-5.10/arch/arm64/boot/dts/qcom/ !
Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
23 stdout-path = "serial0:115200n8";
26 vph_pwr: vph-pwr-regulator {
27 compatible = "regulator-fixed";
28 regulator-name = "vph_pwr";
29 regulator-min-microvolt = <3700000>;
[all …]
Dsdm850-lenovo-yoga-c630.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
19 compatible = "lenovo,yoga-c630", "qcom,sdm845";
27 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
32 pm8998-rpmh-regulators {
33 compatible = "qcom,pm8998-rpmh-regulators";
[all …]
Dmsm8998-mtp.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 stdout-path = "serial0:115200n8";
19 vph_pwr: vph-pwr-regulator {
20 compatible = "regulator-fixed";
21 regulator-name = "vph_pwr";
22 regulator-always-on;
23 regulator-boot-on;
31 compatible = "qcom,wcn3990-bt";
33 vddio-supply = <&vreg_s4a_1p8>;
34 vddxo-supply = <&vreg_l7a_1p8>;
[all …]
Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
27 stdout-path = "serial0:115200n8";
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
[all …]
Dsm8150-mtp.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 /dts-v1/;
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10 #include <dt-bindings/gpio/gpio.h>
18 compatible = "qcom,sm8150-mtp";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr";
[all …]
Dsdm845-xiaomi-beryllium.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 /delete-node/ &tz_mem;
17 /delete-node/ &adsp_mem;
18 /delete-node/ &wlan_msa_mem;
19 /delete-node/ &mpss_region;
20 /delete-node/ &venus_mem;
[all …]
Dapq8096-db820c.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
27 * drawing no: LM25-P2751-1
38 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
55 stdout-path = "serial0:115200n8";
[all …]
Dmsm8916-pm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 vdda-supply = <&pm8916_l2>;
11 vdda-supply = <&pm8916_l2>;
12 vddio-supply = <&pm8916_l6>;
16 vddio-supply = <&pm8916_l6>;
20 cx-supply = <&pm8916_s1>;
21 mx-supply = <&pm8916_l3>;
22 pll-supply = <&pm8916_l7>;
26 vddmx-supply = <&pm8916_l3>;
27 vddpx-supply = <&pm8916_l7>;
[all …]
Dmsm8998-clamshell.dtsi1 // SPDX-License-Identifier: GPL-2.0
18 vph_pwr: vph-pwr-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "vph_pwr";
21 regulator-always-on;
22 regulator-boot-on;
30 compatible = "qcom,wcn3990-bt";
32 vddio-supply = <&vreg_s4a_1p8>;
33 vddxo-supply = <&vreg_l7a_1p8>;
34 vddrf-supply = <&vreg_l17a_1p3>;
[all …]
Dapq8096-ifc6640.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 compatible = "inforce,ifc6640", "qcom,apq8096-sbc", "qcom,apq8096";
16 qcom,msm-id = <291 0x00030001>;
17 qcom,board-id = <0x00010018 0>;
24 stdout-path = "serial0:115200n8";
27 v1p05: v1p05-regulator {
[all …]
Dsm8250-mtp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sm8250-mtp";
24 stdout-path = "serial0:115200n8";
27 vph_pwr: vph-pwr-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vph_pwr";
30 regulator-min-microvolt = <3700000>;
31 regulator-max-microvolt = <3700000>;
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
26 stdout-path = "serial0:115200n8";
30 compatible = "pwm-backlight";
32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
33 power-supply = <&ppvar_sys>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&ap_edp_bklten>;
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/ti/ !
Dti,omap4-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap4-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - DISPC
21 - DSS Submodules: RFBI, VENC, DSI, HDMI
22 - Video port for DPI output
[all …]
Dti,omap5-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap5-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - DISPC
21 - DSS Submodules: RFBI, DSI, HDMI
22 - Video port for DPI output
[all …]
Dti,dra7-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,dra7-dss"
12 - reg: address and length of the register spaces for 'dss'
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
16 - syscon: phandle to control module core syscon node
20 Some DRA7xx SoCs have one dedicated video PLL, some have two. These properties
23 - reg: address and length of the register spaces for 'pll1_clkctrl',
[all …]
Dti,omap3-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap3-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - Video ports:
19 - Port 0: DPI output
20 - Port 1: SDI output
[all …]
/linux-5.10/Documentation/devicetree/bindings/display/msm/ !
Dedp.txt4 - compatible:
5 * "qcom,mdss-edp"
6 - reg: Physical base address and length of the registers of controller and PLL
7 - reg-names: The names of register regions. The following regions are required:
10 - interrupts: The interrupt signal from the eDP block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: device clocks
13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
14 - clock-names: the following clocks are required:
20 - #clock-cells: The value should be 1.
[all …]
Ddsi.txt5 - compatible:
6 * "qcom,mdss-dsi-ctrl"
7 - reg: Physical base address and length of the registers of controller
8 - reg-names: The names of register regions. The following regions are required:
10 - interrupts: The interrupt signal from the DSI block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: Phandles to device clocks.
13 - clock-names: the following clocks are required:
25 - assigned-clocks: Parents of "byte" and "pixel" for the given platform.
26 - assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
[all …]
/linux-5.10/Documentation/devicetree/bindings/clock/ !
Dsilabs,si5341.txt6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
13 clocks. The chip contains a PLL that sources 5 (or 4) multisynth clocks, which
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
34 - compatible: shall be one of the following:
35 "silabs,si5340" - Si5340 A/B/C/D
36 "silabs,si5341" - Si5341 A/B/C/D
37 "silabs,si5342" - Si5342 A/B/C/D
38 "silabs,si5344" - Si5344 A/B/C/D
[all …]

12