| /qemu/ |
| H A D | meson_options.txt | 5 option('qemu_suffix', type : 'string', value: 'qemu',
7 option('docdir', type : 'string', value : 'share/doc',
9 option('qemu_firmwarepath', type : 'array', value : ['share/qemu-firmware'],
11 option('pkgversion', type : 'string', value : '',
13 option('smbd', type : 'string', value : '',
15 option('iasl', type : 'string', value : '',
17 option('tls_priority', type : 'string', value : 'NORMAL',
19 option('default_devices', type : 'boolean', value : true,
21 option('audio_drv_list', type: 'array', value: ['default'],
24 option('block_drv_rw_whitelist', type : 'string', value : '',
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| /qemu/hw/rtc/ |
| H A D | trace-events | 4 allwinner_rtc_read(uint64_t addr, uint64_t value) "addr 0x%" PRIx64 " value 0x%" PRIx64
5 allwinner_rtc_write(uint64_t addr, uint64_t value) "addr 0x%" PRIx64 " value 0x%" PRIx64
8 sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " value 0x%" PRIx64
9 sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " value 0x%" PRIx64
16 pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
17 pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
22 aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
23 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
26 ds1338_recv(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] -> 0x%02" PRIx8
27 ds1338_send(uint32_t addr, uint8_t value) "[0x%" PRIx32 "] <- 0x%02" PRIx8
[all …]
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| /qemu/tests/unit/ |
| H A D | test-visitor-serialization.c | 57 } value; member
76 } value; member
99 visit_type_str(v, NULL, (char **)&pt->value.string, errp); in visit_primitive_type()
102 visit_type_bool(v, NULL, &pt->value.boolean, errp); in visit_primitive_type()
105 visit_type_number(v, NULL, &pt->value.number, errp); in visit_primitive_type()
108 visit_type_int(v, NULL, &pt->value.integer, errp); in visit_primitive_type()
111 visit_type_uint8(v, NULL, &pt->value.u8, errp); in visit_primitive_type()
114 visit_type_uint16(v, NULL, &pt->value.u16, errp); in visit_primitive_type()
117 visit_type_uint32(v, NULL, &pt->value.u32, errp); in visit_primitive_type()
120 visit_type_uint64(v, NULL, &pt->value.u64, errp); in visit_primitive_type()
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| /qemu/tests/qtest/ |
| H A D | libqtest-single.h | 96 * @value: Value being written.
98 * Write an 8-bit value to an I/O port.
100 static inline void outb(uint16_t addr, uint8_t value) in outb() argument
102 qtest_outb(global_qtest, addr, value); in outb()
108 * @value: Value being written.
110 * Write a 16-bit value to an I/O port.
112 static inline void outw(uint16_t addr, uint16_t value) in outw() argument
114 qtest_outw(global_qtest, addr, value); in outw()
120 * @value: Value being written.
122 * Write a 32-bit value to an I/O port.
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| H A D | lsm303dlhc-mag-test.c | 41 int value) in qmp_lsm303dlhc_mag_set_property() argument
46 "'property': %s, 'value': %d } }", id, prop, value); in qmp_lsm303dlhc_mag_set_property()
53 int64_t value; in send_and_receive() local
56 /* Check default value for CRB */ in send_and_receive()
59 /* Set x to 1.0 gauss and verify the value */ in send_and_receive()
61 value = qmp_lsm303dlhc_mag_get_property( in send_and_receive()
63 g_assert_cmpint(value, ==, 100000); in send_and_receive()
65 /* Set y to 1.5 gauss and verify the value */ in send_and_receive()
67 value = qmp_lsm303dlhc_mag_get_property( in send_and_receive()
69 g_assert_cmpint(value, ==, 150000); in send_and_receive()
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| H A D | tmp105-test.c | 34 static void qmp_tmp105_set_temperature(const char *id, int value) in qmp_tmp105_set_temperature() argument
39 "'property': 'temperature', 'value': %d } }", id, value); in qmp_tmp105_set_temperature()
47 uint16_t value; in send_and_receive() local
50 value = qmp_tmp105_get_temperature(TMP105_TEST_ID); in send_and_receive()
51 g_assert_cmpuint(value, ==, 0); in send_and_receive()
53 value = i2c_get16(i2cdev, TMP105_REG_TEMPERATURE); in send_and_receive()
54 g_assert_cmphex(value, ==, 0); in send_and_receive()
57 value = qmp_tmp105_get_temperature(TMP105_TEST_ID); in send_and_receive()
58 g_assert_cmpuint(value, ==, 20000); in send_and_receive()
60 value = i2c_get16(i2cdev, TMP105_REG_TEMPERATURE); in send_and_receive()
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| H A D | emc141x-test.c | 31 static void qmp_emc1414_set_temperature(const char *id, int value) in qmp_emc1414_set_temperature() argument
36 "'property': 'temperature0', 'value': %d } }", id, value); in qmp_emc1414_set_temperature()
43 uint16_t value; in send_and_receive() local
46 value = qmp_emc1414_get_temperature(EMC1414_TEST_ID); in send_and_receive()
47 g_assert_cmpuint(value, ==, 0); in send_and_receive()
49 value = i2c_get8(i2cdev, EMC141X_TEMP_HIGH0); in send_and_receive()
50 g_assert_cmphex(value, ==, 0); in send_and_receive()
52 /* The default max value is 85C, 0x55=85 */ in send_and_receive()
53 value = i2c_get8(i2cdev, EMC141X_TEMP_MAX_HIGH0); in send_and_receive()
54 g_assert_cmphex(value, ==, 0x55); in send_and_receive()
[all …]
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| /qemu/include/qemu/ |
| H A D | stats64.h | 24 aligned_uint64_t value; member
32 static inline void stat64_init(Stat64 *s, uint64_t value) in stat64_init() argument
35 *s = (Stat64) { value }; in stat64_init()
40 return qatomic_read__nocheck(&s->value); in stat64_get()
43 static inline void stat64_set(Stat64 *s, uint64_t value) in stat64_set() argument
45 qatomic_set__nocheck(&s->value, value); in stat64_set()
48 static inline void stat64_add(Stat64 *s, uint64_t value) in stat64_add() argument
50 qatomic_add(&s->value, value); in stat64_add()
53 static inline void stat64_min(Stat64 *s, uint64_t value) in stat64_min() argument
55 uint64_t orig = qatomic_read__nocheck(&s->value); in stat64_min()
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| H A D | host-utils.h | 130 * clz8 - count leading zeros in a 8-bit value.
131 * @val: The value to search
133 * Returns 8 if the value is zero. Note that the GCC builtin is
134 * undefined if the value is zero.
145 * clz16 - count leading zeros in a 16-bit value.
146 * @val: The value to search
148 * Returns 16 if the value is zero. Note that the GCC builtin is
149 * undefined if the value is zero.
160 * clz32 - count leading zeros in a 32-bit value.
161 * @val: The value to search
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| H A D | bitops.h | 128 * test_and_set_bit - Set a bit and return its old value
143 * test_and_clear_bit - Clear a bit and return its old value
158 * test_and_change_bit - Change a bit and return its old value
331 * test_and_set_bit32 - Set a bit and return its old value
346 * test_and_clear_bit32 - Clear a bit and return its old value
361 * test_and_change_bit32 - Change a bit and return its old value
394 * rol8 - rotate an 8-bit value left
395 * @word: value to rotate
404 * ror8 - rotate an 8-bit value right
405 * @word: value to rotate
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| /qemu/hw/net/fsl_etsec/ |
| H A D | miim.c | 36 uint16_t value; in miim_read_cycle() local
38 phy = (etsec->regs[MIIMADD].value >> 8) & 0x1F; in miim_read_cycle()
40 addr = etsec->regs[MIIMADD].value & 0x1F; in miim_read_cycle()
44 value = etsec->phy_control; in miim_read_cycle()
47 value = etsec->phy_status; in miim_read_cycle()
50 value = MII_STAT1000_LOK | MII_STAT1000_ROK; in miim_read_cycle()
53 value = 0x0; in miim_read_cycle()
58 qemu_log("%s phy:%d addr:0x%x value:0x%x\n", __func__, phy, addr, value); in miim_read_cycle()
61 etsec->regs[MIIMSTAT].value = value; in miim_read_cycle()
68 uint16_t value; in miim_write_cycle() local
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| H A D | etsec.c | 58 uint32_t ievent = etsec->regs[IEVENT].value; in etsec_update_irq()
59 uint32_t imask = etsec->regs[IMASK].value; in etsec_update_irq()
98 ret = reg->value; in etsec_read()
112 uint32_t value) in write_tstat() argument
118 if (value & (1 << (31 - i))) { in write_tstat()
124 reg->value &= ~value; in write_tstat()
130 uint32_t value) in write_rstat() argument
136 if (value & (1 << (23 - i)) && !(reg->value & (1 << (23 - i)))) { in write_rstat()
142 reg->value &= ~value; in write_rstat()
148 uint32_t value) in write_tbasex() argument
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| /qemu/hw/i2c/ |
| H A D | npcm7xx_smbus.c | 244 static void npcm7xx_smbus_send_byte(NPCM7xxSMBusState *s, uint8_t value) in npcm7xx_smbus_send_byte() argument
246 int rv = i2c_send(s->bus, value); in npcm7xx_smbus_send_byte()
262 trace_npcm7xx_smbus_send_byte((DEVICE(s)->canonical_path), value, !rv); in npcm7xx_smbus_send_byte()
303 "%s: invalid rx_thr value: 0x%02x\n", in npcm7xx_smbus_recv_fifo()
368 static void npcm7xx_smbus_send_address(NPCM7xxSMBusState *s, uint8_t value) in npcm7xx_smbus_send_address() argument
373 recv = value & BIT(0); in npcm7xx_smbus_send_address()
374 rv = i2c_start_transfer(s->bus, value >> 1, recv); in npcm7xx_smbus_send_address()
376 value >> 1, recv, !rv); in npcm7xx_smbus_send_address()
380 DEVICE(s)->canonical_path, value, rv); in npcm7xx_smbus_send_address()
454 uint8_t value = s->sda; in npcm7xx_smbus_read_sda() local
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| /qemu/tests/qtest/fuzz/ |
| H A D | qtest_wrappers.c | 29 WRAP(void , qtest_outb(QTestState *s, uint16_t addr, uint8_t value)) in WRAP()
30 WRAP(void , qtest_outw(QTestState *s, uint16_t addr, uint16_t value)) in WRAP()
31 WRAP(void , qtest_outl(QTestState *s, uint16_t addr, uint32_t value)) in WRAP()
36 WRAP(void , qtest_writeb(QTestState *s, uint64_t addr, uint8_t value)) in WRAP()
37 WRAP(void , qtest_writew(QTestState *s, uint64_t addr, uint16_t value)) in WRAP()
38 WRAP(void , qtest_writel(QTestState *s, uint64_t addr, uint32_t value)) in WRAP()
39 WRAP(void , qtest_writeq(QTestState *s, uint64_t addr, uint64_t value)) in WRAP()
79 void __wrap_qtest_outb(QTestState *s, uint16_t addr, uint8_t value) in __wrap_qtest_outb() argument
82 cpu_outb(addr, value); in __wrap_qtest_outb()
84 __real_qtest_outb(s, addr, value); in __wrap_qtest_outb()
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| /qemu/hw/misc/ |
| H A D | bcm2835_property.c | 26 static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) in bcm2835_property_mbox_push() argument
38 value &= ~0xf; in bcm2835_property_mbox_push()
40 s->addr = value; in bcm2835_property_mbox_push()
42 tot_len = ldl_le_phys(&s->dma_as, value); in bcm2835_property_mbox_push()
45 value = s->addr + 8; in bcm2835_property_mbox_push()
46 while (value + 8 <= s->addr + tot_len) { in bcm2835_property_mbox_push()
47 uint32_t tag = ldl_le_phys(&s->dma_as, value); in bcm2835_property_mbox_push()
48 uint32_t bufsize = ldl_le_phys(&s->dma_as, value + 4); in bcm2835_property_mbox_push()
49 /* @(value + 8) : Request/response indicator */ in bcm2835_property_mbox_push()
55 stl_le_phys(&s->dma_as, value + 12, 346337); in bcm2835_property_mbox_push()
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| H A D | trace-events | 41 avr_power_read(uint8_t value) "power_reduc read value:%u"
42 avr_power_write(uint8_t value) "power_reduc write value:%u"
70 empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "w…
105 mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: func…
106 mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: functi…
120 imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
123 imx7_snvs_read(uint64_t offset, uint64_t value, unsigned size) "i.MX SNVS read: offset 0x%08" PRIx6…
124 imx7_snvs_write(uint64_t offset, uint64_t value, unsigned size) "i.MX SNVS write: offset 0x%08" PRI…
134 npcm_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
135 npcm_clk_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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| /qemu/hw/gpio/ |
| H A D | trace-events | 4 imx_gpio_read(const char *id, const char *reg, uint32_t value) "%s:[%s] -> 0x%" PRIx32
5 imx_gpio_write(const char *id, const char *reg, uint32_t value) "%s:[%s] <- 0x%" PRIx32
9 …7xx_gpio_read(const char *id, uint64_t offset, uint64_t value) " %s offset: 0x%04" PRIx64 " value …
10 …xx_gpio_write(const char *id, uint64_t offset, uint64_t value) "%s offset: 0x%04" PRIx64 " value 0…
16 nrf51_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64
17 nrf51_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64
18 nrf51_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64
19 nrf51_gpio_update_output_irq(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64
30 pl061_read(const char *id, uint64_t offset, uint64_t r) "%s offset 0x%" PRIx64 " value 0x%" PRIx64
31 pl061_write(const char *id, uint64_t offset, uint64_t value) "%s offset 0x%" PRIx64 " value 0x%" PR…
[all …]
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| /qemu/stats/ |
| H A D | stats-hmp-cmds.c | 17 static void print_stats_schema_value(Monitor *mon, StatsSchemaValue *value) in print_stats_schema_value() argument
20 monitor_printf(mon, " %s (%s%s", value->name, StatsType_str(value->type), in print_stats_schema_value()
21 value->has_unit || value->exponent ? ", " : ""); in print_stats_schema_value()
23 if (value->has_unit) { in print_stats_schema_value()
24 if (value->unit == STATS_UNIT_SECONDS) { in print_stats_schema_value()
26 } else if (value->unit == STATS_UNIT_BYTES) { in print_stats_schema_value()
31 if (unit && value->base == 10 && in print_stats_schema_value()
32 value->exponent >= -18 && value->exponent <= 18 && in print_stats_schema_value()
33 value->exponent % 3 == 0) { in print_stats_schema_value()
34 monitor_puts(mon, si_prefix(value->exponent)); in print_stats_schema_value()
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| /qemu/hw/net/ |
| H A D | vmware_utils.h | 58 VMW_SHPRN("SHMEM set: %" PRIx64 ", len: %d (value 0x%X)", addr, len, val); in vmw_shmem_set()
70 VMW_SHPRN("SHMEM load8: %" PRIx64 " (value 0x%X)", addr, res); in vmw_shmem_ld8()
75 vmw_shmem_st8(PCIDevice *d, hwaddr addr, uint8_t value) in vmw_shmem_st8() argument
77 VMW_SHPRN("SHMEM store8: %" PRIx64 " (value 0x%X)", addr, value); in vmw_shmem_st8()
78 pci_dma_write(d, addr, &value, 1); in vmw_shmem_st8()
87 VMW_SHPRN("SHMEM load16: %" PRIx64 " (value 0x%X)", addr, res); in vmw_shmem_ld16()
92 vmw_shmem_st16(PCIDevice *d, hwaddr addr, uint16_t value) in vmw_shmem_st16() argument
94 VMW_SHPRN("SHMEM store16: %" PRIx64 " (value 0x%X)", addr, value); in vmw_shmem_st16()
95 value = cpu_to_le16(value); in vmw_shmem_st16()
96 pci_dma_write(d, addr, &value, 2); in vmw_shmem_st16()
[all …]
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| /qemu/qapi/ |
| H A D | qapi-visit-core.c | 188 uint64_t value = *obj; in visit_type_uintN() local
190 assert(v->type == VISITOR_INPUT || value <= max); in visit_type_uintN()
192 if (!v->type_uint64(v, name, &value, errp)) { in visit_type_uintN()
195 if (value > max) { in visit_type_uintN()
201 *obj = value; in visit_type_uintN()
208 uint64_t value; in visit_type_uint8() local
212 value = *obj; in visit_type_uint8()
213 ok = visit_type_uintN(v, &value, name, UINT8_MAX, "uint8_t", errp); in visit_type_uint8()
214 *obj = value; in visit_type_uint8()
221 uint64_t value; in visit_type_uint16() local
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| /qemu/hw/watchdog/ |
| H A D | wdt_imx2.c | 74 uint16_t value = 0; in imx2_wdt_read() local
78 value = s->wcr; in imx2_wdt_read()
81 value = s->wsr; in imx2_wdt_read()
84 value = s->wrsr; in imx2_wdt_read()
87 value = s->wicr; in imx2_wdt_read()
90 value = s->wmcr; in imx2_wdt_read()
94 trace_imx2_wdt_read(addr, value); in imx2_wdt_read()
96 return value; in imx2_wdt_read()
113 * Only (re-)start pretimeout timer if its counter value is larger in imx_wdt2_update_itimer()
136 /* A value of 0 reflects one period (0.5s). */ in imx_wdt2_update_timer()
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| /qemu/system/ |
| H A D | rtc.c | 51 time_t value = qemu_clock_get_ms(clock) / 1000; in qemu_ref_timedate() local
54 value -= rtc_realtime_clock_offset; in qemu_ref_timedate()
57 value += rtc_ref_start_datetime; in qemu_ref_timedate()
61 value -= rtc_host_datetime_offset; in qemu_ref_timedate()
67 return value; in qemu_ref_timedate()
142 const char *value; in configure_rtc() local
149 value = qemu_opt_get(opts, "base"); in configure_rtc()
150 if (value) { in configure_rtc()
151 if (!strcmp(value, "utc")) { in configure_rtc()
153 } else if (!strcmp(value, "localtime")) { in configure_rtc()
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| /qemu/hw/pci-host/ |
| H A D | ppc4xx_pci.c | 100 uint64_t value, unsigned size) in ppc4xx_pci_reg_write4() argument
110 pci->pmm[0].la = value; in ppc4xx_pci_reg_write4()
113 pci->pmm[0].ma = value; in ppc4xx_pci_reg_write4()
116 pci->pmm[0].pciha = value; in ppc4xx_pci_reg_write4()
119 pci->pmm[0].pcila = value; in ppc4xx_pci_reg_write4()
123 pci->pmm[1].la = value; in ppc4xx_pci_reg_write4()
126 pci->pmm[1].ma = value; in ppc4xx_pci_reg_write4()
129 pci->pmm[1].pciha = value; in ppc4xx_pci_reg_write4()
132 pci->pmm[1].pcila = value; in ppc4xx_pci_reg_write4()
136 pci->pmm[2].la = value; in ppc4xx_pci_reg_write4()
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| /qemu/hw/core/ |
| H A D | machine-hmp-cmds.c | 37 if (cpu->value->cpu_index == monitor_get_cpu_index(mon)) { in hmp_info_cpus()
42 cpu->value->cpu_index); in hmp_info_cpus()
43 monitor_printf(mon, " thread_id=%" PRId64 "\n", cpu->value->thread_id); in hmp_info_cpus()
62 monitor_printf(mon, " type: \"%s\"\n", l->value->type); in hmp_hotpluggable_cpus()
64 l->value->vcpus_count); in hmp_hotpluggable_cpus()
65 if (l->value->qom_path) { in hmp_hotpluggable_cpus()
66 monitor_printf(mon, " qom_path: \"%s\"\n", l->value->qom_path); in hmp_hotpluggable_cpus()
69 c = l->value->props; in hmp_hotpluggable_cpus()
117 visit_type_uint16List(v, NULL, &m->value->host_nodes, &error_abort); in hmp_info_memdev()
118 monitor_printf(mon, "memory backend: %s\n", m->value->id); in hmp_info_memdev()
[all …]
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| /qemu/hw/usb/ |
| H A D | imx-usb-phy.c | 54 uint32_t value; in imx_usbphy_read() local
67 value = s->usbphy[index - 1]; in imx_usbphy_read()
79 value = s->usbphy[index - 2]; in imx_usbphy_read()
91 value = s->usbphy[index - 3]; in imx_usbphy_read()
95 value = s->usbphy[index]; in imx_usbphy_read()
101 value = 0; in imx_usbphy_read()
105 return (uint64_t)value; in imx_usbphy_read()
108 static void imx_usbphy_write(void *opaque, hwaddr offset, uint64_t value, in imx_usbphy_write() argument
116 s->usbphy[index] = value; in imx_usbphy_write()
117 if (value & USBPHY_CTRL_SFTRST) { in imx_usbphy_write()
[all …]
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