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/linux-5.10/drivers/irqchip/
Dirq-gic-v2m.c3 * ARM GIC v2m MSI(-X) support
55 /* List of flags for specific v2m implementation */
71 u32 flags; /* v2m flags for specific implementation */
100 static phys_addr_t gicv2m_get_msi_addr(struct v2m_data *v2m, int hwirq) in gicv2m_get_msi_addr() argument
102 if (v2m->flags & GICV2M_GRAVITON_ADDRESS_ONLY) in gicv2m_get_msi_addr()
103 return v2m->res.start | ((hwirq - 32) << 3); in gicv2m_get_msi_addr()
105 return v2m->res.start + V2M_MSI_SETSPI_NS; in gicv2m_get_msi_addr()
110 struct v2m_data *v2m = irq_data_get_irq_chip_data(data); in gicv2m_compose_msi_msg() local
111 phys_addr_t addr = gicv2m_get_msi_addr(v2m, data->hwirq); in gicv2m_compose_msi_msg()
116 if (v2m->flags & GICV2M_GRAVITON_ADDRESS_ONLY) in gicv2m_compose_msi_msg()
[all …]
DMakefile32 obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
/linux-5.10/arch/arm64/boot/dts/arm/
Dvexpress-v2m-rs1.dtsi6 * V2M-P1
14 * original variant (vexpress-v2m.dtsi), but there is a strong
18 * CHANGES TO vexpress-v2m.dtsi!
34 clock-output-names = "v2m:clk24mhz";
41 clock-output-names = "v2m:refclk1mhz";
48 clock-output-names = "v2m:refclk32khz";
55 label = "v2m:green:user1";
61 label = "v2m:green:user2";
67 label = "v2m:green:user3";
73 label = "v2m:green:user4";
[all …]
Drtsm_ve-motherboard.dtsi15 clock-output-names = "v2m:clk24mhz";
22 clock-output-names = "v2m:refclk1mhz";
29 clock-output-names = "v2m:refclk32khz";
32 v2m_fixed_3v3: v2m-3v3 {
50 clock-output-names = "v2m:oscclk1";
81 arm,v2m-memory-map = "rs1";
82 compatible = "arm,vexpress,v2m-p1", "simple-bus";
Dfoundation-v8.dtsi99 clock-output-names = "v2m:clk24mhz";
106 clock-output-names = "v2m:refclk1mhz";
113 clock-output-names = "v2m:refclk32khz";
117 compatible = "arm,vexpress,v2m-p1", "simple-bus";
118 arm,v2m-memory-map = "rs1";
Drtsm_ve-motherboard-rs2.dtsi5 * "rs2" extension for the v2m motherboard
10 arm,v2m-memory-map = "rs2";
Djuno-base.dtsi84 v2m_0: v2m@0 {
85 compatible = "arm,gic-v2m-frame";
90 v2m@10000 {
91 compatible = "arm,gic-v2m-frame";
96 v2m@20000 {
97 compatible = "arm,gic-v2m-frame";
102 v2m@30000 {
103 compatible = "arm,gic-v2m-frame";
Djuno-motherboard.dtsi101 model = "V2M-Juno";
104 arm,v2m-memory-map = "rs1";
Dvexpress-v2f-1xv7-ca53x2.dts16 #include "vexpress-v2m-rs1.dtsi"
/linux-5.10/arch/arm/boot/dts/
Dvexpress-v2m-rs1.dtsi6 * V2M-P1
14 * original variant (vexpress-v2m.dtsi), but there is a strong
18 * CHANGES TO vexpress-v2m.dtsi!
34 clock-output-names = "v2m:clk24mhz";
41 clock-output-names = "v2m:refclk1mhz";
48 clock-output-names = "v2m:refclk32khz";
55 label = "v2m:green:user1";
61 label = "v2m:green:user2";
67 label = "v2m:green:user3";
73 label = "v2m:green:user4";
[all …]
Dvexpress-v2m.dtsi6 * V2M-P1
14 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
18 * CHANGES TO vexpress-v2m-rs1.dtsi!
24 model = "V2M-P1";
27 compatible = "arm,vexpress,v2m-p1", "simple-bus";
311 clock-output-names = "v2m:clk24mhz";
318 clock-output-names = "v2m:refclk1mhz";
325 clock-output-names = "v2m:refclk32khz";
332 label = "v2m:green:user1";
338 label = "v2m:green:user2";
[all …]
Dxenvm-4.2.dts80 arm,v2m-memory-map = "rs1";
Dvexpress-v2p-ca5s.dts12 #include "vexpress-v2m-rs1.dtsi"
Dvexpress-v2p-ca15-tc1.dts12 #include "vexpress-v2m-rs1.dtsi"
Dvexpress-v2p-ca9.dts12 #include "vexpress-v2m.dtsi"
Dvexpress-v2p-ca15_a7.dts12 #include "vexpress-v2m-rs1.dtsi"
/linux-5.10/arch/arm64/boot/dts/apm/
Dapm-shadowcat.dtsi124 v2m0: v2m@0 {
125 compatible = "arm,gic-v2m-frame";
129 v2m1: v2m@10000 {
130 compatible = "arm,gic-v2m-frame";
134 v2m2: v2m@20000 {
135 compatible = "arm,gic-v2m-frame";
139 v2m3: v2m@30000 {
140 compatible = "arm,gic-v2m-frame";
144 v2m4: v2m@40000 {
145 compatible = "arm,gic-v2m-frame";
[all …]
/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml142 "^v2m@[0-9a-f]+$":
147 Certain revisions of GIC-400 supports MSI/MSI-x via V2M register frame(s).
148 This is enabled by specifying v2m sub-node(s).
152 const: arm,gic-v2m-frame
221 v2m0: v2m@80000 {
222 compatible = "arm,gic-v2m-frame";
229 v2mN: v2m@90000 {
230 compatible = "arm,gic-v2m-frame";
/linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi370 v2m0: v2m@0 {
371 compatible = "arm,gic-v2m-frame";
379 v2m1: v2m@10000 {
380 compatible = "arm,gic-v2m-frame";
388 v2m2: v2m@20000 {
389 compatible = "arm,gic-v2m-frame";
397 v2m3: v2m@30000 {
398 compatible = "arm,gic-v2m-frame";
406 v2m4: v2m@40000 {
407 compatible = "arm,gic-v2m-frame";
[all …]
/linux-5.10/Documentation/devicetree/bindings/arm/
Darm,vexpress-juno.yaml83 V2M-Juno) was introduced as a vehicle for evaluating big.LITTLE on
91 (V2M-Juno r1) was introduced mainly aimed at development of PCIe
100 (V2M-Juno r2). It has the same feature set as Juno r0 and r1. See
169 - arm,vexpress,v2m-p1
189 - arm,vexpress,v2m-p1
192 arm,v2m-memory-map:
/linux-5.10/arch/arm64/boot/dts/marvell/
Darmada-ap80x.dtsi90 gic_v2m0: v2m@280000 {
91 compatible = "arm,gic-v2m-frame";
97 gic_v2m1: v2m@290000 {
98 compatible = "arm,gic-v2m-frame";
104 gic_v2m2: v2m@2a0000 {
105 compatible = "arm,gic-v2m-frame";
111 gic_v2m3: v2m@2b0000 {
112 compatible = "arm,gic-v2m-frame";
/linux-5.10/arch/arm/mach-vexpress/
DMakefile8 obj-$(CONFIG_ARCH_VEXPRESS) := v2m.o
19 obj-$(CONFIG_ARCH_MPS2) += v2m-mps2.o
/linux-5.10/Documentation/hwmon/
Dvexpress.rst17 * Section "4.4.14. System Configuration registers" of the V2M-P1 TRM:
/linux-5.10/arch/arm64/boot/dts/amd/
Damd-seattle-soc.dtsi26 v2m0: v2m@e0080000 {
27 compatible = "arm,gic-v2m-frame";
/linux-5.10/arch/arm/
DKconfig778 Support for Cortex-M Prototyping System (or V2M-MPS2) which comes

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