Searched full:usbphyc (Results 1 – 22 of 22) sorted by relevance
138 struct stm32_usbphyc *usbphyc; member169 static int stm32_usbphyc_regulators_enable(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_regulators_enable() argument173 ret = regulator_enable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_enable()177 ret = regulator_enable(usbphyc->vdda1v8); in stm32_usbphyc_regulators_enable()184 regulator_disable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_enable()189 static int stm32_usbphyc_regulators_disable(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_regulators_disable() argument193 ret = regulator_disable(usbphyc->vdda1v8); in stm32_usbphyc_regulators_disable()197 ret = regulator_disable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_disable()231 static int stm32_usbphyc_pll_init(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_pll_init() argument234 u32 clk_rate = clk_get_rate(usbphyc->clk); in stm32_usbphyc_pll_init()[all …]
6 obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o
46 (USBPHYC) and the two 8-bit wide UTMI+ interfaces. First interface is
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#11 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI16 USBPHYC31 const: st,stm32mp1-usbphyc239 usbphyc: usbphyc@5a006000 {240 compatible = "st,stm32mp1-usbphyc";
79 &usbphyc {
139 &usbphyc {
158 &usbphyc {
187 &usbphyc {
211 &usbphyc {
1321 clocks = <&usbphyc>, <&rcc USBH>;1330 clocks = <&usbphyc>, <&rcc USBH>;1345 usbphyc: usbphyc@5a006000 { label1349 compatible = "st,stm32mp1-usbphyc";
1147 clocks = <&rcc USBO_K>, <&usbphyc>;1521 clocks = <&usbphyc>, <&rcc USBH>;1532 clocks = <&usbphyc>, <&rcc USBH>;1560 usbphyc: usbphyc@5a006000 { label1564 compatible = "st,stm32mp1-usbphyc";
221 &usbphyc {
329 &usbphyc {
321 &usbphyc {
332 &usbphyc {
384 &usbphyc {
504 &usbphyc {
520 &usbphyc {
585 &usbphyc {
563 &usbphyc {
707 &usbphyc {